JP5210473B2 - 表示装置 - Google Patents
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- JP5210473B2 JP5210473B2 JP2000177639A JP2000177639A JP5210473B2 JP 5210473 B2 JP5210473 B2 JP 5210473B2 JP 2000177639 A JP2000177639 A JP 2000177639A JP 2000177639 A JP2000177639 A JP 2000177639A JP 5210473 B2 JP5210473 B2 JP 5210473B2
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- insulating film
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Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
- G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
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Description
(2)TFTの動作速度の指標となる電界効果移動度(μFE)が、Nチャネル型TFTで200〜650cm2/Vs(代表的には300〜500cm2/Vs)、Pチャネル型TFTで100〜300cm2/Vs(代表的には150〜200cm2/Vs)と大きい。
(3)TFTの駆動電圧の指標となるしきい値電圧(Vth)が、Nチャネル型TFTで-0.5〜1.5V、Pチャネル型TFTで-1.5〜0.5Vと小さい。
段数:9段
TFTのゲート絶縁膜の膜厚:30nm及び50nm
TFTのゲート長(チャネル長):0.6μm
(1)T.Tsutsui, C.Adachi, S.Saito, Photo chemical Processes in Organized Molecular Systems, ed.K.Honda, (Elsevier Sci.Pub., Tokyo,1991) p.437.
(2)M.A.Baldo, D.F.O'Brien, Y.You, A.Shoustikov, S.Sibley, M.E.Thompson, S.R.Forrest, Nature 395(1998)p.151.
上記論文に報告されたEL材料(Pt錯体)の分子式を以下に示す。
(3)M.A.Baldo, S.Lamansky, P.E.Burrrows, M.E.Thompson, S.R.Forrest,Appl.Phys.Lett., 75 (1999)p.4.
(4)T.Tsutsui, M.-J.Yang, M.Yahiro, K.Nakamura, T.Watanabe, T.tsuji, Y.Fukuda, T.Wakimoto, S.Mayaguchi, Jpn.Appl.Phys., 38(12B)(1999)L1502.
本発明の実施例について図5〜図8を用いて説明する。ここでは、画素部とその周辺に設けられる駆動回路部のTFTを同時に作製する方法について説明する。但し、説明を簡単にするために、駆動回路に関しては基本単位であるCMOS回路を図示することとする。
本実施例では、画素の構成を図1(B)に示した構成と異なるものとした例を図14に示す。
本実施例では、図1と異なる構造の画素部を形成する場合について図15を用いて説明する。なお、第2層間絶縁膜48を形成する工程までは実施例1に従えば良い。また、第2層間絶縁膜48で覆われたスイッチング用TFT201、電流制御用TFT202は図1と同じ構造であるので、ここでの説明は省略する。
本実施例では、実施例1によって作製されたアクティブマトリクス型EL表示装置の画素構造の一例を説明する。説明には図16を用いる。なお、図16において図1又は図2と対応する部分には適宜、図1又は図2の符号を引用する。
本実施例では、アクティブマトリクス型EL表示装置の画素構造を実施例4とは異なる構造とした場合の一例を説明する。具体的には、図16に示した画素構造において、ゲート配線の材料を異なるものとした例を図17に示す。なお、図17は図16のゲート配線の構成のみが異なるだけでその他は同じであるので、特に詳細な説明は省略する。
実施例1の図2に示した構造において、活性層と基板11との間に設けられる下地膜12として、放熱効果の高い材料を用いることは有効である。特に電流制御用TFTは長時間に渡って比較的多くの電流を流すことになるため発熱しやすく、自己発熱による劣化が問題となりうる。そのような場合に、本実施例のように下地膜が放熱効果を有することでTFTの熱劣化を抑制することができる。
実施例1ではEL層として有機EL材料を用いることが好ましいとしたが、本発明は無機EL材料を用いても実施できる。但し、現在の無機EL材料は非常に駆動電圧が高いため、そのような駆動電圧に耐えうる耐圧特性を有するTFTを用いなければならない。
本発明を実施して形成されたアクティブマトリクス型EL表示装置(ELモジュール)は、自発光型であるため液晶表示装置に比べて明るい場所での視認性に優れている。そのため本発明は直視型のELディスプレイ(ELモジュールを組み込んだ表示ディスプレイを指す)の表示部として用いることが可能である。ELディスプレイとしてはパソコンモニタ、TV放送受信用モニタ、広告表示モニタ等が挙げられる。
図20に示した写真は本発明のEL表示装置であり、本発明の時分割階調方式により画像を表示している。なお、図20(A)は発光層として低分子系有機材料であるAlq3(トリス−8−キノリノラトアルミニウム錯体)を用いており、図20(B)は発光層として高分子系有機材料であるPPV(ポリパラフェニレンビニレン)を用いている。また、図20に示したEL表示装置の仕様は次の表のようになっている。
Claims (2)
- 第1のトランジスタ及び第2のトランジスタ上に、第1の絶縁膜を有し、
前記第1の絶縁膜上に、第1の電極を有し、
前記第1の絶縁膜及び前記第1の電極上に、前記第1の電極の端部を覆う第2の絶縁膜を有し、
前記第1の電極上及び前記第2の絶縁膜の端部上に、発光層を有し、
前記発光層上に、第2の電極を有し、
前記第1の電極の端部を覆う前記第2の絶縁膜の端部は、テーパー形状であり、
前記第1のトランジスタは、nチャネル型のトランジスタであり、
前記第1のトランジスタは、第1の半導体層、第1のゲート絶縁膜及び第1のゲート電極を有し、
前記第1の半導体層は、第1のソース領域、第1のドレイン領域、第1のLDD領域、第2のLDD領域、第1のオフセット領域、第2のオフセット領域、及び第1のチャネル形成領域を有し、
前記第1のチャネル形成領域は、前記第1のソース領域と前記第1のドレイン領域との間に設けられ、
前記第1のLDD領域は、前記第1のソース領域と前記第1のチャネル形成領域との間に設けられ、
前記第2のLDD領域は、前記第1のドレイン領域と前記第1のチャネル形成領域との間に設けられ、
前記第1のLDD領域及び前記第2のLDD領域は、前記第1のゲート絶縁膜を介して前記第1のゲート電極と重ならないように設けられ、
前記第1のオフセット領域は、前記第1のLDD領域と前記第1のチャネル形成領域との間に設けられ、
前記第2のオフセット領域は、前記第2のLDD領域と前記第1のチャネル形成領域との間に設けられ、
前記第2のトランジスタは、nチャネル型のトランジスタであり、
前記第2のトランジスタは、第2の半導体層、第2のゲート絶縁膜及び第2のゲート電極を有し、
前記第2の半導体層は、第2のソース領域、第2のドレイン領域、第3のLDD領域、及び第2のチャネル形成領域を有し、
前記第2のチャネル形成領域は、前記第2のソース領域と前記第2のドレイン領域との間に設けられ、
前記第3のLDD領域は、前記第2のドレイン領域と前記第2のチャネル形成領域との間に設けられ、
前記第3のLDD領域の一部は、前記第2のゲート絶縁膜を介して前記第2のゲート電極と重なるように設けられ、
前記第2のソース領域は、前記第2のチャネル形成領域と隣接するように設けられ、
前記第2のチャネル形成領域は、前記第3のLDD領域と隣接するように設けられ、
前記第3のLDD領域は、前記第2のドレイン領域と隣接するように設けられていることを特徴とする表示装置。
- 請求項1において、
前記第1のトランジスタ又は前記第2のトランジスタは、マルチゲート構造であることを特徴とする表示装置。
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