JP4883145B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4883145B2 JP4883145B2 JP2009163662A JP2009163662A JP4883145B2 JP 4883145 B2 JP4883145 B2 JP 4883145B2 JP 2009163662 A JP2009163662 A JP 2009163662A JP 2009163662 A JP2009163662 A JP 2009163662A JP 4883145 B2 JP4883145 B2 JP 4883145B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- bonded
- electrode
- lead
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49589—Capacitor integral with or on the leadframe
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/48195—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being a discrete passive component
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
Claims (4)
- リードフレームのチップマウント部上に半導体チップをマウントし、全体を樹脂でモールドして構成された半導体装置において、
前記チップマウント部上に搭載された基板と、
前記基板上に搭載され、両端に電極部を有する複数のチップ部品と、
前記複数のチップ部品の各他方の電極部と前記リードフレームの複数のリード部との各間にボンディングされたワイヤとを備え、
前記複数のチップ部品の各一方の電極部と前記基板との間を導電性接着剤で接着し、
前記複数のチップ部品の各他方の電極部と前記基板との間を絶縁性接着剤で接着したことを特徴とする半導体装置。 - 前記基板は、導体パターンを有する絶縁基板で構成され、
前記複数のチップ部品の各一方の電極部と前記導体パターンとの間を導電性接着剤で接着したことを特徴とする請求項1記載の半導体装置。 - 前記複数のチップ部品の各他方の電極部と前記半導体チップとの間にボンディングされたワイヤを備えたことを特徴とする請求項1記載の半導体装置。
- リードフレームのチップマウント部上に半導体チップをマウントし、全体を樹脂でモールドして構成された半導体装置において、
前記チップマウント部上に搭載された基板と、
前記基板上に搭載され、両端に電極部を有する複数のチップ部品と、
前記複数のチップ部品の各他方の電極部と前記リードフレームの複数のリード部との各間にボンディングされたワイヤとを備え、
前記複数のチップ部品の各一方の電極部と前記基板との間を導電性接着剤で接着し、
前記基板は、導電基板で構成され、
前記複数のチップ部品の各他方の電極部と前記導電基板との間を絶縁性接着剤で接着し、
前記導電基板を前記チップマウント部上に絶縁性接着剤で接着したことを特徴とする半導体装置。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009163662A JP4883145B2 (ja) | 2008-10-30 | 2009-07-10 | 半導体装置 |
US12/588,739 US8624367B2 (en) | 2008-10-30 | 2009-10-27 | Semiconductor device including semiconductor chip mounted on lead frame |
CN2013100632308A CN103199074A (zh) | 2008-10-30 | 2009-10-29 | 包含安装在引线框上的半导体芯片的半导体装置 |
CN200910207690A CN101728372A (zh) | 2008-10-30 | 2009-10-29 | 包含安装在引线框上的半导体芯片的半导体装置 |
US14/091,507 US9029993B2 (en) | 2008-10-30 | 2013-11-27 | Semiconductor device including semiconductor chip mounted on lead frame |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008279791 | 2008-10-30 | ||
JP2008279791 | 2008-10-30 | ||
JP2009163662A JP4883145B2 (ja) | 2008-10-30 | 2009-07-10 | 半導体装置 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011224008A Division JP5299492B2 (ja) | 2008-10-30 | 2011-10-11 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010135737A JP2010135737A (ja) | 2010-06-17 |
JP4883145B2 true JP4883145B2 (ja) | 2012-02-22 |
Family
ID=42130379
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009163662A Expired - Fee Related JP4883145B2 (ja) | 2008-10-30 | 2009-07-10 | 半導体装置 |
Country Status (3)
Country | Link |
---|---|
US (2) | US8624367B2 (ja) |
JP (1) | JP4883145B2 (ja) |
CN (2) | CN101728372A (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012104633A (ja) * | 2010-11-10 | 2012-05-31 | Mitsubishi Electric Corp | 半導体装置 |
DE102011118932A1 (de) | 2011-11-21 | 2013-05-23 | Micronas Gmbh | Vorrichtung mit einem integrierten Schaltkreis |
JP6094592B2 (ja) * | 2012-10-01 | 2017-03-15 | 富士電機株式会社 | 半導体装置とその製造方法 |
CN103762213B (zh) * | 2014-01-24 | 2016-08-24 | 矽力杰半导体技术(杭州)有限公司 | 应用于开关型调节器的集成电路组件 |
US10181410B2 (en) | 2015-02-27 | 2019-01-15 | Qualcomm Incorporated | Integrated circuit package comprising surface capacitor and ground plane |
DE102018124695A1 (de) * | 2017-11-15 | 2019-05-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrieren von Passivvorrichtungen in Package-Strukturen |
JP2019021944A (ja) * | 2018-11-07 | 2019-02-07 | ラピスセミコンダクタ株式会社 | 半導体装置および計測装置 |
CN110600455A (zh) * | 2019-09-25 | 2019-12-20 | 江苏盐芯微电子有限公司 | 一种内置电容的ic芯片及封装方法 |
JP7308793B2 (ja) * | 2020-05-28 | 2023-07-14 | 三菱電機株式会社 | 半導体装置 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62260343A (ja) * | 1986-05-06 | 1987-11-12 | Mitsubishi Electric Corp | 半導体装置 |
JPH027459A (ja) * | 1988-06-24 | 1990-01-11 | Nec Corp | 半導体パッケージ |
JPH08250646A (ja) * | 1995-03-10 | 1996-09-27 | Shindengen Electric Mfg Co Ltd | 混成集積回路装置 |
KR0181896B1 (ko) * | 1996-09-14 | 1999-05-15 | 삼성전자주식회사 | 고속 광 모듈의 광대역화 장치 |
WO1999034444A1 (fr) | 1997-12-25 | 1999-07-08 | Mitsubishi Denki Kabushiki Kaisha | Dispositif a semiconducteur et son procede de fabrication |
JP2000058740A (ja) | 1998-07-31 | 2000-02-25 | Kankyo Denji Gijutsu Kenkyusho:Kk | コモンモードフィルタ素子内蔵半導体デバイス |
JP3312246B2 (ja) * | 1999-06-18 | 2002-08-05 | 松尾電機株式会社 | チップコンデンサの製造方法 |
JP2003017650A (ja) | 2001-06-28 | 2003-01-17 | Sony Corp | 半導体集積回路 |
JP3739699B2 (ja) * | 2001-12-20 | 2006-01-25 | 松下電器産業株式会社 | 電子部品実装済み部品の製造方法及び製造装置 |
JP2004228402A (ja) * | 2003-01-24 | 2004-08-12 | Mitsubishi Electric Corp | 半導体装置 |
JP2005236171A (ja) | 2004-02-23 | 2005-09-02 | Matsushita Electric Ind Co Ltd | 固体電解コンデンサ及びその製造方法 |
TWI226119B (en) * | 2004-03-11 | 2005-01-01 | Advanced Semiconductor Eng | Semiconductor package |
JP4728606B2 (ja) * | 2004-07-13 | 2011-07-20 | 株式会社デンソー | 電子装置 |
US7161797B2 (en) * | 2005-05-17 | 2007-01-09 | Vishay Sprague, Inc. | Surface mount capacitor and method of making same |
JP2007012857A (ja) * | 2005-06-30 | 2007-01-18 | Renesas Technology Corp | 半導体装置 |
JP2007157801A (ja) | 2005-12-01 | 2007-06-21 | Matsushita Electric Ind Co Ltd | 半導体モジュールとその製造方法 |
JP4814639B2 (ja) * | 2006-01-24 | 2011-11-16 | 富士通セミコンダクター株式会社 | 半導体装置および半導体装置の製造方法 |
JP2006245618A (ja) * | 2006-06-14 | 2006-09-14 | Fujitsu Ltd | 受動素子内蔵半導体装置 |
US7948078B2 (en) * | 2006-07-25 | 2011-05-24 | Rohm Co., Ltd. | Semiconductor device |
-
2009
- 2009-07-10 JP JP2009163662A patent/JP4883145B2/ja not_active Expired - Fee Related
- 2009-10-27 US US12/588,739 patent/US8624367B2/en not_active Expired - Fee Related
- 2009-10-29 CN CN200910207690A patent/CN101728372A/zh active Pending
- 2009-10-29 CN CN2013100632308A patent/CN103199074A/zh active Pending
-
2013
- 2013-11-27 US US14/091,507 patent/US9029993B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN101728372A (zh) | 2010-06-09 |
JP2010135737A (ja) | 2010-06-17 |
US20100109136A1 (en) | 2010-05-06 |
US9029993B2 (en) | 2015-05-12 |
US8624367B2 (en) | 2014-01-07 |
US20140084437A1 (en) | 2014-03-27 |
CN103199074A (zh) | 2013-07-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4883145B2 (ja) | 半導体装置 | |
US7737537B2 (en) | Electronic device | |
US8643189B1 (en) | Packaged semiconductor die with power rail pads | |
JP2008507123A (ja) | 集積回路を備える電子デバイス | |
US20120306064A1 (en) | Chip package | |
TWI420988B (zh) | 垂直結構被動元件的裝置和方法 | |
JP5299492B2 (ja) | 半導体装置 | |
JP2011228528A (ja) | パワーブロック及びそれを用いたパワー半導体モジュール | |
CN112911490B (zh) | 传感器封装结构及其制作方法和电子设备 | |
TWI582905B (zh) | 晶片封裝結構及其製作方法 | |
CN105280603B (zh) | 电子封装组件 | |
KR20020085102A (ko) | 칩 적층형 반도체 패키지 | |
JP4370993B2 (ja) | 半導体装置 | |
JP2007134618A5 (ja) | ||
CN112447690B (zh) | 天线置顶的半导体封装结构 | |
CN211606932U (zh) | 电子电路 | |
KR20080051197A (ko) | 반도체 패키지 | |
US20070108613A1 (en) | Microelectronic connection component | |
KR101217434B1 (ko) | 반도체 디바이스 | |
WO2020250817A1 (ja) | 半導体装置 | |
JP2004031432A (ja) | 半導体装置 | |
KR20130088924A (ko) | 반도체 모듈 | |
KR20090076618A (ko) | 하이 핀 구조의 반도체 패키지 장치 및 그 제조 방법 | |
KR100900235B1 (ko) | 반도체 패키지 및 이의 제조 방법 | |
JP2011014758A (ja) | リードフレーム及びこれを用いた電子部品 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20101108 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20101116 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110112 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110809 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20111011 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20111108 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20111121 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20141216 Year of fee payment: 3 |
|
R151 | Written notification of patent or utility model registration |
Ref document number: 4883145 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20141216 Year of fee payment: 3 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |