JP4331053B2 - 半導体記憶装置 - Google Patents
半導体記憶装置 Download PDFInfo
- Publication number
- JP4331053B2 JP4331053B2 JP2004157893A JP2004157893A JP4331053B2 JP 4331053 B2 JP4331053 B2 JP 4331053B2 JP 2004157893 A JP2004157893 A JP 2004157893A JP 2004157893 A JP2004157893 A JP 2004157893A JP 4331053 B2 JP4331053 B2 JP 4331053B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- memory cell
- voltage
- line
- bit line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Description
前記ビット線に接続されて、選択メモリセルのデータを読み出すセンスアンプ回路とを備え、
前記ウェル領域を基準電位として、選択ワード線にデータに応じて選択メモリセルがオン又はオフする読み出し電圧を、ソース線には第1の正電圧を、選択ビット線に第1の正電圧より高い第2の正電圧をそれぞれ印加して、前記選択メモリセルのデータに応じて前記選択ビット線からソース線に流れる読み出し電流を検出してそのデータを判定するデータ読み出しモードを有する。
Claims (1)
- 半導体基板のウェル領域に形成されて、複数のワード線とこれと交差する複数のビット線、これらのワード線とビット線の交差部に配置されて、制御ゲートがワード線に、ドレイン及びソースがそれぞれビット線及びソース線に接続される複数の電気的書き換え可能な不揮発性メモリセルを有するメモリセルアレイと、
前記ビット線に接続されて、選択メモリセルのデータを読み出すセンスアンプ回路とを備え、
前記ウェル領域を基準電位として、選択ワード線にデータに応じて選択メモリセルがオン又はオフする読み出し電圧を、ソース線には第1の正電圧を、選択ビット線に第1の正電圧より高い第2の正電圧をそれぞれ印加して、前記選択メモリセルのデータに応じて前記選択ビット線からソース線に流れる読み出し電流を検出してそのデータを判定するデータ読み出しモードを有する半導体記憶装置であって、
前記メモリセルアレイは、ソース線を共有する複数のNANDセルユニットを配列して構成され、各NANDセルユニットは、ビット線方向に配列されて直列接続されてそれぞれの制御ゲートが異なるワード線に接続される複数のメモリセルとその一端を対応するビット線に接続する第1の選択ゲートトランジスタ及び他端を前記ソース線に接続する第2の選択ゲートトランジスタにより構成され、
前記データ読み出しモードにおいて、前記選択メモリセルを含むNANDセルユニット内の非選択メモリセルに接続される非選択ワード線にはデータによらずメモリセルがオンするパス電圧が印加され、前記選択ビット線に隣接する非選択ビット線に前記第1の正電圧が印加され、
前記データ読み出しモードにおいて、前記ソース線は、前記選択メモリセルがNANDセルユニット内で前記ビット線に近い所定範囲内に位置する場合は前記基準電位に設定され、前記選択メモリセルがその所定範囲外に位置する場合には前記ソース線に与えられる第1の正電圧は、その選択メモリセルの位置が前記ソース線に近くなるにつれて高くなるように切り換えられる
ことを特徴とする半導体記憶装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004157893A JP4331053B2 (ja) | 2004-05-27 | 2004-05-27 | 半導体記憶装置 |
US11/136,369 US7259992B2 (en) | 2004-05-27 | 2005-05-25 | Semiconductor memory device with a memory cell array formed on a semiconductor substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004157893A JP4331053B2 (ja) | 2004-05-27 | 2004-05-27 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005339692A JP2005339692A (ja) | 2005-12-08 |
JP4331053B2 true JP4331053B2 (ja) | 2009-09-16 |
Family
ID=35425011
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004157893A Expired - Fee Related JP4331053B2 (ja) | 2004-05-27 | 2004-05-27 | 半導体記憶装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7259992B2 (ja) |
JP (1) | JP4331053B2 (ja) |
Families Citing this family (72)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080196910A1 (en) * | 2000-06-20 | 2008-08-21 | Radle Patrick J | Electrical sensing device modules for attachment to power tools and drills |
KR100684873B1 (ko) * | 2004-11-22 | 2007-02-20 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그것의 워드라인 전압 제어 방법 |
US7528447B2 (en) * | 2005-04-06 | 2009-05-05 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory and method for controlling a non-volatile semiconductor memory |
JP4928752B2 (ja) * | 2005-07-14 | 2012-05-09 | 株式会社東芝 | 半導体記憶装置 |
JP4807014B2 (ja) * | 2005-09-02 | 2011-11-02 | ソニー株式会社 | 固体撮像装置、固体撮像装置の駆動方法および撮像装置 |
US7551492B2 (en) | 2006-03-29 | 2009-06-23 | Mosaid Technologies, Inc. | Non-volatile semiconductor memory with page erase |
US7606075B2 (en) * | 2006-04-19 | 2009-10-20 | Micron Technology, Inc. | Read operation for NAND memory |
JP5051342B2 (ja) * | 2006-07-12 | 2012-10-17 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | 不揮発性半導体メモリ及びその駆動方法 |
JP5088465B2 (ja) | 2006-07-12 | 2012-12-05 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | 不揮発性半導体メモリ |
JP2008047219A (ja) * | 2006-08-16 | 2008-02-28 | Toshiba Corp | Nand型フラッシュメモリ |
US8194451B2 (en) | 2007-11-29 | 2012-06-05 | Zeno Semiconductor, Inc. | Memory cells, memory cell arrays, methods of using and methods of making |
US8547756B2 (en) | 2010-10-04 | 2013-10-01 | Zeno Semiconductor, Inc. | Semiconductor memory device having an electrically floating body transistor |
US7760548B2 (en) | 2006-11-29 | 2010-07-20 | Yuniarto Widjaja | Semiconductor memory having both volatile and non-volatile functionality and method of operating |
US9391079B2 (en) | 2007-11-29 | 2016-07-12 | Zeno Semiconductor, Inc. | Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making |
US9601493B2 (en) | 2006-11-29 | 2017-03-21 | Zeno Semiconductor, Inc | Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making |
US8077536B2 (en) | 2008-08-05 | 2011-12-13 | Zeno Semiconductor, Inc. | Method of operating semiconductor memory device with floating body transistor using silicon controlled rectifier principle |
US8514622B2 (en) | 2007-11-29 | 2013-08-20 | Zeno Semiconductor, Inc. | Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making |
US8159868B2 (en) | 2008-08-22 | 2012-04-17 | Zeno Semiconductor, Inc. | Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating |
US7623389B2 (en) * | 2006-12-21 | 2009-11-24 | Sandisk Corporation | System for low voltage programming of non-volatile memory cells |
US7944749B2 (en) * | 2006-12-21 | 2011-05-17 | Sandisk Corporation | Method of low voltage programming of non-volatile memory cells |
KR100923810B1 (ko) | 2007-02-22 | 2009-10-27 | 주식회사 하이닉스반도체 | 메모리 소자와 그 동작 방법 |
US7804718B2 (en) * | 2007-03-07 | 2010-09-28 | Mosaid Technologies Incorporated | Partial block erase architecture for flash memory |
US9230651B2 (en) | 2012-04-08 | 2016-01-05 | Zeno Semiconductor, Inc. | Memory device having electrically floating body transitor |
KR100865820B1 (ko) * | 2007-06-28 | 2008-10-28 | 주식회사 하이닉스반도체 | 메모리 소자 및 독출 방법 |
JP2009043358A (ja) * | 2007-08-10 | 2009-02-26 | Toshiba Corp | 半導体記憶装置 |
US7847338B2 (en) | 2007-10-24 | 2010-12-07 | Yuniarto Widjaja | Semiconductor memory having both volatile and non-volatile functionality and method of operating |
US8130548B2 (en) | 2007-11-29 | 2012-03-06 | Zeno Semiconductor, Inc. | Semiconductor memory having electrically floating body transistor |
US10403361B2 (en) | 2007-11-29 | 2019-09-03 | Zeno Semiconductor, Inc. | Memory cells, memory cell arrays, methods of using and methods of making |
US8130547B2 (en) | 2007-11-29 | 2012-03-06 | Zeno Semiconductor, Inc. | Method of maintaining the state of semiconductor memory having electrically floating body transistor |
US8264875B2 (en) | 2010-10-04 | 2012-09-11 | Zeno Semiconducor, Inc. | Semiconductor memory device having an electrically floating body transistor |
US8174886B2 (en) | 2007-11-29 | 2012-05-08 | Zeno Semiconductor, Inc. | Semiconductor memory having electrically floating body transistor |
US7811932B2 (en) * | 2007-12-28 | 2010-10-12 | Freescale Semiconductor, Inc. | 3-D semiconductor die structure with containing feature and method |
JP2009193627A (ja) * | 2008-02-13 | 2009-08-27 | Toshiba Corp | 半導体記憶装置 |
US8014200B2 (en) | 2008-04-08 | 2011-09-06 | Zeno Semiconductor, Inc. | Semiconductor memory having volatile and multi-bit, non-volatile functionality and methods of operating |
USRE47381E1 (en) | 2008-09-03 | 2019-05-07 | Zeno Semiconductor, Inc. | Forming semiconductor cells with regions of varying conductivity |
JP2010123201A (ja) | 2008-11-20 | 2010-06-03 | Toshiba Corp | 不揮発性半導体記憶装置 |
US8120966B2 (en) * | 2009-02-05 | 2012-02-21 | Aplus Flash Technology, Inc. | Method and apparatus for management of over-erasure in NAND-based NOR-type flash memory |
US11908899B2 (en) | 2009-02-20 | 2024-02-20 | Zeno Semiconductor, Inc. | MOSFET and memory cell having improved drain current through back bias application |
CN107293322B (zh) | 2010-02-07 | 2021-09-21 | 芝诺半导体有限公司 | 含导通浮体晶体管、并具有永久性和非永久性功能的半导体存储元件及操作方法 |
JP2011175696A (ja) * | 2010-02-23 | 2011-09-08 | Elpida Memory Inc | 半導体装置 |
US10340276B2 (en) | 2010-03-02 | 2019-07-02 | Zeno Semiconductor, Inc. | Method of maintaining the state of semiconductor memory having electrically floating body transistor |
US10461084B2 (en) | 2010-03-02 | 2019-10-29 | Zeno Semiconductor, Inc. | Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making |
US9922981B2 (en) | 2010-03-02 | 2018-03-20 | Zeno Semiconductor, Inc. | Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making |
US8582359B2 (en) | 2010-11-16 | 2013-11-12 | Zeno Semiconductor, Inc. | Dual-port semiconductor memory and first-in first-out (FIFO) memory having electrically floating body transistor |
US8957458B2 (en) | 2011-03-24 | 2015-02-17 | Zeno Semiconductor, Inc. | Asymmetric semiconductor memory device having electrically floating body transistor |
JP2013004123A (ja) | 2011-06-14 | 2013-01-07 | Toshiba Corp | 不揮発性半導体記憶装置 |
US9025358B2 (en) | 2011-10-13 | 2015-05-05 | Zeno Semiconductor Inc | Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating |
JP2014049143A (ja) * | 2012-08-29 | 2014-03-17 | Toshiba Corp | 不揮発性半導体記憶装置 |
CN104471648B (zh) | 2012-02-16 | 2017-07-21 | 芝诺半导体有限公司 | 包括初级和二级电晶体的存储单元 |
CN103426477A (zh) * | 2012-05-18 | 2013-12-04 | 北京兆易创新科技股份有限公司 | 一种NOR Flash 存储器的读方法及装置 |
US8988954B2 (en) * | 2012-09-13 | 2015-03-24 | Arm Limited | Memory device and method of performing a read operation within such a memory device |
US9208880B2 (en) | 2013-01-14 | 2015-12-08 | Zeno Semiconductor, Inc. | Content addressable memory device having electrically floating body transistor |
US9029922B2 (en) | 2013-03-09 | 2015-05-12 | Zeno Semiconductor, Inc. | Memory device comprising electrically floating body transistor |
US9147451B2 (en) * | 2013-03-20 | 2015-09-29 | Arm Limited | Memory device and method of controlling leakage current within such a memory device |
JP5868889B2 (ja) * | 2013-03-25 | 2016-02-24 | 株式会社東芝 | 不揮発性半導体記憶装置 |
US9275723B2 (en) | 2013-04-10 | 2016-03-01 | Zeno Semiconductor, Inc. | Scalable floating body memory cell for memory compilers and method of using floating body memories with memory compilers |
US9368625B2 (en) | 2013-05-01 | 2016-06-14 | Zeno Semiconductor, Inc. | NAND string utilizing floating body memory cell |
US9281022B2 (en) | 2013-07-10 | 2016-03-08 | Zeno Semiconductor, Inc. | Systems and methods for reducing standby power in floating body memory devices |
US9548119B2 (en) | 2014-01-15 | 2017-01-17 | Zeno Semiconductor, Inc | Memory device comprising an electrically floating body transistor |
US9343164B2 (en) * | 2014-03-07 | 2016-05-17 | Sandisk Technologies Inc. | Compensating source side resistance versus word line |
JP6286292B2 (ja) * | 2014-06-20 | 2018-02-28 | 株式会社フローディア | 不揮発性半導体記憶装置 |
US9496053B2 (en) | 2014-08-15 | 2016-11-15 | Zeno Semiconductor, Inc. | Memory device comprising electrically floating body transistor |
US9502089B2 (en) | 2014-09-30 | 2016-11-22 | Everspin Technologies, Inc. | Short detection and inversion |
CN107592943B (zh) | 2015-04-29 | 2022-07-15 | 芝诺半导体有限公司 | 提高漏极电流的mosfet和存储单元 |
US10553683B2 (en) | 2015-04-29 | 2020-02-04 | Zeno Semiconductor, Inc. | MOSFET and memory cell having improved drain current through back bias application |
US10079301B2 (en) | 2016-11-01 | 2018-09-18 | Zeno Semiconductor, Inc. | Memory device comprising an electrically floating body transistor and methods of using |
JP2018156697A (ja) * | 2017-03-15 | 2018-10-04 | 東芝メモリ株式会社 | 半導体記憶装置 |
WO2019204525A1 (en) | 2018-04-18 | 2019-10-24 | Zeno Semiconductor, Inc. | A memory device comprising an electrically floating body transistor |
JP6535784B1 (ja) * | 2018-04-25 | 2019-06-26 | ウィンボンド エレクトロニクス コーポレーション | 半導体記憶装置 |
EP3647952A1 (en) * | 2018-10-31 | 2020-05-06 | EM Microelectronic-Marin SA | Anti-tearing protection system for non-volatile memories |
US11600663B2 (en) | 2019-01-11 | 2023-03-07 | Zeno Semiconductor, Inc. | Memory cell and memory array select transistor |
CN110277393A (zh) * | 2019-06-19 | 2019-09-24 | 上海华力微电子有限公司 | 闪存及其制造方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3743453B2 (ja) * | 1993-01-27 | 2006-02-08 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置 |
US5602775A (en) * | 1995-03-15 | 1997-02-11 | National Semiconductor Corporation | Flash EEPROM Memory system for low voltage operation and method |
KR100388179B1 (ko) * | 1999-02-08 | 2003-06-19 | 가부시끼가이샤 도시바 | 불휘발성 반도체 메모리 |
JP4246831B2 (ja) | 1999-02-08 | 2009-04-02 | 株式会社東芝 | 半導体集積回路装置のデータ判別方法 |
JP4273558B2 (ja) | 1999-03-17 | 2009-06-03 | ソニー株式会社 | 不揮発性半導体記憶装置およびその消去ベリファイ方法 |
JP3829088B2 (ja) * | 2001-03-29 | 2006-10-04 | 株式会社東芝 | 半導体記憶装置 |
-
2004
- 2004-05-27 JP JP2004157893A patent/JP4331053B2/ja not_active Expired - Fee Related
-
2005
- 2005-05-25 US US11/136,369 patent/US7259992B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP2005339692A (ja) | 2005-12-08 |
US7259992B2 (en) | 2007-08-21 |
US20050265079A1 (en) | 2005-12-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4331053B2 (ja) | 半導体記憶装置 | |
US11670382B2 (en) | Memory device | |
US10720220B2 (en) | Sense amplifier having a sense transistor to which different voltages are applied during sensing and after sensing to correct a variation of the threshold voltage of the sense transistor | |
JP4284300B2 (ja) | 半導体記憶装置 | |
JP4856138B2 (ja) | 不揮発性半導体記憶装置 | |
US9984761B2 (en) | Semiconductor memory device | |
US6330189B1 (en) | Nonvolatile semiconductor memory device | |
JP4855271B2 (ja) | 記憶要素間のカップリングを補償する否定積メモリの読み出し方法 | |
CN105976863B (zh) | 半导体存储装置 | |
US7251161B2 (en) | Semiconductor device and method of controlling said semiconductor device | |
JP4891580B2 (ja) | 不揮発性半導体記憶装置 | |
US10418113B2 (en) | Operation method for suppressing floating gate (FG) coupling | |
JP2009193631A (ja) | 不揮発性半導体記憶装置 | |
US9135968B2 (en) | Method of operating a semiconductor memory device | |
US7948796B2 (en) | Nonvolatile semiconductor memory device and method for controlling the same | |
US7898889B2 (en) | Nonvolatile semiconductor memory device | |
JP2010123201A (ja) | 不揮発性半導体記憶装置 | |
JP3961759B2 (ja) | 不揮発性半導体記憶装置 | |
CN110808077A (zh) | 非易失性存储器装置及操作其的方法 | |
JP5081755B2 (ja) | 不揮発性半導体記憶装置とその読み出し方法 | |
TWI713037B (zh) | 半導體記憶裝置 | |
JP2008085249A (ja) | 不揮発性半導体記憶装置 | |
JP2011028845A (ja) | 半導体装置および半導体装置の制御方法 | |
KR20070109174A (ko) | 플래쉬 메모리 소자의 읽기 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20061102 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20090310 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090430 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20090526 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20090617 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120626 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120626 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130626 Year of fee payment: 4 |
|
LAPS | Cancellation because of no payment of annual fees |