JP3915992B2 - 面実装型電子部品の製造方法 - Google Patents
面実装型電子部品の製造方法 Download PDFInfo
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- JP3915992B2 JP3915992B2 JP2004170386A JP2004170386A JP3915992B2 JP 3915992 B2 JP3915992 B2 JP 3915992B2 JP 2004170386 A JP2004170386 A JP 2004170386A JP 2004170386 A JP2004170386 A JP 2004170386A JP 3915992 B2 JP3915992 B2 JP 3915992B2
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- 238000004519 manufacturing process Methods 0.000 title claims description 25
- 229920003002 synthetic resin Polymers 0.000 claims description 29
- 239000000057 synthetic resin Substances 0.000 claims description 29
- 238000005520 cutting process Methods 0.000 claims description 27
- 239000011247 coating layer Substances 0.000 claims description 19
- 239000004065 semiconductor Substances 0.000 claims description 16
- 238000011049 filling Methods 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 11
- 239000002184 metal Substances 0.000 claims description 10
- 238000005476 soldering Methods 0.000 description 12
- 229910000679 solder Inorganic materials 0.000 description 6
- 238000007747 plating Methods 0.000 description 4
- 239000010410 layer Substances 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 238000005260 corrosion Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- 238000001721 transfer moulding Methods 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
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Description
i).前記構成による電子部品1′をプリント回路基板等に対して半田付け実装するとき
,この電子部品1′における前記各繋ぎリード片9′,10′の切断面,つまり,電子部品1における側面のうち半田付け面7′,8′以外の部分と,プリント回路基板等における配線パターンとの間に半田ブリッジが発生するおそれがある。
ii).前記構成による電子部品1′の複数個をプリント回路基板等に対して並べて半田付け実装したとき,相隣接する電子部品1′における各繋ぎリード片9′,10′の切断面の相互間に,電気放電が発生するおそれがあることに加えて,その半田付け実装に際して,相隣接する各電子部品1における各繋ぎリード片9′,10′の切断面の相互間に,半田ブリッジができるおそれがあるために,前記各電子部品1′のピッチ間隔を広くしなければならないから,単位面積当たりに実装できる個数,つまり,実装密度を高くすることができない。
iii).前記各繋ぎリード片9′,10′の切断面が露出しているために,この切断面に錆び等の腐食が発生するばかりか,前記パッケージ体6′の内部における耐湿性が低下する。
という等の問題があった。
「金属板製のリードフレームに,製造目的の電子部品の一つを構成する少なくとも一組の電極端子片を,前記電子部品の複数個を並べて配置する箇所の各々に当該各電極端子片の相互間を繋ぎリード片を介して一体に連結した形態にして設ける工程と,
前記リードフレームにおける各一組の電極端子片に対して半導体素子を電気的に接続するように供給する工程と,
前記リードフレームに,前記各電極端子片及び各半導体素子の全体を密封する合成樹脂製の盤状体を,前記各電極端子片における少なくとも一部の下面が当該盤状体の下面に半田付け用の実装面として露出するように設ける工程と,
前記盤状体における下面のうち前記各電子部品の間の部分に,前記開口溝を,前記繋ぎリード片を切断する深さにして刻設する工程と,
前記開口溝内に被膜層用の合成樹脂を充填する工程と,
前記盤状体のうち前記開口溝内の部分を,当該開口溝内の左右両側に前記充填合成樹脂の一部を被膜層として残すように切断することによって前記各電子部品ごとに分割する工程を備えて成る。」
ことを特徴としている。
「前記請求項1に記載した構成において,前記開口溝内に被膜層用の合成樹脂を充填する工程が,この合成樹脂の表面がアーチ状に窪んだ形状にする工程である。」
ことを特徴としている。
「前記請求項1又は2の記載において,前記開口溝における溝幅寸法が,当該開口溝における深さ寸法の0.8〜2倍である。」
ことを特徴としている。
「少なくとも一組の電極端子片と,この一組の電極端子片に対して電気的に接続した半導体素子とを備え,前記各電極端子片及び半導体素子の全体を合成樹脂製のパッケージ体にて,前記各電極端子片における少なくとも一部の下面が当該パッケージ体における下面に半田付け用の実装面として露出するように密封して成る電子部品。」
を,
「前記パッケージ体の側面に,合成樹脂製の被膜層を,前記各電極端子片から外向きに一体に延びる繋ぎ片をの先端における切断面を被覆する。」
という構成にして,複数個同時に製造することができる。
2,3 電極端子
4 半導体素子
5 金属線
6 パッケージ体
6a パッケージ体の下面
7,8 半田付け用の実装面
9,10 繋ぎリード片
11 被膜層
12,13 メッキ層
A リードフレーム
A1 縦切断線
A2 横切断線
B 盤状体
C 開口溝
D 合成樹脂
Claims (3)
- 金属板製のリードフレームに,製造目的の電子部品の一つを構成する少なくとも一組の電極端子片を,前記電子部品の複数個を並べて配置する箇所の各々に当該各電極端子片の相互間を繋ぎリード片を介して一体に連結した形態にして設ける工程と,
前記リードフレームにおける各一組の電極端子片に対して半導体素子を電気的に接続するように供給する工程と,
前記リードフレームに,前記各電極端子片及び各半導体素子の全体を密封する合成樹脂製の盤状体を,前記各電極端子片における少なくとも一部の下面が当該盤状体の下面に半田付け用の実装面として露出するように設ける工程と,
前記盤状体における下面のうち前記各電子部品の間の部分に,前記開口溝を,前記繋ぎリード片を切断する深さにして刻設する工程と,
前記開口溝内に被膜層用の合成樹脂を充填する工程と,
前記盤状体のうち前記開口溝内の部分を,当該開口溝内の左右両側に前記充填合成樹脂の一部を被膜層として残すように切断することによって前記各電子部品ごとに分割する工程を備えて成る,
ことを特徴とする面実装型電子部品の製造方法。 - 前記請求項1に記載した構成において,前記開口溝内に被膜層用の合成樹脂を充填する工程が,この合成樹脂の表面がアーチ状に窪んだ形状にする工程であることを特徴とする面実装型電子部品の製造方法。
- 前記請求項1又は2の記載において,前記開口溝における溝幅寸法が,当該開口溝における深さ寸法の0.8〜2倍であることを特徴とする面実装型電子部品の製造方法。
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JP2004170386A JP3915992B2 (ja) | 2004-06-08 | 2004-06-08 | 面実装型電子部品の製造方法 |
KR1020057015539A KR101130633B1 (ko) | 2004-06-08 | 2005-05-12 | 면실장형 전자부품과 그 제조방법 |
CNB2005800002735A CN100454530C (zh) | 2004-06-08 | 2005-05-12 | 面装配型电子部件及其制造方法 |
PCT/JP2005/008715 WO2005122251A1 (ja) | 2004-06-08 | 2005-05-12 | 面実装型電子部品とその製造方法 |
US11/597,489 US7781888B2 (en) | 2004-06-08 | 2005-05-12 | Surface mounting electronic component and manufacturing method thereof |
TW94116164A TWI374526B (en) | 2004-06-08 | 2005-05-18 | Surface mounted electronic component and manufacturing method therefor |
US12/835,491 US8106508B2 (en) | 2004-06-08 | 2010-07-13 | Electronic component for surface mounting |
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JP3915992B2 (ja) * | 2004-06-08 | 2007-05-16 | ローム株式会社 | 面実装型電子部品の製造方法 |
JP4003780B2 (ja) * | 2004-09-17 | 2007-11-07 | カシオ計算機株式会社 | 半導体装置及びその製造方法 |
JP4453711B2 (ja) * | 2007-03-30 | 2010-04-21 | Tdk株式会社 | 薄膜部品及び製造方法 |
US20090042339A1 (en) * | 2007-08-10 | 2009-02-12 | Texas Instruments Incorporated | Packaged integrated circuits and methods to form a packaged integrated circuit |
JP5416975B2 (ja) | 2008-03-11 | 2014-02-12 | ローム株式会社 | 半導体発光装置 |
JP5010693B2 (ja) * | 2010-01-29 | 2012-08-29 | 株式会社東芝 | Ledパッケージ |
JP5360425B2 (ja) * | 2010-04-08 | 2013-12-04 | 株式会社村田製作所 | 回路モジュール、および回路モジュールの製造方法 |
US8373279B2 (en) * | 2010-04-23 | 2013-02-12 | Infineon Technologies Ag | Die package |
US8933548B2 (en) | 2010-11-02 | 2015-01-13 | Dai Nippon Printing Co., Ltd. | Lead frame for mounting LED elements, lead frame with resin, method for manufacturing semiconductor devices, and lead frame for mounting semiconductor elements |
KR101205970B1 (ko) * | 2010-11-18 | 2012-11-28 | 주식회사 고영테크놀러지 | 브리지 연결불량 검출방법 |
DE102011112659B4 (de) * | 2011-09-06 | 2022-01-27 | Vishay Semiconductor Gmbh | Oberflächenmontierbares elektronisches Bauelement |
TWI471989B (zh) * | 2012-05-18 | 2015-02-01 | 矽品精密工業股份有限公司 | 半導體封裝件及其製法 |
TWD161897S (zh) | 2013-02-08 | 2014-07-21 | 晶元光電股份有限公司 | 發光二極體之部分 |
USD847102S1 (en) | 2013-02-08 | 2019-04-30 | Epistar Corporation | Light emitting diode |
JP6352009B2 (ja) | 2013-04-16 | 2018-07-04 | ローム株式会社 | 半導体装置 |
JP6634117B2 (ja) * | 2013-04-16 | 2020-01-22 | ローム株式会社 | 半導体装置 |
USD778847S1 (en) * | 2014-12-15 | 2017-02-14 | Kingbright Electronics Co. Ltd. | LED component |
USD778846S1 (en) * | 2014-12-15 | 2017-02-14 | Kingbright Electronics Co. Ltd. | LED component |
JP6492288B2 (ja) * | 2015-10-01 | 2019-04-03 | パナソニックIpマネジメント株式会社 | 素子チップの製造方法 |
JP6467592B2 (ja) * | 2016-02-04 | 2019-02-13 | パナソニックIpマネジメント株式会社 | 素子チップの製造方法および電子部品実装構造体の製造方法ならびに電子部品実装構造体 |
JP6476418B2 (ja) * | 2016-02-04 | 2019-03-06 | パナソニックIpマネジメント株式会社 | 素子チップの製造方法および電子部品実装構造体の製造方法 |
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TWI374526B (en) | 2012-10-11 |
US20100276808A1 (en) | 2010-11-04 |
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US7781888B2 (en) | 2010-08-24 |
CN1771599A (zh) | 2006-05-10 |
KR20070020160A (ko) | 2007-02-20 |
KR101130633B1 (ko) | 2012-04-02 |
TW200601528A (en) | 2006-01-01 |
WO2005122251A1 (ja) | 2005-12-22 |
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US8106508B2 (en) | 2012-01-31 |
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