JP2017516389A - 切換可能な2次再生経路 - Google Patents
切換可能な2次再生経路 Download PDFInfo
- Publication number
- JP2017516389A JP2017516389A JP2016562946A JP2016562946A JP2017516389A JP 2017516389 A JP2017516389 A JP 2017516389A JP 2016562946 A JP2016562946 A JP 2016562946A JP 2016562946 A JP2016562946 A JP 2016562946A JP 2017516389 A JP2017516389 A JP 2017516389A
- Authority
- JP
- Japan
- Prior art keywords
- magnitude
- input signal
- digital
- processing path
- digital input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012545 processing Methods 0.000 claims abstract description 232
- 238000000034 method Methods 0.000 claims description 48
- 230000008569 process Effects 0.000 claims description 18
- 238000007493 shaping process Methods 0.000 claims description 14
- 230000008859 change Effects 0.000 claims description 3
- 230000007423 decrease Effects 0.000 claims 2
- 229920005994 diacetyl cellulose Polymers 0.000 description 70
- 238000013139 quantization Methods 0.000 description 14
- 238000010586 diagram Methods 0.000 description 10
- 230000006870 function Effects 0.000 description 9
- 238000012986 modification Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 238000006467 substitution reaction Methods 0.000 description 3
- 230000002238 attenuated effect Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000005236 sound signal Effects 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/002—Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
- H03M1/0845—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of power supply variations, e.g. ripple
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/662—Multiplexed conversion systems
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/68—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/70—Automatic control for modifying converter range
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
- H03M1/78—Simultaneous conversion using ladder network
- H03M1/785—Simultaneous conversion using ladder network using resistors, i.e. R-2R ladders
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
- H03M3/392—Arrangements for selecting among plural operation modes, e.g. for multi-standard operation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
- H03M3/412—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution
- H03M3/414—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it, i.e. multiple stage noise shaping [MASH] type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/32—Delta-sigma modulation with special provisions or arrangements for power saving, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains, by selectively turning on stages when needed
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
- H03M3/412—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution
- H03M3/414—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it, i.e. multiple stage noise shaping [MASH] type
- H03M3/416—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it, i.e. multiple stage noise shaping [MASH] type all these quantisers being multiple bit quantisers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/50—Digital/analogue converters using delta-sigma modulation as an intermediate step
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Amplifiers (AREA)
- Analogue/Digital Conversion (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
Description
Claims (30)
- 第1の処理経路と第2の処理経路とを含む複数の処理経路であって、
前記第1の処理経路は、デジタル入力信号を第1の中間アナログ信号に変換するための、高電力状態及び低電力状態で動作するように構成される第1のデジタル/アナログ変換器を備え、
前記第2の処理経路は、前記デジタル入力信号を第2の中間アナログ信号に変換するための第2のデジタル/アナログ変換器を備える、複数の処理経路と、
前記第1の中間アナログ信号と前記第2の中間アナログ信号との和を含むアナログ信号を生成するように構成される、デジタル/アナログ・ステージ出力と、
前記デジタル入力信号の大きさが閾値となる大きさを下回るとき、前記第1のデジタル/アナログ変換器を前記低電力状態で動作させるように構成される、コントローラと
を備える、処理システム。 - 前記第2のデジタル/アナログ変換器は、前記デジタル入力信号を前記第2の中間アナログ信号に変換するとき、前記デジタル入力信号を前記第1の中間アナログ信号に変換するときの前記第1のデジタル/アナログ変換器よりも少ない電力を消費する、請求項1に記載の処理システム。
- 前記第1のデジタル/アナログ変換器は、前記第2のデジタル/アナログ変換器によって前記第2の処理経路にもたらされるノイズに比べ、少ないノイズを前記第1の処理経路にもたらす、請求項1に記載の処理システム。
- 前記第2のデジタル/アナログ変換器は、各々がそれぞれの第1の端子において相互に連結され、各々がそれぞれの第2の端子において前記デジタル入力信号の単一ビットの値を示す信号を駆動する、対応するドライバに連結される複数の抵抗器を含む抵抗器ラダーを備える、請求項1に記載の処理システム。
- 前記コントローラは、前記デジタル入力信号の前記大きさが前記閾値となる大きさを下回るとき、前記第1の処理経路にほぼゼロの大きさを有する前記第1の中間アナログ信号を出力させるように更に構成される、請求項1に記載の処理システム。
- 前記コントローラは、前記デジタル入力信号の前記大きさが前記閾値となる大きさを上回るとき、前記第2の処理経路にほぼゼロの大きさを有する前記第2の中間アナログ信号を出力させるように更に構成される、請求項5に記載の処理システム。
- 前記第1の処理経路は、第1の利得を前記第1の処理経路に適用するように構成される第1の利得素子を備え、
前記第2の処理経路は、第2の利得を前記第2の処理経路に適用するように構成される第2の利得素子を備え、
前記コントローラは、前記デジタル入力信号の前記大きさが変化しても前記第1の利得と前記第2の利得の和が略一定に留まるように、前記第1の利得と前記第2の利得とを前記デジタル入力信号の前記大きさに基づいて変化させるように更に構成される、
請求項1に記載の処理システム。 - 前記コントローラは、前記デジタル入力信号の前記大きさが前記閾値となる大きさを上回るとき、
前記デジタル入力信号の前記大きさが上昇するにつれて前記第1の利得が上昇し、その逆も成り立ち、
前記デジタル入力信号の前記大きさが下降するにつれて前記第2の利得が上昇し、その逆も成り立つ
ように、前記第1の利得と前記第2の利得とを変化させる
ように更に構成される、請求項7に記載の処理システム。 - 前記閾値となる大きさを上回る前記デジタル入力信号の大きさに対して、前記第2のデジタル/アナログ変換器によってもたらされるノイズが前記第1のデジタル/アナログ変換器によって少なくとも部分的にキャンセルされる、請求項1に記載の処理システム。
- 多段ノイズ・シェーピング構成を更に備え、前記第1の処理経路が前記多段ノイズ・シェーピング構成の第1のステージを含み、前記第2の処理経路が前記多段ノイズ・シェーピング構成の第2のステージを含む、請求項1に記載の処理システム。
- 前記コントローラは、前記デジタル入力信号の前記大きさが前記閾値となる大きさを下回るとき、前記第1の処理経路にほぼゼロの大きさを有する前記第1の中間アナログ信号を出力させるように更に構成される、請求項10に記載の処理システム。
- 前記コントローラは、前記デジタル入力信号の前記大きさが前記閾値となる大きさを下回るとき、前記多段ノイズ・シェーピング構成の前記第1のステージを低電力モードで動作させるように更に構成される、請求項11に記載の処理システム。
- 前記コントローラは、
前記デジタル入力信号の前記大きさが前記閾値となる大きさを上回るとき、前記第1の処理経路と第2の処理経路との両方に、前記アナログ信号を生成するために、前記デジタル入力信号を処理させ、
前記デジタル入力信号の前記大きさが前記閾値となる大きさを下回るとき、前記第2の処理経路に前記デジタル入力信号を全面的に処理させる
ように更に構成される、
請求項11に記載の処理システム。 - 前記コントローラは、
前記デジタル入力信号の前記大きさが前記閾値となる大きさを上回るとき、前記第1の処理経路と第2の処理経路との両方に、前記アナログ信号を生成するために、前記デジタル入力信号を処理させ、
前記デジタル入力信号の前記大きさが前記閾値となる大きさを下回るとき、前記第2の処理経路に前記デジタル入力信号を全面的に処理させる
ように更に構成される、
請求項1に記載の処理システム。 - 前記コントローラは、前記デジタル入力信号の前記大きさが前記閾値となる大きさを上回るとき、
前記第1の処理経路に特定の周波数を下回る前記デジタル入力信号の成分を処理させ、
前記第2の処理経路に前記特定の周波数を上回る前記デジタル入力信号の成分を処理させる
ように更に構成される、
請求項14に記載の処理システム。 - 第1の中間アナログ信号を、デジタル入力信号を前記第1の中間アナログ信号に変換するための、高電力状態及び低電力状態で動作するように構成される第1のデジタル/アナログ変換器を備える第1の処理経路によって生成することと、
第2の中間アナログ信号を、前記デジタル入力信号を前記第2の中間アナログ信号に変換するための第2のデジタル/アナログ変換器を備える第2の処理経路によって生成することと、
前記第1の中間アナログ信号と前記第2の中間アナログ信号との和を含むアナログ信号を生成することと、
前記デジタル入力信号が閾値となる大きさを下回るとき、前記第1のデジタル/アナログ変換器を前記低電力状態で動作させることと
を含む、方法。 - 前記第2のデジタル/アナログ変換器は、前記デジタル入力信号を前記第2の中間アナログ信号に変換するとき、前記デジタル入力信号を前記第1の中間アナログ信号に変換するときの前記第1のデジタル/アナログ変換器よりも少ない電力を消費する、請求項16に記載の方法。
- 前記第1のデジタル/アナログ変換器は、前記第2のデジタル/アナログ変換器によって前記第2の処理経路にもたらされるノイズに比べ、少ないノイズを前記第1の処理経路にもたらす、請求項16に記載の方法。
- 前記第2のデジタル/アナログ変換器は、各々がそれぞれの第1の端子において相互に連結され、各々がそれぞれの第2の端子において前記デジタル入力信号の単一ビットの値を示す信号を駆動する、対応するドライバに連結される複数の抵抗器を含む抵抗器ラダーを備える、請求項16に記載の方法。
- 前記デジタル入力信号の前記大きさが前記閾値となる大きさを下回るとき、前記第1の処理経路にほぼゼロの大きさを有する前記第1の中間アナログ信号を出力させることを更に含む、請求項16に記載の方法。
- 前記デジタル入力信号の前記大きさが前記閾値となる大きさを上回るとき、前記第2の処理経路にほぼゼロの大きさを有する前記第2の中間アナログ信号を出力させることを更に含む、請求項20に記載の方法。
- 第1の利得を前記第1の処理経路に適用することと、
第2の利得を前記第2の処理経路に適用することと、
前記デジタル入力信号の大きさが変化しても前記第1の利得と前記第2の利得の和が略一定に留まるように、前記第1の利得と前記第2の利得とを前記デジタル入力信号の前記大きさに基づいて変化させることと
を更に含む、請求項16に記載の方法。 - 前記デジタル入力信号の前記大きさが前記閾値となる大きさを上回るとき、
前記デジタル入力信号の前記大きさが上昇するにつれて前記第1の利得が上昇し、その逆も成り立ち、
前記デジタル入力信号の前記大きさが下降するにつれて前記第2の利得が上昇し、その逆も成り立つ
ように、前記第1の利得と前記第2の利得とを変化させること
を更に含む、請求項22に記載の方法。 - 前記閾値となる大きさを上回る前記デジタル入力信号の大きさに対して、前記第2のデジタル/アナログ変換器によってもたらされるノイズを前記第1のデジタル/アナログ変換器によって少なくとも部分的にキャンセルすることを更に含む、請求項16に記載の方法。
- 前記第1の処理経路が多段ノイズ・シェーピング構成の第1のステージを含み、前記第2の処理経路が前記多段ノイズ・シェーピング構成の第2のステージを含む、請求項16に記載の方法。
- 前記デジタル入力信号の大きさが前記閾値となる大きさを下回るとき、前記第1の処理経路にほぼゼロの大きさを有する前記第2の中間アナログ信号を出力させることを更に含む、請求項16に記載の方法。
- 前記デジタル入力信号の前記大きさが前記閾値となる大きさを下回るとき、前記多段ノイズ・シェーピング構成のステージを低電力モードで動作させることを更に含む、請求項26に記載の方法。
- 前記デジタル入力信号の前記大きさが前記閾値となる大きさを上回るとき、前記第1の処理経路と第2の処理経路との両方に、前記アナログ信号を生成するために、前記デジタル入力信号を処理させることと、
前記デジタル入力信号の前記大きさが前記閾値となる大きさを下回るとき、前記第2の処理経路に前記デジタル入力信号を全面的に処理させることと
を更に含む、請求項26に記載の方法。 - 前記デジタル入力信号の前記大きさが前記閾値となる大きさを上回るとき、前記第1の処理経路と第2の処理経路との両方に、前記アナログ信号を生成するために、前記デジタル入力信号を処理させることと、
前記デジタル入力信号の前記大きさが前記閾値となる大きさを下回るとき、前記第2の処理経路に前記デジタル入力信号を全面的に処理させることと
を更に含む、請求項16に記載の方法。 - 前記デジタル入力信号の前記大きさが前記閾値となる大きさを上回るとき、
前記第1の処理経路に特定の周波数を下回る前記デジタル入力信号の成分を処理させることと、
前記第2の処理経路に前記特定の周波数を上回る前記デジタル入力信号の成分を処理させることと
を更に含む、
請求項29に記載の方法。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201461979308P | 2014-04-14 | 2014-04-14 | |
US61/979,308 | 2014-04-14 | ||
US14/680,830 US9306588B2 (en) | 2014-04-14 | 2015-04-07 | Switchable secondary playback path |
US14/680,830 | 2015-04-07 | ||
PCT/US2015/025329 WO2015160655A1 (en) | 2014-04-14 | 2015-04-10 | Switchable secondary playback path |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2019110557A Division JP7240962B2 (ja) | 2014-04-14 | 2019-06-13 | 切換可能な2次再生経路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2017516389A true JP2017516389A (ja) | 2017-06-15 |
JP6545707B2 JP6545707B2 (ja) | 2019-07-17 |
Family
ID=54265928
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016562946A Expired - Fee Related JP6545707B2 (ja) | 2014-04-14 | 2015-04-10 | 切換可能な2次再生経路 |
JP2019110557A Active JP7240962B2 (ja) | 2014-04-14 | 2019-06-13 | 切換可能な2次再生経路 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2019110557A Active JP7240962B2 (ja) | 2014-04-14 | 2019-06-13 | 切換可能な2次再生経路 |
Country Status (6)
Country | Link |
---|---|
US (2) | US9306588B2 (ja) |
EP (1) | EP3132541B1 (ja) |
JP (2) | JP6545707B2 (ja) |
KR (2) | KR102197272B1 (ja) |
CN (2) | CN110417414B (ja) |
WO (1) | WO2015160655A1 (ja) |
Families Citing this family (49)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9391576B1 (en) | 2013-09-05 | 2016-07-12 | Cirrus Logic, Inc. | Enhancement of dynamic range of audio signal path |
US9831843B1 (en) | 2013-09-05 | 2017-11-28 | Cirrus Logic, Inc. | Opportunistic playback state changes for audio devices |
US9525940B1 (en) | 2014-03-05 | 2016-12-20 | Cirrus Logic, Inc. | Multi-path analog front end and analog-to-digital converter for a signal processing system |
US9774342B1 (en) | 2014-03-05 | 2017-09-26 | Cirrus Logic, Inc. | Multi-path analog front end and analog-to-digital converter for a signal processing system |
US10284217B1 (en) | 2014-03-05 | 2019-05-07 | Cirrus Logic, Inc. | Multi-path analog front end and analog-to-digital converter for a signal processing system |
US9306588B2 (en) | 2014-04-14 | 2016-04-05 | Cirrus Logic, Inc. | Switchable secondary playback path |
US10785568B2 (en) | 2014-06-26 | 2020-09-22 | Cirrus Logic, Inc. | Reducing audio artifacts in a system for enhancing dynamic range of audio signal path |
US9337795B2 (en) | 2014-09-09 | 2016-05-10 | Cirrus Logic, Inc. | Systems and methods for gain calibration of an audio signal path |
US9596537B2 (en) | 2014-09-11 | 2017-03-14 | Cirrus Logic, Inc. | Systems and methods for reduction of audio artifacts in an audio system with dynamic range enhancement |
US9503027B2 (en) | 2014-10-27 | 2016-11-22 | Cirrus Logic, Inc. | Systems and methods for dynamic range enhancement using an open-loop modulator in parallel with a closed-loop modulator |
US9584911B2 (en) | 2015-03-27 | 2017-02-28 | Cirrus Logic, Inc. | Multichip dynamic range enhancement (DRE) audio processing methods and apparatuses |
US9959856B2 (en) | 2015-06-15 | 2018-05-01 | Cirrus Logic, Inc. | Systems and methods for reducing artifacts and improving performance of a multi-path analog-to-digital converter |
EP3360256A1 (en) * | 2015-10-09 | 2018-08-15 | TDK Corporation | Electronic circuit for a microphone and microphone |
US9955254B2 (en) | 2015-11-25 | 2018-04-24 | Cirrus Logic, Inc. | Systems and methods for preventing distortion due to supply-based modulation index changes in an audio playback system |
US9543975B1 (en) | 2015-12-29 | 2017-01-10 | Cirrus Logic, Inc. | Multi-path analog front end and analog-to-digital converter for a signal processing system with low-pass filter between paths |
US9880802B2 (en) | 2016-01-21 | 2018-01-30 | Cirrus Logic, Inc. | Systems and methods for reducing audio artifacts from switching between paths of a multi-path signal processing system |
EP3703254B1 (en) | 2016-04-06 | 2022-02-16 | Goodix Technology (HK) Company Limited | Audio amplifier system |
US10128803B2 (en) | 2016-04-22 | 2018-11-13 | Cirrus Logic, Inc. | Systems and methods for predictive switching in audio amplifiers |
US10483924B2 (en) | 2016-04-22 | 2019-11-19 | Cirrus Logic, Inc. | Systems and methods for predictive switching in audio amplifiers |
US9998826B2 (en) | 2016-06-28 | 2018-06-12 | Cirrus Logic, Inc. | Optimization of performance and power in audio system |
US10545561B2 (en) | 2016-08-10 | 2020-01-28 | Cirrus Logic, Inc. | Multi-path digitation based on input signal fidelity and output requirements |
US10263630B2 (en) | 2016-08-11 | 2019-04-16 | Cirrus Logic, Inc. | Multi-path analog front end with adaptive path |
US9813814B1 (en) | 2016-08-23 | 2017-11-07 | Cirrus Logic, Inc. | Enhancing dynamic range based on spectral content of signal |
US9780800B1 (en) | 2016-09-19 | 2017-10-03 | Cirrus Logic, Inc. | Matching paths in a multiple path analog-to-digital converter |
US9762255B1 (en) | 2016-09-19 | 2017-09-12 | Cirrus Logic, Inc. | Reconfiguring paths in a multiple path analog-to-digital converter |
US9929703B1 (en) | 2016-09-27 | 2018-03-27 | Cirrus Logic, Inc. | Amplifier with configurable final output stage |
US9967665B2 (en) | 2016-10-05 | 2018-05-08 | Cirrus Logic, Inc. | Adaptation of dynamic range enhancement based on noise floor of signal |
US10680640B2 (en) * | 2016-12-21 | 2020-06-09 | Cirrus Logic, Inc. | Power-saving current-mode digital-to-analog converter (DAC) |
CN110651430B (zh) * | 2017-03-03 | 2023-07-07 | 思睿逻辑国际半导体有限公司 | 数字pwm调制器 |
US10321230B2 (en) * | 2017-04-07 | 2019-06-11 | Cirrus Logic, Inc. | Switching in an audio system with multiple playback paths |
US10008992B1 (en) | 2017-04-14 | 2018-06-26 | Cirrus Logic, Inc. | Switching in amplifier with configurable final output stage |
US9917557B1 (en) | 2017-04-17 | 2018-03-13 | Cirrus Logic, Inc. | Calibration for amplifier with configurable final output stage |
US11625214B2 (en) * | 2017-11-29 | 2023-04-11 | Cirrus Logic, Inc. | Variable performance codec |
US10944418B2 (en) * | 2018-01-26 | 2021-03-09 | Mediatek Inc. | Analog-to-digital converter capable of generate digital output signal having different bits |
US10763883B2 (en) * | 2018-05-30 | 2020-09-01 | Maxlinear, Inc. | Digital-to-analog converter with integrated comb filter |
CN108896815B (zh) * | 2018-06-29 | 2020-09-08 | 合容电气股份有限公司 | 一种开启式无线电流互感器转换器及信号转换方法 |
US10763811B2 (en) * | 2018-07-25 | 2020-09-01 | Cirrus Logic, Inc. | Gain control in a class-D open-loop amplifier |
US10833697B2 (en) * | 2018-09-06 | 2020-11-10 | Mediatek Singapore Pte. Ltd. | Methods and circuits for suppressing quantization noise in digital-to-analog converters |
US10972123B1 (en) * | 2019-05-09 | 2021-04-06 | Dialog Semiconductor B.V. | Signal processing structure |
US10848174B1 (en) | 2019-05-09 | 2020-11-24 | Dialog Semiconductor B.V. | Digital filter |
US10861433B1 (en) | 2019-05-09 | 2020-12-08 | Dialog Semiconductor B.V. | Quantizer |
US11107453B2 (en) | 2019-05-09 | 2021-08-31 | Dialog Semiconductor B.V. | Anti-noise signal generator |
US11329634B1 (en) | 2019-05-09 | 2022-05-10 | Dialog Semiconductor B.V. | Digital filter structure |
US10784890B1 (en) | 2019-05-09 | 2020-09-22 | Dialog Semiconductor B.V. | Signal processor |
JP6996768B2 (ja) * | 2019-10-31 | 2022-01-17 | 株式会社ニューギン | 遊技機 |
CN113630093B (zh) * | 2020-05-09 | 2023-07-18 | 博通集成电路(上海)股份有限公司 | 功率放大器和过流保护电路 |
KR20230034785A (ko) * | 2021-09-03 | 2023-03-10 | 삼성전자주식회사 | 디지털-아날로그 변환기 및 이를 포함하는 장치 |
US11706062B1 (en) | 2021-11-24 | 2023-07-18 | Dialog Semiconductor B.V. | Digital filter |
CN116090570B (zh) * | 2023-04-12 | 2024-02-23 | 本源量子计算科技(合肥)股份有限公司 | 一种量子位状态调控电路、测控电路及量子计算机 |
Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61177819A (ja) * | 1985-02-04 | 1986-08-09 | Nippon Telegr & Teleph Corp <Ntt> | オ−バ−サンプリング形デイジタル・アナログ変換器 |
JPS6465929A (en) * | 1987-09-04 | 1989-03-13 | Nippon Electric Ic Microcomput | Current output type d/a converter |
JPH0470215A (ja) * | 1990-07-11 | 1992-03-05 | Sony Corp | D/a変換器 |
JPH0730426A (ja) * | 1993-07-06 | 1995-01-31 | Matsushita Electric Ind Co Ltd | D/a変換装置 |
JPH08162957A (ja) * | 1994-12-12 | 1996-06-21 | Matsushita Electric Ind Co Ltd | D/a変換装置 |
JPH09289450A (ja) * | 1996-04-19 | 1997-11-04 | Advantest Corp | Daコンバータ |
JPH1141100A (ja) * | 1997-07-18 | 1999-02-12 | Matsushita Electric Ind Co Ltd | ディジタル・アナログ変換装置 |
JPH1188181A (ja) * | 1997-09-12 | 1999-03-30 | Matsushita Electric Ind Co Ltd | D/a変換装置 |
JPH11308109A (ja) * | 1997-11-14 | 1999-11-05 | Yamaha Corp | D/a変換装置 |
JP2010056587A (ja) * | 2008-08-26 | 2010-03-11 | Yokogawa Electric Corp | Da変換装置 |
US20120286984A1 (en) * | 2011-05-13 | 2012-11-15 | Infineon Technologies Ag | Digital-to-Analog Conversion Arrangement with Power Range Dependent D/A Converter Selection |
US20150214974A1 (en) * | 2014-01-29 | 2015-07-30 | Broadcom Corporation | Digital to analog converter with thermometer coding and methods for use therewith |
Family Cites Families (127)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL274298A (ja) | 1961-02-02 | |||
JPS5441655Y2 (ja) * | 1974-04-01 | 1979-12-05 | ||
GB1599401A (en) | 1978-04-18 | 1981-09-30 | Nat Res Dev | Input signal level control for communications channels |
US4446440A (en) | 1982-01-26 | 1984-05-01 | Hewlett-Packard Company | Dual mode amplifier |
JPS58142614A (ja) | 1982-02-18 | 1983-08-24 | Sony Corp | 利得制御装置 |
US4493091A (en) | 1982-05-05 | 1985-01-08 | Dolby Laboratories Licensing Corporation | Analog and digital signal apparatus |
US4972436A (en) | 1988-10-14 | 1990-11-20 | Hayes Microcomputer Products, Inc. | High performance sigma delta based analog modem front end |
US5111506A (en) | 1989-03-02 | 1992-05-05 | Ensonig Corporation | Power efficient hearing aid |
JPH065819B2 (ja) | 1989-06-29 | 1994-01-19 | ヤマハ株式会社 | A/d変換装置 |
US4999830A (en) | 1989-09-25 | 1991-03-12 | At&T Bell Laboratories | Communication system analog-to-digital converter using echo information to improve resolution |
US5148167A (en) | 1990-04-06 | 1992-09-15 | General Electric Company | Sigma-delta oversampled analog-to-digital converter network with chopper stabilization |
US5323159A (en) | 1990-04-20 | 1994-06-21 | Nakamichi Corporation | Digital/analog converter |
JP2579555B2 (ja) * | 1990-08-31 | 1997-02-05 | ナカミチ株式会社 | ディジタル/アナログ変換装置 |
JP2579556B2 (ja) * | 1990-08-31 | 1997-02-05 | ナカミチ株式会社 | ディジタル/アナログ変換装置 |
JPH04150416A (ja) * | 1990-10-12 | 1992-05-22 | Pioneer Electron Corp | ディジタル・アナログ変換器 |
US5198814A (en) * | 1990-11-28 | 1993-03-30 | Nec Corporation | Digital-to-analog converter with conversion error compensation |
US5810477A (en) | 1993-04-30 | 1998-09-22 | International Business Machines Corporation | System for identifying surface conditions of a moving medium |
JP3147605B2 (ja) * | 1993-09-06 | 2001-03-19 | 松下電器産業株式会社 | D/a変換装置 |
DE19502047C2 (de) | 1995-01-12 | 1996-12-05 | Stage Tec Gmbh | Verfahren zur Analog-Digital-Wandlung von Signalen |
US5600317A (en) | 1994-06-14 | 1997-02-04 | Stage Tec Entwicklungsgesellschaft Fur Professionelle Audiotechnik Mbh | Apparatus for the conversion of analog audio signals to a digital data stream |
US5550923A (en) | 1994-09-02 | 1996-08-27 | Minnesota Mining And Manufacturing Company | Directional ear device with adaptive bandwidth and gain control |
JPH09130245A (ja) | 1995-11-06 | 1997-05-16 | Sony Corp | ゲイン可変回路 |
JPH10257583A (ja) | 1997-03-06 | 1998-09-25 | Asahi Chem Ind Co Ltd | 音声処理装置およびその音声処理方法 |
US6088461A (en) | 1997-09-26 | 2000-07-11 | Crystal Semiconductor Corporation | Dynamic volume control system |
US6542612B1 (en) | 1997-10-03 | 2003-04-01 | Alan W. Needham | Companding amplifier with sidechannel gain control |
JPH11340831A (ja) | 1998-05-29 | 1999-12-10 | Toa Corp | 高精度a/d変換器 |
JP2000029736A (ja) | 1998-07-13 | 2000-01-28 | Oki Electric Ind Co Ltd | 半導体集積回路 |
US6271780B1 (en) | 1998-10-08 | 2001-08-07 | Cirrus Logic, Inc. | Gain ranging analog-to-digital converter with error correction |
US6229390B1 (en) | 1999-03-09 | 2001-05-08 | Tripath Technology, Inc. | Methods and apparatus for noise shaping a mixed signal power output |
DE10021824C2 (de) | 1999-05-07 | 2002-01-31 | Yamaha Corp | D/A-Wandlervorrichtung und D/A-Wandlerverfahren |
US7020892B2 (en) | 1999-09-03 | 2006-03-28 | Lsi Logic Corporation | Time-shifted video signal processing |
EP1119145A1 (en) | 2000-01-20 | 2001-07-25 | TELEFONAKTIEBOLAGET LM ERICSSON (publ) | Parallel decision feedback equalizer with adaptive thresholding based on noise estimates |
US6407689B1 (en) | 2000-11-01 | 2002-06-18 | Qualcomm, Incorporated | Method and apparatus for controlling stages of a multi-stage circuit |
US6768443B2 (en) | 2000-11-30 | 2004-07-27 | John Willis | Switch capacitor circuit and applications thereof |
US6943548B1 (en) | 2001-06-22 | 2005-09-13 | Fonar Corporation | Adaptive dynamic range receiver for MRI |
US6888888B1 (en) | 2001-06-26 | 2005-05-03 | Microsoft Corporation | Simultaneous tuning of multiple channels using intermediate frequency sub-sampling |
KR101118922B1 (ko) | 2002-06-05 | 2012-06-29 | 에이알씨 인터내셔날 피엘씨 | 음향 가상 현실 엔진 및 전달 사운드 확장을 위한 향상된 기술들 |
JP2004072714A (ja) | 2002-06-11 | 2004-03-04 | Rohm Co Ltd | クロック生成システム |
JP4150416B2 (ja) | 2002-06-14 | 2008-09-17 | ユニチカテキスタイル株式会社 | 洗濯可能な羽毛掛け布団 |
US6765436B1 (en) | 2002-09-04 | 2004-07-20 | Cirrus Logic, Inc. | Power supply based audio compression for digital audio amplifier |
US6639531B1 (en) * | 2002-09-27 | 2003-10-28 | Cirrus Logic, Inc. | Cascaded noise shaping circuits with low out-of-band noise and methods and systems using the same |
US7167112B2 (en) | 2003-03-21 | 2007-01-23 | D2Audio Corporation | Systems and methods for implementing a sample rate converter using hardware and software to maximize speed and flexibility |
US7023268B1 (en) | 2003-03-21 | 2006-04-04 | D2Audio Corporation | Systems and methods for automatically adjusting channel timing |
US7590251B2 (en) | 2003-03-21 | 2009-09-15 | D2Audio Corporation | Clip detection in PWM amplifier |
US7061312B2 (en) | 2003-03-21 | 2006-06-13 | D2Audio Corporation | Systems and methods for providing multi channel pulse width modulated audio with staggered outputs |
JP4486646B2 (ja) | 2003-05-28 | 2010-06-23 | ドルビー・ラボラトリーズ・ライセンシング・コーポレーション | オーディオ信号の感知音量を計算し調整する方法、装置及びコンピュータプログラム |
US6822595B1 (en) * | 2003-06-18 | 2004-11-23 | Northrop Grumman Corporation | Extended range digital-to-analog conversion |
US6897794B2 (en) * | 2003-07-03 | 2005-05-24 | Texas Instruments Incorporated | All-analog calibration of sting-DAC linearity: application to high voltage processes |
US7522677B2 (en) | 2003-10-21 | 2009-04-21 | Texas Instruments Incorporated | Receiver with low power listen mode in a wireless local area network |
JP4241443B2 (ja) | 2004-03-10 | 2009-03-18 | ソニー株式会社 | 音声信号処理装置、音声信号処理方法 |
EP1771948A1 (en) * | 2004-04-30 | 2007-04-11 | Interuniversitair Microelektronica Centrum ( Imec) | Digital-to-analogue converter system with increased performance |
US7773702B2 (en) | 2004-05-03 | 2010-08-10 | Qualcomm Incorporated | Gain control for a receiver in a multi-carrier communication system |
US7116259B2 (en) * | 2004-05-18 | 2006-10-03 | Broadcom Corporation | Switching between lower and higher power modes in an ADC for lower/higher precision operations |
US7215266B2 (en) | 2004-05-21 | 2007-05-08 | Wionics Research | Hybrid DC offset cancellation scheme for wireless receiver |
US7161970B2 (en) | 2004-09-10 | 2007-01-09 | Ftd Solutions Pte, Ltd. | Spread spectrum clock generator |
US7312734B2 (en) | 2005-02-07 | 2007-12-25 | Analog Devices, Inc. | Calibratable analog-to-digital converter system |
WO2006102313A2 (en) | 2005-03-18 | 2006-09-28 | The Trustees Of Columbia University In The City Of New York | Systems and methods for companding adc-dsp-dac combinations |
JP4588546B2 (ja) * | 2005-06-13 | 2010-12-01 | 株式会社ケンウッド | 振幅可変装置および振幅可変方法 |
US7202731B2 (en) | 2005-06-17 | 2007-04-10 | Visteon Global Technologies, Inc. | Variable distortion limiter using clip detect predictor |
EP1753130B1 (en) | 2005-08-10 | 2009-06-10 | Emma Mixed Signal C.V. | Analog-to-digital converter with dynamic range extension |
US7679538B2 (en) * | 2005-08-12 | 2010-03-16 | Tsang Robin M | Current-steering type digital-to-analog converter |
US7259618B2 (en) | 2005-08-25 | 2007-08-21 | D2Audio Corporation | Systems and methods for load detection and correction in a digital amplifier |
JP2007133035A (ja) | 2005-11-08 | 2007-05-31 | Sony Corp | デジタル録音装置,デジタル録音方法,そのプログラムおよび記憶媒体 |
GB2432982A (en) | 2005-11-30 | 2007-06-06 | Toshiba Res Europ Ltd | An EER RF amplifier with PWM signal switching |
US8036402B2 (en) | 2005-12-15 | 2011-10-11 | Harman International Industries, Incorporated | Distortion compensation |
JP4155316B2 (ja) * | 2006-06-30 | 2008-09-24 | ソニー株式会社 | D/a変換回路、液晶駆動回路及び液晶表示装置 |
US8139112B2 (en) | 2006-08-07 | 2012-03-20 | Sightlogix, Inc. | Methods and apparatus related to improved surveillance |
US8126164B2 (en) | 2006-11-29 | 2012-02-28 | Texas Instruments Incorporated | Digital compensation of analog volume control gain in a digital audio amplifier |
JP2008167058A (ja) | 2006-12-27 | 2008-07-17 | Rohm Co Ltd | 受信回路、受信方法およびそれらを利用した無線装置 |
JP4789211B2 (ja) | 2007-01-16 | 2011-10-12 | ルネサスエレクトロニクス株式会社 | バンドパスδς変調器により構成されたa/d変換器を含む半導体集積回路 |
JP2008294803A (ja) | 2007-05-25 | 2008-12-04 | Kenwood Corp | 再生装置および再生方法 |
JP2008306535A (ja) | 2007-06-08 | 2008-12-18 | Sony Corp | 音声信号処理装置、遅延時間の設定方法 |
US9402062B2 (en) | 2007-07-18 | 2016-07-26 | Mediatek Inc. | Digital television chip, system and method thereof |
US20090058531A1 (en) | 2007-08-31 | 2009-03-05 | Nanoamp Solutions Inc. (Cayman) | Variable gain amplifier |
EP2043149A1 (en) | 2007-09-27 | 2009-04-01 | Oticon A/S | Assembly comprising an electromagnetically screened smd component, method of manufacturing the same and use |
US9425747B2 (en) | 2008-03-03 | 2016-08-23 | Qualcomm Incorporated | System and method of reducing power consumption for audio playback |
EP2141819A1 (en) | 2008-07-04 | 2010-01-06 | Telefonaktiebolaget LM Ericsson (publ) | Signal processing device and method |
US8942388B2 (en) | 2008-08-08 | 2015-01-27 | Yamaha Corporation | Modulation device and demodulation device |
US7952502B2 (en) | 2008-08-29 | 2011-05-31 | Broadcom Corporation | Imbalance and distortion cancellation for composite analog to digital converter (ADC) |
JP5521441B2 (ja) | 2008-09-29 | 2014-06-11 | ソニー株式会社 | 固体撮像装置とその駆動方法、並びに電子機器 |
EP2207264B1 (en) | 2009-01-09 | 2013-10-30 | AKG Acoustics GmbH | Analogue to digital converting |
US8330631B2 (en) | 2009-03-06 | 2012-12-11 | National Semiconductor Corporation | Background calibration method for fixed gain amplifiers |
DE102009012562A1 (de) | 2009-03-11 | 2010-09-16 | Rohde & Schwarz Gmbh & Co. Kg | Vorrichtung zum Analog-Digital-Wandeln von Signalen in einem großen Dynamikbereich |
US7893856B2 (en) * | 2009-04-15 | 2011-02-22 | Telefonaktiebolaget Lm Ericsson (Publ) | Digital-to-analog conversion circuit |
US8302047B2 (en) | 2009-05-06 | 2012-10-30 | Texas Instruments Incorporated | Statistical static timing analysis in non-linear regions |
US8306134B2 (en) | 2009-07-17 | 2012-11-06 | Anritsu Company | Variable gain control for high speed receivers |
US8060663B2 (en) | 2009-07-30 | 2011-11-15 | Lsi Corporation | Physical layer interface for computing devices |
US7961130B2 (en) | 2009-08-03 | 2011-06-14 | Intersil Americas Inc. | Data look ahead to reduce power consumption |
GB0917060D0 (en) | 2009-09-29 | 2009-11-11 | Qinetiq Ltd | Methods and apparatus for use in quantum key distribution |
CN102045478B (zh) | 2009-10-23 | 2013-05-01 | 精工爱普生株式会社 | 图像读取装置、校正处理方法及用该装置的图像处理方法 |
US20120047535A1 (en) | 2009-12-31 | 2012-02-23 | Broadcom Corporation | Streaming transcoder with adaptive upstream & downstream transcode coordination |
US8494180B2 (en) | 2010-01-08 | 2013-07-23 | Intersil Americas Inc. | Systems and methods to reduce idle channel current and noise floor in a PWM amplifier |
US8295510B2 (en) | 2010-03-16 | 2012-10-23 | Sound Cheers Limited | Power-saving amplifying device |
JP4983949B2 (ja) | 2010-03-31 | 2012-07-25 | ブラザー工業株式会社 | 画像読取装置 |
US8717211B2 (en) | 2010-11-30 | 2014-05-06 | Qualcomm Incorporated | Adaptive gain adjustment system |
US9119159B2 (en) | 2011-01-10 | 2015-08-25 | Qualcomm Incorporated | Battery power monitoring and audio signal attenuation |
US8362936B2 (en) | 2011-01-21 | 2013-01-29 | Maxim Integrated Products, Inc. | Circuit and method for optimizing dynamic range in a digital to analog signal path |
JP5926490B2 (ja) | 2011-02-10 | 2016-05-25 | キヤノン株式会社 | 音声処理装置 |
US8325074B2 (en) | 2011-03-22 | 2012-12-04 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and circuit for continuous-time delta-sigma DAC with reduced noise |
US8848639B2 (en) | 2011-04-18 | 2014-09-30 | Broadcom Corporation | Frequency selective transmission within single user, multiple user, multiple access, and/or MIMO wireless communications |
EP2521263B1 (en) | 2011-05-02 | 2018-09-05 | ams AG | Control circuit arrangement for pulse-width modulated DC/DC converters and method for controlling a pulse-width modulated converter |
FR2976427A1 (fr) * | 2011-06-10 | 2012-12-14 | Thales Sa | Systeme de reception comprenant un mecanisme contre les interferences pulsees. |
WO2013046303A1 (ja) | 2011-09-26 | 2013-04-04 | 富士通株式会社 | アンプ回路及びアンプ回路の出力生成方法 |
JP2013098691A (ja) | 2011-10-31 | 2013-05-20 | Ricoh Co Ltd | 音量調整回路 |
US9065413B2 (en) | 2012-01-25 | 2015-06-23 | Texas Instruments Incorporated | Method and apparatus for circuit with low IC power dissipation and high dynamic range |
US8873182B2 (en) | 2012-03-09 | 2014-10-28 | Lsi Corporation | Multi-path data processing system |
JP5835031B2 (ja) | 2012-03-13 | 2015-12-24 | 株式会社ソシオネクスト | アナログデジタル変換器(adc),その補正回路およびその補正方法 |
US20140105273A1 (en) | 2012-10-15 | 2014-04-17 | Broadcom Corporation | Adaptive power management within media delivery system |
US8805297B2 (en) | 2012-10-16 | 2014-08-12 | Raytheon Company | Band stitching electronic circuits and techniques |
GB2507096B (en) | 2012-10-19 | 2016-03-23 | Cirrus Logic Int Semiconductor Ltd | Digital/analogue conversion |
US9210270B2 (en) | 2012-11-15 | 2015-12-08 | Qualcomm Incorporated | Echo cancellation for ultrasound |
JP6129348B2 (ja) | 2013-01-21 | 2017-05-17 | ドルビー ラボラトリーズ ライセンシング コーポレイション | 異なる再生装置を横断するラウドネスおよびダイナミックレンジの最適化 |
US8952837B2 (en) * | 2013-02-28 | 2015-02-10 | Broadcom Corporation | Multi-rate sigma delta digital-to-analog converter |
US8929163B2 (en) | 2013-03-15 | 2015-01-06 | Micron Technology, Inc. | Input buffer apparatuses and methods |
CN105359338B (zh) | 2013-07-02 | 2018-11-02 | 维斯普瑞公司 | 滤波天线***、设备以及方法 |
US9391576B1 (en) | 2013-09-05 | 2016-07-12 | Cirrus Logic, Inc. | Enhancement of dynamic range of audio signal path |
US9130587B2 (en) * | 2014-01-29 | 2015-09-08 | Broadcom Corporation | Frame adaptive digital to analog converter and methods for use therewith |
US9525940B1 (en) | 2014-03-05 | 2016-12-20 | Cirrus Logic, Inc. | Multi-path analog front end and analog-to-digital converter for a signal processing system |
US9306588B2 (en) | 2014-04-14 | 2016-04-05 | Cirrus Logic, Inc. | Switchable secondary playback path |
GB2527637B (en) | 2014-04-14 | 2018-08-08 | Cirrus Logic Inc | Switchable secondary playback path |
US10785568B2 (en) | 2014-06-26 | 2020-09-22 | Cirrus Logic, Inc. | Reducing audio artifacts in a system for enhancing dynamic range of audio signal path |
US9337795B2 (en) | 2014-09-09 | 2016-05-10 | Cirrus Logic, Inc. | Systems and methods for gain calibration of an audio signal path |
US9596537B2 (en) | 2014-09-11 | 2017-03-14 | Cirrus Logic, Inc. | Systems and methods for reduction of audio artifacts in an audio system with dynamic range enhancement |
US9503027B2 (en) | 2014-10-27 | 2016-11-22 | Cirrus Logic, Inc. | Systems and methods for dynamic range enhancement using an open-loop modulator in parallel with a closed-loop modulator |
US9584911B2 (en) | 2015-03-27 | 2017-02-28 | Cirrus Logic, Inc. | Multichip dynamic range enhancement (DRE) audio processing methods and apparatuses |
US9959856B2 (en) | 2015-06-15 | 2018-05-01 | Cirrus Logic, Inc. | Systems and methods for reducing artifacts and improving performance of a multi-path analog-to-digital converter |
US9543975B1 (en) | 2015-12-29 | 2017-01-10 | Cirrus Logic, Inc. | Multi-path analog front end and analog-to-digital converter for a signal processing system with low-pass filter between paths |
-
2015
- 2015-04-07 US US14/680,830 patent/US9306588B2/en active Active
- 2015-04-10 JP JP2016562946A patent/JP6545707B2/ja not_active Expired - Fee Related
- 2015-04-10 EP EP15721387.7A patent/EP3132541B1/en active Active
- 2015-04-10 WO PCT/US2015/025329 patent/WO2015160655A1/en active Application Filing
- 2015-04-10 KR KR1020167031554A patent/KR102197272B1/ko active Application Filing
- 2015-04-10 CN CN201910709562.6A patent/CN110417414B/zh active Active
- 2015-04-10 KR KR1020207037207A patent/KR102302839B1/ko active IP Right Grant
- 2015-04-10 CN CN201580031485.3A patent/CN106416080B/zh active Active
-
2016
- 2016-02-23 US US15/050,857 patent/US9680488B2/en active Active
-
2019
- 2019-06-13 JP JP2019110557A patent/JP7240962B2/ja active Active
Patent Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61177819A (ja) * | 1985-02-04 | 1986-08-09 | Nippon Telegr & Teleph Corp <Ntt> | オ−バ−サンプリング形デイジタル・アナログ変換器 |
JPS6465929A (en) * | 1987-09-04 | 1989-03-13 | Nippon Electric Ic Microcomput | Current output type d/a converter |
JPH0470215A (ja) * | 1990-07-11 | 1992-03-05 | Sony Corp | D/a変換器 |
JPH0730426A (ja) * | 1993-07-06 | 1995-01-31 | Matsushita Electric Ind Co Ltd | D/a変換装置 |
JPH08162957A (ja) * | 1994-12-12 | 1996-06-21 | Matsushita Electric Ind Co Ltd | D/a変換装置 |
JPH09289450A (ja) * | 1996-04-19 | 1997-11-04 | Advantest Corp | Daコンバータ |
JPH1141100A (ja) * | 1997-07-18 | 1999-02-12 | Matsushita Electric Ind Co Ltd | ディジタル・アナログ変換装置 |
JPH1188181A (ja) * | 1997-09-12 | 1999-03-30 | Matsushita Electric Ind Co Ltd | D/a変換装置 |
JPH11308109A (ja) * | 1997-11-14 | 1999-11-05 | Yamaha Corp | D/a変換装置 |
JP2010056587A (ja) * | 2008-08-26 | 2010-03-11 | Yokogawa Electric Corp | Da変換装置 |
US20120286984A1 (en) * | 2011-05-13 | 2012-11-15 | Infineon Technologies Ag | Digital-to-Analog Conversion Arrangement with Power Range Dependent D/A Converter Selection |
US20150214974A1 (en) * | 2014-01-29 | 2015-07-30 | Broadcom Corporation | Digital to analog converter with thermometer coding and methods for use therewith |
Also Published As
Publication number | Publication date |
---|---|
KR20200145865A (ko) | 2020-12-30 |
CN110417414A (zh) | 2019-11-05 |
WO2015160655A1 (en) | 2015-10-22 |
JP7240962B2 (ja) | 2023-03-16 |
US9306588B2 (en) | 2016-04-05 |
CN110417414B (zh) | 2022-11-11 |
JP6545707B2 (ja) | 2019-07-17 |
US20160173112A1 (en) | 2016-06-16 |
US20150295584A1 (en) | 2015-10-15 |
EP3132541B1 (en) | 2018-06-06 |
CN106416080B (zh) | 2019-08-30 |
EP3132541A1 (en) | 2017-02-22 |
US9680488B2 (en) | 2017-06-13 |
CN106416080A (zh) | 2017-02-15 |
KR20160144460A (ko) | 2016-12-16 |
KR102302839B1 (ko) | 2021-09-17 |
JP2019198086A (ja) | 2019-11-14 |
KR102197272B1 (ko) | 2020-12-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP7240962B2 (ja) | 切換可能な2次再生経路 | |
GB2527637A (en) | Switchable secondary playback path | |
US10720888B2 (en) | Systems and methods for dynamic range enhancement using an open-loop modulator in parallel with a closed-loop modulator | |
US9596537B2 (en) | Systems and methods for reduction of audio artifacts in an audio system with dynamic range enhancement | |
GB2563093A (en) | Analogue signal paths | |
US20200389731A1 (en) | Low-latency audio output with variable group delay | |
CN114006586A (zh) | 双路径脉宽调制***的校准 | |
KR102374789B1 (ko) | 차지 펌프 잡음을 감소시키기 위한 신호 경로의 잡음 전달 함수의 제어 | |
CN112655149B (zh) | 具有闭环脉冲宽度调制驱动器的播放路径中的可变输出电阻 | |
US11438697B2 (en) | Low-latency audio output with variable group delay |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20171013 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20180925 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20181002 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20181221 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20190521 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20190619 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6545707 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |