JP2012079785A - 絶縁膜の改質方法 - Google Patents

絶縁膜の改質方法 Download PDF

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Publication number
JP2012079785A
JP2012079785A JP2010221269A JP2010221269A JP2012079785A JP 2012079785 A JP2012079785 A JP 2012079785A JP 2010221269 A JP2010221269 A JP 2010221269A JP 2010221269 A JP2010221269 A JP 2010221269A JP 2012079785 A JP2012079785 A JP 2012079785A
Authority
JP
Japan
Prior art keywords
plasma
silicon oxynitride
processing
insulating film
oxynitride film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2010221269A
Other languages
English (en)
Japanese (ja)
Inventor
Yoshinori Osaki
良規 大▲崎▼
哲朗 ▲高▼橋
Tetsuro Takahashi
Koji Maekawa
浩治 前川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP2010221269A priority Critical patent/JP2012079785A/ja
Priority to TW100135001A priority patent/TW201234480A/zh
Priority to CN2011103036957A priority patent/CN102446728A/zh
Priority to KR1020110098798A priority patent/KR101270875B1/ko
Publication of JP2012079785A publication Critical patent/JP2012079785A/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02329—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
    • H01L21/02332—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen into an oxide layer, e.g. changing SiO to SiON
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2010221269A 2010-09-30 2010-09-30 絶縁膜の改質方法 Pending JP2012079785A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2010221269A JP2012079785A (ja) 2010-09-30 2010-09-30 絶縁膜の改質方法
TW100135001A TW201234480A (en) 2010-09-30 2011-09-28 Method of modifying insulating film
CN2011103036957A CN102446728A (zh) 2010-09-30 2011-09-29 绝缘膜的改性方法
KR1020110098798A KR101270875B1 (ko) 2010-09-30 2011-09-29 절연막의 개질 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010221269A JP2012079785A (ja) 2010-09-30 2010-09-30 絶縁膜の改質方法

Publications (1)

Publication Number Publication Date
JP2012079785A true JP2012079785A (ja) 2012-04-19

Family

ID=46009127

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010221269A Pending JP2012079785A (ja) 2010-09-30 2010-09-30 絶縁膜の改質方法

Country Status (4)

Country Link
JP (1) JP2012079785A (ko)
KR (1) KR101270875B1 (ko)
CN (1) CN102446728A (ko)
TW (1) TW201234480A (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112543990A (zh) * 2018-08-02 2021-03-23 株式会社富士 大气压等离子体发生装置

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6040609B2 (ja) * 2012-07-20 2016-12-07 東京エレクトロン株式会社 成膜装置及び成膜方法
GB201615272D0 (en) * 2016-09-08 2016-10-26 Johnson Matthey Plc Method
US11450578B2 (en) * 2018-04-27 2022-09-20 Tokyo Electron Limited Substrate processing system and substrate processing method

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004253777A (ja) * 2003-01-31 2004-09-09 Nec Electronics Corp 半導体装置及び半導体装置の製造方法
JP2005235792A (ja) * 2002-02-27 2005-09-02 Tokyo Electron Ltd 基板処理方法
WO2008081724A1 (ja) * 2006-12-28 2008-07-10 Tokyo Electron Limited 絶縁膜の形成方法および半導体装置の製造方法
JP2008535243A (ja) * 2005-03-30 2008-08-28 東京エレクトロン株式会社 酸窒化層を形成する方法及びシステム
JP2008547220A (ja) * 2005-06-27 2008-12-25 アプライド マテリアルズ インコーポレイテッド プラズマ窒化したゲート誘電体を２段階式で窒化後アニーリングするための改善された製造方法
JP2010034552A (ja) * 2008-07-29 2010-02-12 Hynix Semiconductor Inc フラッシュメモリ素子のトンネル絶縁膜形成方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7429540B2 (en) * 2003-03-07 2008-09-30 Applied Materials, Inc. Silicon oxynitride gate dielectric formation using multiple annealing steps
US7915179B2 (en) * 2004-11-04 2011-03-29 Tokyo Electron Limited Insulating film forming method and substrate processing method
CN101271840A (zh) * 2007-03-22 2008-09-24 中芯国际集成电路制造(上海)有限公司 栅氧化层的制作方法及半导体器件的制作方法
KR100998417B1 (ko) * 2007-08-20 2010-12-03 주식회사 하이닉스반도체 반도체 메모리 소자의 유전체막 형성 방법
JP5425404B2 (ja) * 2008-01-18 2014-02-26 東京エレクトロン株式会社 アモルファスカーボン膜の処理方法およびそれを用いた半導体装置の製造方法
KR20090080606A (ko) * 2008-01-22 2009-07-27 주식회사 하이닉스반도체 플래시 메모리 소자의 제조 방법
JP2010021378A (ja) * 2008-07-11 2010-01-28 Tokyo Electron Ltd シリコン酸窒化膜の形成方法および形成装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005235792A (ja) * 2002-02-27 2005-09-02 Tokyo Electron Ltd 基板処理方法
JP2004253777A (ja) * 2003-01-31 2004-09-09 Nec Electronics Corp 半導体装置及び半導体装置の製造方法
JP2008535243A (ja) * 2005-03-30 2008-08-28 東京エレクトロン株式会社 酸窒化層を形成する方法及びシステム
JP2008547220A (ja) * 2005-06-27 2008-12-25 アプライド マテリアルズ インコーポレイテッド プラズマ窒化したゲート誘電体を２段階式で窒化後アニーリングするための改善された製造方法
WO2008081724A1 (ja) * 2006-12-28 2008-07-10 Tokyo Electron Limited 絶縁膜の形成方法および半導体装置の製造方法
JP2010034552A (ja) * 2008-07-29 2010-02-12 Hynix Semiconductor Inc フラッシュメモリ素子のトンネル絶縁膜形成方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112543990A (zh) * 2018-08-02 2021-03-23 株式会社富士 大气压等离子体发生装置
CN112543990B (zh) * 2018-08-02 2023-10-24 株式会社富士 大气压等离子体发生装置

Also Published As

Publication number Publication date
CN102446728A (zh) 2012-05-09
KR20120034016A (ko) 2012-04-09
TW201234480A (en) 2012-08-16
KR101270875B1 (ko) 2013-06-05

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