CN102446728A - 绝缘膜的改性方法 - Google Patents

绝缘膜的改性方法 Download PDF

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Publication number
CN102446728A
CN102446728A CN2011103036957A CN201110303695A CN102446728A CN 102446728 A CN102446728 A CN 102446728A CN 2011103036957 A CN2011103036957 A CN 2011103036957A CN 201110303695 A CN201110303695 A CN 201110303695A CN 102446728 A CN102446728 A CN 102446728A
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CN
China
Prior art keywords
plasma
film
silicon nitride
modifying
oxidized silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2011103036957A
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English (en)
Chinese (zh)
Inventor
大﨑良规
高桥哲朗
前川浩治
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Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of CN102446728A publication Critical patent/CN102446728A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02329—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
    • H01L21/02332—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen into an oxide layer, e.g. changing SiO to SiON
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
CN2011103036957A 2010-09-30 2011-09-29 绝缘膜的改性方法 Pending CN102446728A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2010-221269 2010-09-30
JP2010221269A JP2012079785A (ja) 2010-09-30 2010-09-30 絶縁膜の改質方法

Publications (1)

Publication Number Publication Date
CN102446728A true CN102446728A (zh) 2012-05-09

Family

ID=46009127

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011103036957A Pending CN102446728A (zh) 2010-09-30 2011-09-29 绝缘膜的改性方法

Country Status (4)

Country Link
JP (1) JP2012079785A (ko)
KR (1) KR101270875B1 (ko)
CN (1) CN102446728A (ko)
TW (1) TW201234480A (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109690268A (zh) * 2016-09-08 2019-04-26 庄信万丰股份有限公司 方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6040609B2 (ja) * 2012-07-20 2016-12-07 東京エレクトロン株式会社 成膜装置及び成膜方法
US11450578B2 (en) * 2018-04-27 2022-09-20 Tokyo Electron Limited Substrate processing system and substrate processing method
EP3832697B1 (en) * 2018-08-02 2023-06-07 Fuji Corporation Atmospheric-pressure plasma generator

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040185676A1 (en) * 2003-01-31 2004-09-23 Nec Electronics Corporation Semiconductor device and method of manufacturing semiconductor device
JP2005235792A (ja) * 2002-02-27 2005-09-02 Tokyo Electron Ltd 基板処理方法
US20080000551A1 (en) * 2004-11-04 2008-01-03 Tokyo Electron Limited Insulating Film Forming Method and Substrate Processing Method
US20080233692A1 (en) * 2007-03-22 2008-09-25 Semiconductor Manufacturing International (Shanghai) Corporation Method and System for Forming a Controllable Gate Oxide
US20090053905A1 (en) * 2007-08-20 2009-02-26 Hynix Semiconductor Inc. Method of forming dielectric layer of semiconductor memory device
CN101416286A (zh) * 2006-04-03 2009-04-22 应用材料股份有限公司 以多退火步骤形成氮氧化硅栅极介电层的方法
JP2010021378A (ja) * 2008-07-11 2010-01-28 Tokyo Electron Ltd シリコン酸窒化膜の形成方法および形成装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7501352B2 (en) * 2005-03-30 2009-03-10 Tokyo Electron, Ltd. Method and system for forming an oxynitride layer
US7429538B2 (en) * 2005-06-27 2008-09-30 Applied Materials, Inc. Manufacturing method for two-step post nitridation annealing of plasma nitrided gate dielectric
WO2008081724A1 (ja) * 2006-12-28 2008-07-10 Tokyo Electron Limited 絶縁膜の形成方法および半導体装置の製造方法
JP5425404B2 (ja) * 2008-01-18 2014-02-26 東京エレクトロン株式会社 アモルファスカーボン膜の処理方法およびそれを用いた半導体装置の製造方法
KR20090080606A (ko) * 2008-01-22 2009-07-27 주식회사 하이닉스반도체 플래시 메모리 소자의 제조 방법
KR20100012482A (ko) * 2008-07-29 2010-02-08 주식회사 하이닉스반도체 플래시 메모리 소자의 터널 절연막 형성 방법

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005235792A (ja) * 2002-02-27 2005-09-02 Tokyo Electron Ltd 基板処理方法
US20040185676A1 (en) * 2003-01-31 2004-09-23 Nec Electronics Corporation Semiconductor device and method of manufacturing semiconductor device
US20080000551A1 (en) * 2004-11-04 2008-01-03 Tokyo Electron Limited Insulating Film Forming Method and Substrate Processing Method
CN101416286A (zh) * 2006-04-03 2009-04-22 应用材料股份有限公司 以多退火步骤形成氮氧化硅栅极介电层的方法
US20080233692A1 (en) * 2007-03-22 2008-09-25 Semiconductor Manufacturing International (Shanghai) Corporation Method and System for Forming a Controllable Gate Oxide
US20090053905A1 (en) * 2007-08-20 2009-02-26 Hynix Semiconductor Inc. Method of forming dielectric layer of semiconductor memory device
JP2010021378A (ja) * 2008-07-11 2010-01-28 Tokyo Electron Ltd シリコン酸窒化膜の形成方法および形成装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109690268A (zh) * 2016-09-08 2019-04-26 庄信万丰股份有限公司 方法

Also Published As

Publication number Publication date
KR20120034016A (ko) 2012-04-09
JP2012079785A (ja) 2012-04-19
TW201234480A (en) 2012-08-16
KR101270875B1 (ko) 2013-06-05

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Application publication date: 20120509