FR2928031B1 - Procede de transfert d'une couche mince sur un substrat support. - Google Patents
Procede de transfert d'une couche mince sur un substrat support.Info
- Publication number
- FR2928031B1 FR2928031B1 FR0851176A FR0851176A FR2928031B1 FR 2928031 B1 FR2928031 B1 FR 2928031B1 FR 0851176 A FR0851176 A FR 0851176A FR 0851176 A FR0851176 A FR 0851176A FR 2928031 B1 FR2928031 B1 FR 2928031B1
- Authority
- FR
- France
- Prior art keywords
- transferring
- thin layer
- support substrate
- substrate
- thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0851176A FR2928031B1 (fr) | 2008-02-25 | 2008-02-25 | Procede de transfert d'une couche mince sur un substrat support. |
| PCT/EP2008/066854 WO2009106177A1 (fr) | 2008-02-25 | 2008-12-05 | Procédé de transfert d'une couche mince sur un substrat de support |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0851176A FR2928031B1 (fr) | 2008-02-25 | 2008-02-25 | Procede de transfert d'une couche mince sur un substrat support. |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2928031A1 FR2928031A1 (fr) | 2009-08-28 |
| FR2928031B1 true FR2928031B1 (fr) | 2010-06-11 |
Family
ID=39361490
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR0851176A Expired - Fee Related FR2928031B1 (fr) | 2008-02-25 | 2008-02-25 | Procede de transfert d'une couche mince sur un substrat support. |
Country Status (2)
| Country | Link |
|---|---|
| FR (1) | FR2928031B1 (fr) |
| WO (1) | WO2009106177A1 (fr) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013149853A (ja) * | 2012-01-20 | 2013-08-01 | Shin Etsu Chem Co Ltd | 薄膜付き基板の製造方法 |
| JP6632462B2 (ja) * | 2016-04-28 | 2020-01-22 | 信越化学工業株式会社 | 複合ウェーハの製造方法 |
| FR3051971B1 (fr) * | 2016-05-30 | 2019-12-13 | Soitec | Procede de fabrication d'une structure semi-conductrice comprenant un interposeur |
| FR3144390A1 (fr) * | 2022-12-27 | 2024-06-28 | Commissariat A L' Energie Atomique Et Aux Energies Alternatives | Procédé de transfert de couche semiconductrice |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040262686A1 (en) * | 2003-06-26 | 2004-12-30 | Mohamad Shaheen | Layer transfer technique |
| WO2006032948A1 (fr) * | 2004-09-21 | 2006-03-30 | S.O.I.Tec Silicon On Insulator Technologies | Procede d'obtention d'une couche mince par mise en oeuvre d'une co-implantation suivie d'une implantation |
| CN101027768B (zh) * | 2004-09-21 | 2010-11-03 | S.O.I.Tec绝缘体上硅技术公司 | 根据避免气泡形成和限制粗糙度的条件来进行共注入步骤的薄层转移方法 |
| WO2007019277A2 (fr) * | 2005-08-03 | 2007-02-15 | California Institute Of Technology | Procede de formation de couches semiconductrices sur des substrats de manipulation |
| FR2898431B1 (fr) * | 2006-03-13 | 2008-07-25 | Soitec Silicon On Insulator | Procede de fabrication de film mince |
-
2008
- 2008-02-25 FR FR0851176A patent/FR2928031B1/fr not_active Expired - Fee Related
- 2008-12-05 WO PCT/EP2008/066854 patent/WO2009106177A1/fr active Application Filing
Also Published As
| Publication number | Publication date |
|---|---|
| FR2928031A1 (fr) | 2009-08-28 |
| WO2009106177A1 (fr) | 2009-09-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |
Effective date: 20111102 |