FR2582135B1 - Circuit de precharge pour lignes de mot d'un dispositif de memoire, en particulier a cellules programmables - Google Patents

Circuit de precharge pour lignes de mot d'un dispositif de memoire, en particulier a cellules programmables

Info

Publication number
FR2582135B1
FR2582135B1 FR868606928A FR8606928A FR2582135B1 FR 2582135 B1 FR2582135 B1 FR 2582135B1 FR 868606928 A FR868606928 A FR 868606928A FR 8606928 A FR8606928 A FR 8606928A FR 2582135 B1 FR2582135 B1 FR 2582135B1
Authority
FR
France
Prior art keywords
memory device
word lines
programmable cells
preload circuit
preload
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR868606928A
Other languages
English (en)
Other versions
FR2582135A1 (fr
Inventor
Roberto Gastaldi
Giulio Casagrande
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
SGS Microelettronica SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Microelettronica SpA filed Critical SGS Microelettronica SpA
Publication of FR2582135A1 publication Critical patent/FR2582135A1/fr
Application granted granted Critical
Publication of FR2582135B1 publication Critical patent/FR2582135B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
FR868606928A 1985-05-14 1986-05-14 Circuit de precharge pour lignes de mot d'un dispositif de memoire, en particulier a cellules programmables Expired - Lifetime FR2582135B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8520688A IT1214607B (it) 1985-05-14 1985-05-14 Circuito di precarica per linee di riga di un sistema di memoria, in particolare a celle programmabili.

Publications (2)

Publication Number Publication Date
FR2582135A1 FR2582135A1 (fr) 1986-11-21
FR2582135B1 true FR2582135B1 (fr) 1992-08-14

Family

ID=11170590

Family Applications (1)

Application Number Title Priority Date Filing Date
FR868606928A Expired - Lifetime FR2582135B1 (fr) 1985-05-14 1986-05-14 Circuit de precharge pour lignes de mot d'un dispositif de memoire, en particulier a cellules programmables

Country Status (6)

Country Link
US (1) US4847811A (fr)
JP (1) JPH0766673B2 (fr)
DE (1) DE3615310C2 (fr)
FR (1) FR2582135B1 (fr)
GB (1) GB2175168B (fr)
IT (1) IT1214607B (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5003467A (en) * 1987-05-01 1991-03-26 Digital Equipment Corporation Node adapted for backplane bus with default control
EP0357667B1 (fr) * 1987-05-01 1993-07-21 Digital Equipment Corporation Noeud pour bus de fond de panier
DE3883692T2 (de) * 1987-05-01 1994-02-03 Digital Equipment Corp Rückwandplatinenbus.
KR930000869B1 (ko) * 1989-11-30 1993-02-08 삼성전자 주식회사 페이지 소거 가능한 플래쉬형 이이피롬 장치
KR940005688B1 (ko) * 1991-09-05 1994-06-22 삼성전자 주식회사 메모리 소자에 있어서 데이터 라인의 프리챠아지 자동 검사 장치
KR100725980B1 (ko) 2005-07-23 2007-06-08 삼성전자주식회사 비휘발성 메모리에 저장된 데이터를 독출하는 속도를개선할 수 있는 반도체 장치와 그 개선방법

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5399736A (en) * 1977-02-10 1978-08-31 Toshiba Corp Semiconductor memory unit
US4208730A (en) * 1978-08-07 1980-06-17 Rca Corporation Precharge circuit for memory array
US4289982A (en) * 1979-06-28 1981-09-15 Motorola, Inc. Apparatus for programming a dynamic EPROM
JPS5778695A (en) * 1980-10-29 1982-05-17 Toshiba Corp Semiconductor storage device
JPS57100686A (en) * 1980-12-12 1982-06-22 Toshiba Corp Nonvolatile semiconductor memory
JPH0746515B2 (ja) * 1984-12-28 1995-05-17 日本電気株式会社 デコ−ダ回路
US4638459A (en) * 1985-01-31 1987-01-20 Standard Microsystems Corp. Virtual ground read only memory

Also Published As

Publication number Publication date
JPS61260496A (ja) 1986-11-18
IT1214607B (it) 1990-01-18
GB2175168A (en) 1986-11-19
FR2582135A1 (fr) 1986-11-21
GB2175168B (en) 1989-07-05
JPH0766673B2 (ja) 1995-07-19
US4847811A (en) 1989-07-11
DE3615310A1 (de) 1986-11-20
GB8611204D0 (en) 1986-06-18
IT8520688A0 (it) 1985-05-14
DE3615310C2 (de) 1995-11-30

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Legal Events

Date Code Title Description
D6 Patent endorsed licences of rights
ST Notification of lapse