FR2583202B1 - Dispositif de memoire a semiconducteurs - Google Patents

Dispositif de memoire a semiconducteurs

Info

Publication number
FR2583202B1
FR2583202B1 FR868608121A FR8608121A FR2583202B1 FR 2583202 B1 FR2583202 B1 FR 2583202B1 FR 868608121 A FR868608121 A FR 868608121A FR 8608121 A FR8608121 A FR 8608121A FR 2583202 B1 FR2583202 B1 FR 2583202B1
Authority
FR
France
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR868608121A
Other languages
English (en)
Other versions
FR2583202A1 (fr
Inventor
Yukihiko Shimazu
Eiichi Teraoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of FR2583202A1 publication Critical patent/FR2583202A1/fr
Application granted granted Critical
Publication of FR2583202B1 publication Critical patent/FR2583202B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356086—Bistable circuits with additional means for controlling the main nodes
    • H03K3/356095—Bistable circuits with additional means for controlling the main nodes with synchronous operation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
    • H03K3/35606—Bistable circuits using additional transistors in the input circuit using pass gates with synchronous operation
FR868608121A 1985-06-06 1986-06-05 Dispositif de memoire a semiconducteurs Expired - Lifetime FR2583202B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60123560A JPS61283092A (ja) 1985-06-06 1985-06-06 リセツトあるいはセツト付記憶回路を有した半導体集積回路

Publications (2)

Publication Number Publication Date
FR2583202A1 FR2583202A1 (fr) 1986-12-12
FR2583202B1 true FR2583202B1 (fr) 1991-09-27

Family

ID=14863607

Family Applications (1)

Application Number Title Priority Date Filing Date
FR868608121A Expired - Lifetime FR2583202B1 (fr) 1985-06-06 1986-06-05 Dispositif de memoire a semiconducteurs

Country Status (4)

Country Link
US (1) US4777623A (fr)
JP (1) JPS61283092A (fr)
DE (1) DE3618572A1 (fr)
FR (1) FR2583202B1 (fr)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2607955B1 (fr) * 1986-12-05 1989-02-10 Eurotechnique Sa Dispositif d'autosynchronisation des circuits de sortie d'une memoire
JP2549109B2 (ja) * 1987-03-26 1996-10-30 株式会社東芝 半導体回路
JP2621176B2 (ja) * 1987-05-14 1997-06-18 ソニー株式会社 ワンチツプマイクロコンピユータ
JPH077901B2 (ja) * 1988-02-29 1995-01-30 沖電気工業株式会社 フリップフロップ回路
FR2628878B1 (fr) * 1988-03-18 1990-08-17 Radiotechnique Compelec Cellule de memorisation adressable, registre a decalage et memoire comportant de telles cellules
DE3829760A1 (de) * 1988-09-01 1990-03-15 Siemens Ag Taktflankengesteuertes register
JPH0468714A (ja) * 1990-07-04 1992-03-04 Matsushita Electric Ind Co Ltd 半導体集積回路装置
JPH05144273A (ja) * 1991-11-18 1993-06-11 Mitsubishi Electric Corp 半導体集積回路装置
US5373466A (en) * 1992-03-25 1994-12-13 Harris Corporation Flash-clear of ram array using partial reset mechanism
US5280203A (en) * 1992-05-15 1994-01-18 Altera Corporation Look-ahead asynchronous register set/reset in programmable logic device
JPH0729372A (ja) * 1993-07-08 1995-01-31 Nec Ic Microcomput Syst Ltd マルチポート・ランダム・アクセス・メモリ
US5467038A (en) * 1994-02-15 1995-11-14 Hewlett-Packard Company Quick resolving latch
US5805014A (en) * 1996-03-01 1998-09-08 Compaq Computer Corporation System having active pull-down circuit and method
US5764564A (en) * 1997-03-11 1998-06-09 Xilinx, Inc. Write-assisted memory cell and method of operating same
US6128215A (en) * 1997-08-19 2000-10-03 Altera Corporation Static random access memory circuits
KR100297715B1 (ko) * 1998-09-01 2001-08-07 윤종용 출력버퍼제어회로및출력제어신호발생방법
US7433224B1 (en) * 2000-01-04 2008-10-07 Advanced Micro Devices, Inc. System and method for forcing an SRAM into a known state during power-up
US6519177B1 (en) * 2001-12-10 2003-02-11 Ami Semiconductor, Inc. Circuits and methods for initializing memory cells
US11695393B2 (en) * 2021-01-29 2023-07-04 Qualcomm Incorporated True single phase clock (TSPC) based latch array

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3753011A (en) * 1972-03-13 1973-08-14 Intel Corp Power supply settable bi-stable circuit
US4255785A (en) * 1978-09-25 1981-03-10 Motorola, Inc. Microprocessor having instruction fetch and execution overlap
US4380055A (en) * 1980-12-24 1983-04-12 Mostek Corporation Static RAM memory cell
JPS5845695A (ja) * 1981-09-10 1983-03-16 Nec Corp 絶縁ゲ−ト型記憶回路
US4460978A (en) * 1981-11-19 1984-07-17 Mostek Corporation Nonvolatile static random access memory cell
FR2517143A1 (fr) * 1981-11-20 1983-05-27 Efcis Bascule bistable a stockage non volatil et a repositionnement dynamique
FR2517142A1 (fr) * 1981-11-20 1983-05-27 Efcis Bascule bistable a stockage non volatil et a repositionnement statique
US4441168A (en) * 1982-01-13 1984-04-03 Sperry Corporation Storage logic/array (SLA) circuit
US4484310A (en) * 1982-03-29 1984-11-20 Texas Instruments Incorporated Static noninverting memory cell for one propagation delay memory circuits
DE3330026A1 (de) * 1983-08-19 1985-02-28 Siemens AG, 1000 Berlin und 8000 München Integrierte rs-flipflop-schaltung
JPS60151898A (ja) * 1984-01-18 1985-08-09 Nec Corp 不揮発性ランダムアクセスメモリセル

Also Published As

Publication number Publication date
US4777623A (en) 1988-10-11
DE3618572C2 (fr) 1989-03-02
DE3618572A1 (de) 1986-12-11
FR2583202A1 (fr) 1986-12-12
JPS61283092A (ja) 1986-12-13
JPH0341920B2 (fr) 1991-06-25

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