FR2445625A1 - Dispositif integre a semi-conducteurs comportant un motif conducteur qui comprend une couche de silicium polycristallin - Google Patents

Dispositif integre a semi-conducteurs comportant un motif conducteur qui comprend une couche de silicium polycristallin

Info

Publication number
FR2445625A1
FR2445625A1 FR7931963A FR7931963A FR2445625A1 FR 2445625 A1 FR2445625 A1 FR 2445625A1 FR 7931963 A FR7931963 A FR 7931963A FR 7931963 A FR7931963 A FR 7931963A FR 2445625 A1 FR2445625 A1 FR 2445625A1
Authority
FR
France
Prior art keywords
polycrystalline silicon
layer
semiconductor device
conductive pattern
silicon layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7931963A
Other languages
English (en)
Other versions
FR2445625B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of FR2445625A1 publication Critical patent/FR2445625A1/fr
Application granted granted Critical
Publication of FR2445625B1 publication Critical patent/FR2445625B1/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76889—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances by forming silicides of refractory metals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53271—Conductive materials containing semiconductor material, e.g. polysilicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
    • H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/14—Schottky barrier contacts

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Ceramic Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Conductive Materials (AREA)
  • Chemical Vapour Deposition (AREA)
  • Semiconductor Memories (AREA)

Abstract

L'invention concerne la fabrication des dispositifs à semi-conducteurs. Le motif conducteur d'un dispositif à semi-conducteurs comprend une couche de silicium polycristallin 42 recouverte par une couche de siliciure de titane ou de siliciure de tantale 43. Cette configuration améliore la conductivité du silicium polycristallin proprement dit, et permet de former facilement une couche de dioxyde de silicium 44 par traitement thermique, pour assurer l'isolation pour- une couche de métallisation 46. Application à la fabrication des circuits intégrés.
FR7931963A 1978-12-29 1979-12-28 Dispositif integre a semi-conducteurs comportant un motif conducteur qui comprend une couche de silicium polycristallin Expired FR2445625B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/974,378 US4276557A (en) 1978-12-29 1978-12-29 Integrated semiconductor circuit structure and method for making it

Publications (2)

Publication Number Publication Date
FR2445625A1 true FR2445625A1 (fr) 1980-07-25
FR2445625B1 FR2445625B1 (fr) 1985-10-18

Family

ID=25521962

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7931963A Expired FR2445625B1 (fr) 1978-12-29 1979-12-28 Dispositif integre a semi-conducteurs comportant un motif conducteur qui comprend une couche de silicium polycristallin

Country Status (10)

Country Link
US (1) US4276557A (fr)
JP (1) JPS55108752A (fr)
CA (1) CA1136771A (fr)
DE (1) DE2951734A1 (fr)
FR (1) FR2445625B1 (fr)
GB (1) GB2038552B (fr)
IE (1) IE48724B1 (fr)
IT (1) IT1127770B (fr)
NL (1) NL184136C (fr)
SE (1) SE439214B (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0043451A2 (fr) * 1980-06-30 1982-01-13 International Business Machines Corporation Procédé pour former sélectivement des couches de siliciure d'un métal réfractaire sur des dispositifs semiconducteurs
EP0055161A1 (fr) * 1980-12-09 1982-06-30 FAIRCHILD CAMERA & INSTRUMENT CORPORATION Interconnexions multicouches à siliciure métallique pour circuits intégrés
EP0139371A1 (fr) * 1983-08-12 1985-05-02 Tektronix, Inc. Procédé pour fabriquer un circuit intégré de type MOS utilisant une méthode pour former des couches en siliciure de métaux réfractaires
WO1986006877A1 (fr) * 1985-05-03 1986-11-20 American Telephone & Telegraph Company Traitement des polyciures dans la fabrication de semiconducteurs

Families Citing this family (56)

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USRE32207E (en) * 1978-12-29 1986-07-15 At&T Bell Laboratories Method for making integrated semiconductor circuit structure with formation of Ti or Ta silicide
US4337476A (en) * 1980-08-18 1982-06-29 Bell Telephone Laboratories, Incorporated Silicon rich refractory silicides as gate metal
JPS5737888A (en) * 1980-08-19 1982-03-02 Mitsubishi Electric Corp Photo detector
WO1982003948A1 (fr) * 1981-05-04 1982-11-11 Inc Motorola Metallisation composite de faible resistivite pour des dispositifs semiconducteurs et procede
JPS584924A (ja) * 1981-07-01 1983-01-12 Hitachi Ltd 半導体装置の電極形成方法
US4359490A (en) * 1981-07-13 1982-11-16 Fairchild Camera & Instrument Corp. Method for LPCVD co-deposition of metal and silicon to form metal silicide
JPS5873156A (ja) * 1981-10-28 1983-05-02 Hitachi Ltd 半導体装置
US4816425A (en) * 1981-11-19 1989-03-28 Texas Instruments Incorporated Polycide process for integrated circuits
US4495512A (en) * 1982-06-07 1985-01-22 International Business Machines Corporation Self-aligned bipolar transistor with inverted polycide base contact
DE3382482D1 (de) * 1982-09-30 1992-01-30 Advanced Micro Devices Inc Aluminium-metall-silicid-verbindungsstruktur fuer integrierte schaltungen und deren herstellungsverfahren.
US5136361A (en) * 1982-09-30 1992-08-04 Advanced Micro Devices, Inc. Stratified interconnect structure for integrated circuits
US4920908A (en) * 1983-03-29 1990-05-01 Genus, Inc. Method and apparatus for deposition of tungsten silicides
US4565157A (en) * 1983-03-29 1986-01-21 Genus, Inc. Method and apparatus for deposition of tungsten silicides
DE3326142A1 (de) * 1983-07-20 1985-01-31 Siemens AG, 1000 Berlin und 8000 München Integrierte halbleiterschaltung mit einer aus aluminium oder aus einer aluminiumlegierung bestehenden aeusseren kontaktleiterbahnebene
US4641170A (en) * 1983-12-12 1987-02-03 International Business Machines Corporation Self-aligned lateral bipolar transistors
JPS60134466A (ja) * 1983-12-23 1985-07-17 Hitachi Ltd 半導体装置およびその製造方法
US4693925A (en) * 1984-03-01 1987-09-15 Advanced Micro Devices, Inc. Integrated circuit structure having intermediate metal silicide layer
US4581815A (en) * 1984-03-01 1986-04-15 Advanced Micro Devices, Inc. Integrated circuit structure having intermediate metal silicide layer and method of making same
US4555842A (en) * 1984-03-19 1985-12-03 At&T Bell Laboratories Method of fabricating VLSI CMOS devices having complementary threshold voltages
KR940002772B1 (ko) * 1984-08-31 1994-04-02 가부시기가이샤 히다찌세이사꾸쇼 반도체 집적회로 장치 및 그 제조방법
US4569722A (en) * 1984-11-23 1986-02-11 At&T Bell Laboratories Ethylene glycol etch for processes using metal silicides
US4597163A (en) * 1984-12-21 1986-07-01 Zilog, Inc. Method of improving film adhesion between metallic silicide and polysilicon in thin film integrated circuit structures
US4612258A (en) * 1984-12-21 1986-09-16 Zilog, Inc. Method for thermally oxidizing polycide substrates in a dry oxygen environment and semiconductor circuit structures produced thereby
JPS61164262A (ja) * 1985-01-17 1986-07-24 Toshiba Corp 半導体装置
US4725872A (en) * 1985-02-25 1988-02-16 Tektronix, Inc. Fast channel single phase buried channel CCD
US4782033A (en) * 1985-11-27 1988-11-01 Siemens Aktiengesellschaft Process for producing CMOS having doped polysilicon gate by outdiffusion of boron from implanted silicide gate
US4796562A (en) * 1985-12-03 1989-01-10 Varian Associates, Inc. Rapid thermal cvd apparatus
US4709655A (en) * 1985-12-03 1987-12-01 Varian Associates, Inc. Chemical vapor deposition apparatus
US4811067A (en) * 1986-05-02 1989-03-07 International Business Machines Corporation High density vertically structured memory
US5063168A (en) * 1986-07-02 1991-11-05 National Semiconductor Corporation Process for making bipolar transistor with polysilicon stringer base contact
US4974046A (en) * 1986-07-02 1990-11-27 National Seimconductor Corporation Bipolar transistor with polysilicon stringer base contact
US4974056A (en) * 1987-05-22 1990-11-27 International Business Machines Corporation Stacked metal silicide gate structure with barrier
JPH0258874A (ja) * 1988-08-24 1990-02-28 Nec Corp 半導体集積回路装置
JPH02285638A (ja) * 1989-04-27 1990-11-22 Toshiba Corp 半導体装置
JPH0758773B2 (ja) * 1989-07-14 1995-06-21 三菱電機株式会社 半導体装置の製造方法及び半導体装置
US5139966A (en) * 1990-04-02 1992-08-18 National Semiconductor Corporation Low resistance silicided substrate contact
US5290396A (en) * 1991-06-06 1994-03-01 Lsi Logic Corporation Trench planarization techniques
US5413966A (en) * 1990-12-20 1995-05-09 Lsi Logic Corporation Shallow trench etch
US5322812A (en) * 1991-03-20 1994-06-21 Crosspoint Solutions, Inc. Improved method of fabricating antifuses in an integrated circuit device and resulting structure
US5252503A (en) * 1991-06-06 1993-10-12 Lsi Logic Corporation Techniques for forming isolation structures
US5248625A (en) * 1991-06-06 1993-09-28 Lsi Logic Corporation Techniques for forming isolation structures
US5225358A (en) * 1991-06-06 1993-07-06 Lsi Logic Corporation Method of forming late isolation with polishing
US5581111A (en) 1993-07-07 1996-12-03 Actel Corporation Dielectric-polysilicon-dielectric antifuse for field programmable logic applications
US5485031A (en) 1993-11-22 1996-01-16 Actel Corporation Antifuse structure suitable for VLSI application
US5474619A (en) * 1994-05-04 1995-12-12 The United States Of America As Represented By The Secretary Of Commerce Thin film high temperature silicide thermocouples
US5986322A (en) * 1995-06-06 1999-11-16 Mccollum; John L. Reduced leakage antifuse structure
JP3355127B2 (ja) * 1998-02-23 2002-12-09 株式会社日立製作所 熱式空気流量センサ
US6586318B1 (en) * 1999-12-28 2003-07-01 Xerox Corporation Thin phosphorus nitride film as an N-type doping source used in laser doping technology
US9111729B2 (en) * 2009-12-03 2015-08-18 Lam Research Corporation Small plasma chamber systems and methods
US9190289B2 (en) * 2010-02-26 2015-11-17 Lam Research Corporation System, method and apparatus for plasma etch having independent control of ion generation and dissociation of process gas
US9967965B2 (en) 2010-08-06 2018-05-08 Lam Research Corporation Distributed, concentric multi-zone plasma source systems, methods and apparatus
US9155181B2 (en) 2010-08-06 2015-10-06 Lam Research Corporation Distributed multi-zone plasma source systems, methods and apparatus
US9449793B2 (en) 2010-08-06 2016-09-20 Lam Research Corporation Systems, methods and apparatus for choked flow element extraction
US8999104B2 (en) 2010-08-06 2015-04-07 Lam Research Corporation Systems, methods and apparatus for separate plasma source control
US9177762B2 (en) 2011-11-16 2015-11-03 Lam Research Corporation System, method and apparatus of a wedge-shaped parallel plate plasma reactor for substrate processing
US10283325B2 (en) 2012-10-10 2019-05-07 Lam Research Corporation Distributed multi-zone plasma source systems, methods and apparatus

Citations (2)

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Publication number Priority date Publication date Assignee Title
FR2325192A1 (fr) * 1975-09-17 1977-04-15 Philips Nv Procede pour la fabrication d'un dispositif semiconducteur, et dispositif semiconducteur fabrique de la sorte
US4128670A (en) * 1977-11-11 1978-12-05 International Business Machines Corporation Fabrication method for integrated circuits with polysilicon lines having low sheet resistance

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Publication number Priority date Publication date Assignee Title
US4180596A (en) * 1977-06-30 1979-12-25 International Business Machines Corporation Method for providing a metal silicide layer on a substrate

Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
FR2325192A1 (fr) * 1975-09-17 1977-04-15 Philips Nv Procede pour la fabrication d'un dispositif semiconducteur, et dispositif semiconducteur fabrique de la sorte
US4128670A (en) * 1977-11-11 1978-12-05 International Business Machines Corporation Fabrication method for integrated circuits with polysilicon lines having low sheet resistance

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
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EXBK/74 *

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0043451A2 (fr) * 1980-06-30 1982-01-13 International Business Machines Corporation Procédé pour former sélectivement des couches de siliciure d'un métal réfractaire sur des dispositifs semiconducteurs
EP0043451A3 (en) * 1980-06-30 1984-07-25 International Business Machines Corporation Process for selectively forming refractory metal silicide layers on semiconductor devices
EP0055161A1 (fr) * 1980-12-09 1982-06-30 FAIRCHILD CAMERA & INSTRUMENT CORPORATION Interconnexions multicouches à siliciure métallique pour circuits intégrés
EP0139371A1 (fr) * 1983-08-12 1985-05-02 Tektronix, Inc. Procédé pour fabriquer un circuit intégré de type MOS utilisant une méthode pour former des couches en siliciure de métaux réfractaires
WO1986006877A1 (fr) * 1985-05-03 1986-11-20 American Telephone & Telegraph Company Traitement des polyciures dans la fabrication de semiconducteurs

Also Published As

Publication number Publication date
GB2038552A (en) 1980-07-23
SE439214B (sv) 1985-06-03
DE2951734C2 (fr) 1988-02-04
DE2951734A1 (de) 1980-07-10
NL184136C (nl) 1989-04-17
GB2038552B (en) 1983-04-13
IT7928441A0 (it) 1979-12-28
JPS6260812B2 (fr) 1987-12-18
FR2445625B1 (fr) 1985-10-18
NL184136B (nl) 1988-11-16
IE48724B1 (en) 1985-05-01
JPS55108752A (en) 1980-08-21
SE7910379L (sv) 1980-06-30
NL7909363A (nl) 1980-07-01
IT1127770B (it) 1986-05-21
US4276557A (en) 1981-06-30
CA1136771A (fr) 1982-11-30
IE792525L (en) 1980-06-29

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