JPS5797663A - Complementary mos type semiconductor - Google Patents

Complementary mos type semiconductor

Info

Publication number
JPS5797663A
JPS5797663A JP55175159A JP17515980A JPS5797663A JP S5797663 A JPS5797663 A JP S5797663A JP 55175159 A JP55175159 A JP 55175159A JP 17515980 A JP17515980 A JP 17515980A JP S5797663 A JPS5797663 A JP S5797663A
Authority
JP
Japan
Prior art keywords
layer
region
layers
drain
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55175159A
Other languages
Japanese (ja)
Inventor
Kunimitsu Fujiki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55175159A priority Critical patent/JPS5797663A/en
Publication of JPS5797663A publication Critical patent/JPS5797663A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0927Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising a P-well only in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce the size of an element by insulating the bottom and side of both drain layers from a substrate body and a well region providing both of FET drains of COMSFET close to the boundary of a substrate and the well region. CONSTITUTION:A p well regin 2 is formed in an n type silicon substrate 1 and a field oxide layer 5 is formed by oxiding it to a certain depth except for the region for forming elements. Oxygen is ion-implanted at a certain depth of regions for forming a source and a drain using a mask, and a buried oxide film 10 is formed by heat treatment. A p<+> layers 13a, 13b and an n<+> layers 14a, 14b are formed. The bottom of the source and the drain layer is insulated by the oxide film 10 and the side is by the oxide layer 5 each from the body 1 and the region 2, making it unnecessary to provide a space for the p<+> layer 13b and the n<+> layer 14a against the body 1 and the region 2.
JP55175159A 1980-12-11 1980-12-11 Complementary mos type semiconductor Pending JPS5797663A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55175159A JPS5797663A (en) 1980-12-11 1980-12-11 Complementary mos type semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55175159A JPS5797663A (en) 1980-12-11 1980-12-11 Complementary mos type semiconductor

Publications (1)

Publication Number Publication Date
JPS5797663A true JPS5797663A (en) 1982-06-17

Family

ID=15991287

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55175159A Pending JPS5797663A (en) 1980-12-11 1980-12-11 Complementary mos type semiconductor

Country Status (1)

Country Link
JP (1) JPS5797663A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3050321A1 (en) * 2016-04-15 2017-10-20 St Microelectronics Tours Sas DIODE STRUCTURE
CN107302019A (en) * 2016-04-15 2017-10-27 意法半导体(图尔)公司 Vertical semiconductor structure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3050321A1 (en) * 2016-04-15 2017-10-20 St Microelectronics Tours Sas DIODE STRUCTURE
CN107302019A (en) * 2016-04-15 2017-10-27 意法半导体(图尔)公司 Vertical semiconductor structure
EP3261129A1 (en) * 2016-04-15 2017-12-27 STMicroelectronics (Tours) SAS Diode structure

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