EP0618739B1 - Digitale Videokamera und Aufzeichnungsvorrichtung - Google Patents

Digitale Videokamera und Aufzeichnungsvorrichtung Download PDF

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Publication number
EP0618739B1
EP0618739B1 EP94301921A EP94301921A EP0618739B1 EP 0618739 B1 EP0618739 B1 EP 0618739B1 EP 94301921 A EP94301921 A EP 94301921A EP 94301921 A EP94301921 A EP 94301921A EP 0618739 B1 EP0618739 B1 EP 0618739B1
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EP
European Patent Office
Prior art keywords
signal
digital
circuit
analog
frequency
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP94301921A
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English (en)
French (fr)
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EP0618739A2 (de
EP0618739A3 (de
Inventor
Teruo C/O Canon K.K. Hieda
Osamu C/O Canon K.K. Ueda
Norihiro C/O Canon K.K. Kawahara
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Canon Inc
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Canon Inc
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Publication date
Priority claimed from JP08557493A external-priority patent/JP3231133B2/ja
Priority claimed from JP15298193A external-priority patent/JP3281454B2/ja
Priority claimed from JP5166318A external-priority patent/JPH06351044A/ja
Application filed by Canon Inc filed Critical Canon Inc
Priority to EP98201698A priority Critical patent/EP0868078B1/de
Priority to EP98201701A priority patent/EP0868090B1/de
Publication of EP0618739A2 publication Critical patent/EP0618739A2/de
Publication of EP0618739A3 publication Critical patent/EP0618739A3/de
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Publication of EP0618739B1 publication Critical patent/EP0618739B1/de
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/222Studio circuitry; Studio devices; Studio equipment
    • H04N5/262Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/2628Alteration of picture size, shape, position or orientation, e.g. zooming, rotation, rolling, perspective, translation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/10Circuitry of solid-state image sensors [SSIS]; Control thereof for transforming different wavelengths into image signals
    • H04N25/11Arrangement of colour filter arrays [CFA]; Filter mosaics
    • H04N25/13Arrangement of colour filter arrays [CFA]; Filter mosaics characterised by the spectral characteristics of the filter elements
    • H04N25/135Arrangement of colour filter arrays [CFA]; Filter mosaics characterised by the spectral characteristics of the filter elements based on four or more different wavelength filter elements
    • H04N25/136Arrangement of colour filter arrays [CFA]; Filter mosaics characterised by the spectral characteristics of the filter elements based on four or more different wavelength filter elements using complementary colours
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/765Interface circuits between an apparatus for recording and another apparatus
    • H04N5/77Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television camera
    • H04N5/772Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television camera the recording apparatus and the television camera being placed in the same enclosure
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/79Processing of colour television signals in connection with recording
    • H04N9/80Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
    • H04N9/804Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving pulse code modulation of the colour picture signal components
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N2209/00Details of colour television systems
    • H04N2209/04Picture signal generators
    • H04N2209/041Picture signal generators using solid-state devices
    • H04N2209/042Picture signal generators using solid-state devices having a single pick-up sensor
    • H04N2209/045Picture signal generators using solid-state devices having a single pick-up sensor using mosaic colour filter
    • H04N2209/046Colour interpolation to calculate the missing colour values
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S358/00Facsimile and static presentation processing
    • Y10S358/906Hand-held camera with recorder in a single unit

Definitions

  • the present invention relates to a digital signal recording device and to a digital video camera comprising such a signal recording device.
  • Figs. 1A and 1B show a conventional video camera apparatus for A/D-converting an analog signal output from a solid-state image pickup element, and performing signal processing in a digital form.
  • a video signal obtained via a lens element 1, a solid-state image pickup device 2, a correlation double sampling circuit 3, and a gain adjustment circuit 4 is sampled by an A/D converter 5 to be converted into a digital signal.
  • the sampled digital signal is supplied to a digital signal processing circuit 6.
  • the digital signal processing circuit 6 generates a digital luminance signal and digital color-difference signals from the input digital signal.
  • the digital luminance signal generated by the digital signal processing circuit 6 is converted into a band-limited analog luminance signal via a D/A converter 12 and a low-pass filter 13.
  • the digital color-difference signals are converted into band-limited analog color-difference signals via D/A converters 35 and 36 and low-pass filters 37 and 38. Furthermore, the analog color-difference signals are supplied to a modulation circuit 39 to be converted into an analog chrominance signal.
  • the analog chrominance signal is supplied to a digital signal recording device 21 together with the analog luminance signal. The processing so far is executed at the sampling frequency of the image pickup element.
  • YC-separated input signals When YC-separated input signals are externally input as a video signal, these signals are respectively input to switch circuits 8 and 9.
  • a composite video signal VIDEO When a composite video signal VIDEO is input, the signal VIDEO is separated into luminance and chrominance signals by a luminance/chrominance separation circuit 7, and the separated signals are input to the switch circuits 8 and 9.
  • One of these YC-separated input signals and the composite video signal is selected by the switch circuits 8 and 9.
  • the analog luminance and color-difference signals from a camera and externally input analog luminance and color-difference signals are selected by switch circuits 14 and 15.
  • the frequency band of the analog luminance signal is limited by a low-pass filter 17.
  • the band-limited analog luminance signal is supplied to an A/D converter 18 to be converted into a digital luminance signal.
  • the analog chrominance signal is converted into analog color-difference signals by a demodulation device 40, and the analog color-difference signals are then converted into digital color-difference signals by A/D converters 41 and 42.
  • the A/D conversion is performed at the sampling frequency of a digital VTR.
  • the digital signal recording device records the digital luminance and color-difference signals, which are converted, as described above, on a magnetic tape 22. Thus, a digital video signal is recorded.
  • switch circuits 25 and 26 are switched to the REC side, and the analog luminance and chrominance signals are selected and output by the switch circuits 25 and 26.
  • An EVF 33 performs a display operation based on the output luminance and chrominance signals for monitoring an image pickup operation.
  • the digital signal recording device 21 In a reproduction mode, the digital signal recording device 21 generates digital reproduced luminance and color-difference signals from a signal reproduced from the magnetic tape 22. Of these signals, the reproduced luminance signal is converted into an analog luminance signal by a D/A converter 23 which operates at the sampling frequency of the digital VTR, and thereafter, the frequency band of the analog luminance signal is limited by a low-pass filter 24, thus obtaining an analog reproduced luminance signal.
  • the digital color-difference signals are converted into analog color-difference signals by D/A converters 28 and 29 which operate at the sampling frequency of the digital VTR.
  • the frequency bands of these analog color-difference signals are then limited by low-pass filters 30 and 31 to obtain an analog reproduced color-difference signal.
  • the analog reproduced color-difference signal is modulated by a modulation device 32.
  • the switch circuits 25 and 26 are switched to the PB side, selecting the modulated analog reproduced color-difference signals together with the analog reproduced luminance signal, and output these signals as a reproduced video signal.
  • an image pickup signal processing circuit is an analog circuit, and an output signal from the analog processing circuit is converted into a digital signal. For this reason, due to a large circuit scale, the number of components becomes large, and current consumption undesirably increases. Also, it is difficult to make the apparatus compact, and to reduce cost.
  • the apparatus includes both an analog signal processing circuit and a digital signal processing circuit, a sufficient S/N ratio cannot often be obtained due to interference such as mixing of a digital signal into an analog signal, and the apparatus cannot be rendered compact.
  • image quality is determined by performance such as the frequency characteristics, noise characteristics, a change in performance due to a change in temperature, a variation in characteristics in units of circuits, and the like, and it is difficult to achieve high image quality.
  • WO-91/03909 discloses a television signal format converter for converting without loss of picture information any high definition television format to or from a given recorder/player format.
  • An interface converts between RGB luminance/chrominance inputs and between analog and digital inputs.
  • the present invention has been made in consideration of the above-mentioned problems, and aims to simplify the circuit arrangement of a digital video camera apparatus which selects one of a video signal from a digital video camera and a video signal from an external input terminal, and records the selected video signal on a recording medium.
  • Embodiments of the present invention provide a digital video camera apparatus having a small number of components and simplify the circuit arrangement of an apparatus for digitally recording an image pickup signal.
  • a digital signal recording device for digitally recording an image on a video tape at a sampling frequency, said digital signal recording device being arranged to receive digital luminance and digital colour information signals and analog luminance and analog colour information signals, characterised in that said recording device includes :
  • the chrominance signal is supplied in a state of a digital signal sampled at the frequency of clocks of the image pickup element.
  • an externally input luminance signal is supplied in a state of an analog signal
  • an externally input chrominance signal is supplied in a state of a digital signal which is sampled at a frequency four times that of a subcarrier.
  • a luminance signal supplied from the solid-state image pickup element and an externally input luminance signal are supplied in an analog state
  • color-difference signals are supplied to the digital recording device in a state of digital color-difference signals at the sampling frequency of the solid-state image pickup element
  • an externally input chrominance signal is supplied after it is sampled at a frequency four times that of the subcarrier, and the sampled signal is converted into digital color-difference signals. Therefore, the arrangement of the circuit required for selecting one of a video signal input from the digital video camera and a video signal input from the external input terminal, and recording the selected signal on a recording medium can be simplified.
  • an externally input luminance signal to be supplied to the digital signal recording device is A/D-converted at the sampling frequency of the digital signal recording device
  • an externally input chrominance signal to be supplied to the digital signal recording device is A/D-converted at, e.g., a frequency four times the subcarrier frequency.
  • a signal from a solid-state image pickup element is A/D-converted and processed in a digital region, and the processed signal is then connected to an existing digital signal recording/reproduction device
  • digital color-difference signals from a camera unit are supplied to a modulation circuit without changing their sampling frequency, e.g., four times the subcarrier frequency, and color-difference output signals from the digital signal recording/reproduction device are frequency-converted and are then modulated in the digital region.
  • a signal from a solid-state image pickup element is A/D-converted and processed in a digital region, and the processed signal is then connected to an existing digital signal recording/reproduction device, the sampling frequency of digital color-difference signals from a camera unit is converted, and color-difference signals to be output are modulated in an analog region.
  • the number of components can be decreased, and an existing digital signal processing camera and an existing digital VTR can be easily connected.
  • An image pickup recording apparatus has an electronic zoom circuit for electronically enlarging or reducing an image.
  • the apparatus has a first clock for operating an image pickup unit, and a second clock, having a frequency different from that of the first clock, for operating a recording unit.
  • image pickup video signal data at the first clock rate is converted into video signal data at the second clock rate.
  • a circuit for separating and forming a luminance signal and a chrominance signal from a digital signal obtained by A/D-converting a color image pickup element output signal is constituted by a plurality of stages of delay circuits, a plurality of coefficient multipliers for respectively multiplying the outputs from the plurality of stages of delay circuits with predetermined coefficients, an adding up circuit for adding up the outputs from the plurality of coefficient multipliers, and a chrominance signal forming circuit for forming a chrominance signal using some of signals output from the plurality of stages of delay circuits.
  • image pickup video signal data at the first clock rate for operating the image pickup unit and video signal data at the second clock rate for operating the recording unit are converted in the electronic zoom circuit, a video signal formed by a camera can be recorded by a digital recorder without being D/A converted, thus minimizing deterioration of image quality.
  • the number of digital circuit portions increases, high integration, low power consumption, and high precision can be realized.
  • FIGS. 2A and 2B are a block diagram showing the arrangement of a video camera apparatus according to the first embodiment of the present invention.
  • a video signal obtained via a lens element 1, a solid-state image pickup device 2, a correlation double sampling circuit 3, and a gain adjustment circuit 4 is sampled by an A/D converter 5 at a clock frequency (MCLK) of the solid-state image pickup device 2 to be converted into a digital signal.
  • MCLK clock frequency
  • a digital signal processing circuit 6 generates a digital luminance signal and digital color-difference signals. Thereafter, the digital luminance signal is supplied as a band-limited analog luminance signal to a switch circuit 14 via a D/A converter 12 and a low-pass filter 13. The digital color-difference signals are supplied to switch circuits 15 and 16.
  • switch circuits 8 and 9 When YC-separated input signals are externally input as a video signal, these signals are directly input to switch circuits 8 and 9.
  • a composite video signal is input as an externally input video signal, the composite video signal is separated into luminance and chrominance signal by a luminance/chrominance separation circuit 7, and the separated signals are input to the switch circuits 8 and 9.
  • the switch circuit 8 is arranged for selecting a luminance signal Y
  • the switch circuit 9 is arranged for selecting a chrominance signal C.
  • the chrominance signal separated by the switch circuit 9 is supplied to an A/D converter 10.
  • the chrominance signal is converted into a digital signal by the A/D converter 10 at a frequency four times the subcarrier frequency, and the digital chrominance signal is supplied to a demodulation device 11.
  • the digital chrominance signal is converted into digital color-difference signals by the demodulation circuit 11.
  • the analog luminance signal and the digital color-difference signals from the camera, and the externally input analog luminance signal and digital color-difference signals are respectively selected by switch circuits 14 to 16.
  • the frequency band of the analog luminance signal is limited by a low-pass filter 17, and the band-limited signal is supplied to an A/D converter 18 to be converted into a digital luminance signal. At this time, sampling is performed at the sampling frequency of a digital VTR.
  • the frequencies of the digital color-difference signals are converted by sampling frequency conversion circuits 19 and 20 from the clock frequency (MCLK) of the solid-state image pickup device 2 or the frequency four times the subcarrier frequency to the sampling frequency of the digital VTR.
  • the converted digital luminance and color-difference signals are supplied to a digital signal recording device 21, and are recorded on a magnetic tape 22 by the digital signal recording device 21. Thus, a digital video signal is recorded.
  • switch circuits 25 to 27 are switched to the REC side, and the analog luminance signal is directly output.
  • the digital color-difference color-difference signals are converted into analog signals by D/A converters 28 and 29 which operate at the sampling frequency of the digital VTR, and the analog color-difference signals are modulated and converted into a chrominance signal by a modulation device 32.
  • the chrominance signal is output.
  • An EVF 33 performs a display operation using the output luminance and chrominance signals, and a displayed image is utilized for monitoring in an image pickup operation.
  • the digital signal recording device 21 receives a signal reproduced from the magnetic tape 22, and generates digital reproduced luminance and color-difference signals.
  • the reproduced luminance signal is converted into an analog luminance signal by a D/A converter 23 which operates at the sampling frequency of the digital VTR. Thereafter, the frequency band of the analog luminance signal is limited by a low-pass filter 24, thus obtaining an analog reproduced luminance signal.
  • Figs. 3A and 3B The second embodiment of the present invention will be described below with reference to Figs. 3A and 3B.
  • the same reference numerals in Figs. 3A and 3B denote the same parts as in Figs. 2A and 2B.
  • a video signal obtained via a lens element 1, a solid-state image pickup device 2, a correlation double sampling circuit 3, and a gain adjustment circuit 4 is sampled by an A/D converter 5 at a clock frequency (MCLK) of the solid-state image pickup device 2 to be converted into a digital signal.
  • MCLK clock frequency
  • a digital signal processing circuit 6 generates a digital luminance signal and digital color-difference signals. Thereafter, the digital luminance signal is supplied as a band-limited analog luminance signal to a digital signal recording device 21 via a D/A converter 12 and a low-pass filter 13 together with the digital color-difference signals.
  • YC-separated input signals are externally input as a video signal
  • these signals are input to switch circuits 8 and 9.
  • a composite video signal is input as an externally input video signal
  • the composite video signal is separated into luminance and chrominance signal by a luminance/chrominance separation circuit 7, and the separated signals are input to the switch circuits 8 and 9.
  • One of these video signals is selected by the switch circuits 8 and 9, and the selected video signal is supplied to subsequent circuits.
  • the chrominance signal is converted into a digital signal by an A/D converter 10 at a frequency four times the subcarrier frequency, and the digital signal is converted into digital color-difference signals by a demodulation device 11.
  • the analog luminance signal and the digital color-difference signals from a camera and the externally input analog luminance signal and digital color-difference signals are supplied to switch circuits 14 to 16, and signals selected by these switch circuits are supplied to subsequent circuits.
  • the frequency band of the analog luminance signal is limited by a low-pass filter 17, and the band-limited signal is converted into a digital luminance signal by an A/D converter 18. At this time, sampling is performed at the sampling frequency of a digital VTR.
  • the frequencies of the digital color-difference signals are converted by sampling frequency conversion circuits 19b and 20b from the clock frequency (MCLK) of the solid-state image pickup device 2 or the frequency four times the subcarrier frequency into the sampling frequency of the digital VTR.
  • a switch circuit 34 selects whether a connected device is a digital camera or an external input, and the sampling frequency conversion circuits 19b and 20b change coefficients based on the selection result so as to convert the clock frequency (MCLK) into the sampling frequency of the digital VTR or to convert the frequency four times the subcarrier frequency into the sampling frequency of the digital VTR.
  • MCLK clock frequency
  • the digital signal recording device 21 records the converted digital luminance and color-difference signals on a magnetic tape 22. Thus, a digital video signal is recorded. At this time, switch circuits 25 to 27 are switched to the REC side, and the analog luminance signal is directly output.
  • the digital color-difference signals are converted into analog color-difference signals by D/A converters 28 and 29 which operate at the sampling frequency of the digital VTR, and thereafter, the frequency bands of the analog color-difference signals are limited by low-pass filters 30 and 31.
  • the band-limited signals are modulated by a modulation device 32 to be converted into a chrominance signal.
  • the chrominance signal is output.
  • An EVF 33 performs a display operation using the output luminance and chrominance signals, and a displayed image is utilized for monitoring in an image pickup operation.
  • the digital signal recording device 21 receives a signal reproduced from the magnetic tape 22, and generates digital reproduced luminance and color-difference signals.
  • the reproduced luminance signal is converted into an analog luminance signal by a D/A converter 23 which operates at the sampling frequency of the digital VTR. Thereafter, the frequency band of the analog luminance signal is limited by a low-pass filter 24, thus obtaining an analog reproduced luminance signal.
  • the switch circuits 25 to 27 are switched to the PB side, and the analog luminance signal is directly output.
  • the digital color-difference color-difference signals are converted into analog signals by the D/A converters 28 and 29 which operate at the sampling frequency of the digital VTR. Thereafter, the analog color-difference signals are modulated by the modulation device 32 into a chrominance signal.
  • the chrominance signal is output as a reproduced video signal together with the luminance signal.
  • Fig. 4 shows the third embodiment of the present invention.
  • a video signal obtained via a lens element 101 and a solid-state image pickup element 102 is converted into a digital signal by an A/D converter 105 via a correlation double sampling circuit 103 and a gain adjustment circuit 104.
  • the video signal is sampled by the A/D converter 105 at a clock frequency (MCLK) of the solid-state image pickup element 102.
  • a digital signal processing circuit 106 generates a digital luminance signal Y and a digital chrominance signal C from the camera input signal.
  • the frequency of the digital luminance signal Y is converted by a frequency converter 134 from the clock frequency (MCLK) of the solid-state image pickup element 102 into a sampling frequency (about 13.5 MHz) of a digital signal recording/reproduction device (digital recorder) 113. Thereafter, the digital luminance signal is supplied to a selector 135.
  • the luminance signal Y from an external input terminal 110 is sampled at the sampling frequency (about 13.5 MHz) of the digital recorder 113 by an A/D converter 136 so as to be A/D-converted into a digital signal. Thereafter, the digital luminance signal is supplied to the selector 135.
  • the selector 135 selects one of the camera input luminance signal Y and the externally input luminance signal Y, and supplies the selected luminance signal to the digital recorder 113.
  • the digital chrominance signal C generated by the digital signal processing circuit 106 is supplied to a selector 137.
  • a chrominance signal C from an external input terminal 118 is sampled at a sampling frequency 4f sc four times a subcarrier frequency f sc by an A/D converter 138 so as to be converted into a digital signal.
  • the selector 137 selects one of the camera input chrominance signal C and the externally input chrominance signal C.
  • the output from the selector 137 is demodulated by a demodulator 119, thus obtaining digital color-difference signals R-Y and B-Y.
  • the sampling frequency of each color-difference signal is 4f sc , but the sampling frequency of the digital recorder 113 is about 13.5 MHz.
  • the color-difference signals R-Y and B-Y are subjected to frequency conversion by frequency converters 139a and 139b.
  • the digital color-difference signals having the sampling frequency of 13.5 MHz are input to the digital recorder 113, and are recorded on a tape 114 together with the digital luminance signal Y.
  • a digital video signal recorded on the tape 114 is reproduced by the digital recorder 113.
  • the digital reproduced luminance signal is converted into an analog signal by a D/A converter 141 at the sampling frequency of the digital recorder 113 via a selector 140, and the analog signal is output from an output terminal 125 as a luminance signal Y via a low-pass filter 142.
  • the output from the selector 135 is directly supplied to the selector 140 to monitor the luminance signal Y at the output terminal 125.
  • the reproduced digital color-difference signals R-Y and B-Y are subjected to frequency conversion by frequency converters 143 and 144, respectively.
  • the sampling frequency is converted from the sampling frequency (13.5 MHz) of the digital recorder 113 to 4f sc .
  • the frequency-converted color-difference signals are respectively supplied to selectors 145 and 146. These signals are modulated by a digital modulator 147 into a digital chrominance signal.
  • the digital chrominance signal is converted into an analog signal by a D/A converter 148 at the sampling frequency 4f sc , and the analog chrominance signal is output from an output terminal 132 as a chrominance signal C via a low-pass filter 149.
  • the outputs from the demodulator 119 are directly supplied to the selectors 145 and 146 without converting their sampling frequency from 4f sc , thus monitoring the chrominance signal C at the output terminal 132.
  • Fig. 5 shows the fourth embodiment of the present invention.
  • the same reference numerals in Fig. 5 denote the same parts as in Fig. 4.
  • the arrangement and operation in the recording mode, the arrangement and operation associated with the luminance signal Y in the reproduction mode are the same as those in Fig. 4. Therefore, the arrangement and operation associated with the chrominance signal in the reproduction mode will be explained below.
  • Digital reproduced color-difference signals R-Y and B-Y reproduced by a digital recorder 113 are respectively supplied to selectors 145 and 146. These signals are respectively converted into analog signals by D/A converters 150 and 151 at the sampling frequency of the digital recorder 113, and the analog signals are analog-modulated by a modulator 130 via low-pass filters 152 and 153, thus obtaining a chrominance signal C to be output to an output terminal 132.
  • the outputs from frequency converters 139a and 139b are supplied to the selectors 145 and 146, and after they are subjected to D/A conversion and modulation, the chrominance signal C at the output terminal 132 is monitored.
  • Fig. 6 shows the fifth embodiment of the present invention.
  • the same reference numerals in Fig. 6 denote the same parts as in Figs. 1A to 5.
  • a digital signal converted by an A/D converter 105 at a clock frequency (MCLK) of a solid-state image pickup element 102 is supplied to a digital signal processing circuit 106, thus generating a digital luminance signal Y and digital color-difference signals R-Y and B-Y.
  • MCLK clock frequency
  • the digital luminance signal Y is converted into an analog signal by a D/A converter 154 at the sampling frequency MCLK, and the analog signal is input to a selector 156 via a low-pass filter 155.
  • a luminance signal Y at an external input terminal 110 is input as an analog signal to the selector 156.
  • the selector 156 selects one of the camera input luminance signal Y and the externally input luminance signal Y.
  • the selected signal is filtered through a low-pass filter 157, and is then converted into a digital signal by an A/D converter 158 at the sampling frequency (about 13.5 MHz) of a digital recorder 113.
  • the digital signal is supplied to the digital recorder 113.
  • the digital color-difference signals R-Y and B-Y generated by the digital signal processing circuit 106 are respectively supplied as digital signals to selectors 159 and 160.
  • a chrominance signal C at an external input terminal 118 is converted into a digital signal by an A/D converter 161, and the digital signal is input to a demodulator 162, thus generating externally input color-difference signals R-Y and B-Y.
  • the selectors 159 and 160 select either the camera input color-difference signals or the externally input color-difference signals.
  • the sampling frequency of each of the color-difference signals output from the selectors 159 and 160 is 4f sc , but the sampling frequency of the digital recorder 113 is 13.5 MHz.
  • the color-difference signals R-Y and B-Y are subjected to frequency conversion by frequency converters 139a and 139b, respectively.
  • the digital color-difference signals having the sampling frequency of 13.5 MHz are input to the digital recorder 113, and are recorded on a tape 114 together with the luminance signal Y.
  • a digital reproduced luminance signal reproduced from the tape 114 by the digital recorder 113 is converted into an analog signal by a D/A converter 122 at a sampling frequency (about 13.5 MHz), and the analog signal is input to a selector 140 via a low-pass filter 123. Then, the analog luminance signal is output from an output terminal 125 as a luminance signal Y.
  • the output from the selector 156 is directly supplied to the selector 140, thus monitoring the luminance signal Y at the output terminal 125.
  • the frequencies of reproduced digital reproduced color-difference signals R-Y and B-Y are converted by frequency converters 143 and 144 from the sampling frequency of 13.5 MHz to 4f sc .
  • the frequency-converted color-difference signals are respectively supplied to selectors 145 and 146, and are modulated by a digital modulator 147, thus obtaining a chrominance signal.
  • the chrominance signal is converted into an analog signal by a D/A converter 148 at the sampling frequency 4f sc , and the analog signal is filtered through a low-pass filter 149, thus obtaining a chrominance signal C at an output terminal 132.
  • the outputs from the selectors 159 and 160 are supplied to the selectors 145 and 146 without converting their sampling frequencies from 4f sc , thus monitoring the chrominance signal C at the output terminal 132.
  • Fig. 7 shows the sixth embodiment of the present invention.
  • the same reference numerals in Fig. 7 denote the same parts as in Figs. 1A to 6.
  • the arrangement and operation in the recording mode, the arrangement and operation associated with the luminance signal Y in the reproduction mode are the same as those in the fifth embodiment. Therefore, the arrangement and operation associated with the chrominance signal in the reproduction mode will be explained below.
  • digital reproduced color-difference signals R-Y and B-Y reproduced by a digital recorder 113 are input to selectors 145 and 146. These signals are converted into analog signals by D/A converters 150 and 151 at a sampling frequency of 13.5 MHz, and the analog signals are filtered through low-pass filters 152 and 153. The filtered signals are then modulated by a modulator 130, and the modulated signal is output to an output terminal 132. In a recording mode, the outputs from frequency converters 139a and 139b are directly supplied to the selectors 145 and 146, thus monitoring a chrominance signal C at the output terminal 132.
  • an externally input luminance signal to be supplied to the digital recorder is A/D-converted at the sampling frequency of the digital recorder
  • an externally input chrominance signal to be supplied to the digital recorder is A/D-converted at a frequency four times the subcarrier frequency.
  • color-difference signals from a camera unit are supplied to the modulator without changing their frequency from the sampling frequency 4f sc .
  • the sampling frequency of color-difference output signals from the digital recorder is converted into 4f sc , and these color-difference signals are modulated in a digital region to generate a chrominance signal.
  • the sampling frequency of input color-difference signals R-Y and B-Y is converted from 4f sc into the sampling frequency of the digital recorder.
  • digital color-difference signals are D/A-converted at the sampling frequency, and the analog color-difference signals are modulated in an analog region to generate a chrominance signal.
  • the number of components can be decreased, and an existing digital camera and an existing digital signal recording/reproduction device such as a digital VTR can be easily connected.
  • FIGs. 8A and 8B are a block diagram showing the arrangement of an image pickup recording apparatus according to the seventh embodiment of the present invention.
  • an image pickup lens 201 includes a diaphragm and an optical filter.
  • the apparatus shown in Figs. 8A and 8B includes a CCD 202 as a color image pickup element, and a camera timing generator 203.
  • the camera timing generator 203 generates timing pulses necessary for the CCD 202, a signal processing circuit (to be described later), and the like.
  • the outputs from the CCD 202 are converted into a continuous output by a sample & hold (S/H) circuit 204.
  • S/H sample & hold
  • the apparatus includes A/D converters 205, 213, 215, and 216, and a camera signal processing circuit 206.
  • the camera signal processing circuit 206 performs filtering, color separation, gamma correction, gain adjustment, clipping, and the like by digital calculations.
  • the apparatus includes an electronic zoom circuit 207 for enlarging/reducing an image using a memory, Y (luminance)-C (chrominance) separated external video signal input terminals 208, and an external video input terminal 209 for a composite video signal.
  • the apparatus includes a YC separation circuit 210 for extracting Y and C signals from an input composite video signal, switch circuits 211 and 212 for switching the types of externally input signals in accordance with YC-separated (S) signals/composite (CO) signal, and a color demodulation circuit 214 for separating and demodulating color-difference signals R-Y and B-Y from the input C signal.
  • the apparatus includes a zoom terminal 217 for inputting a zoom signal ZOOM, switch circuits 218, 219, and 220 for switching the types of input signals in accordance with a switching signal CAMERA (image pickup signal)/LINE (external input), and a digital recorder circuit 221 for performing signal processing such as data compression/expansion, digital modulation/demodulation, and the like.
  • a zoom terminal 217 for inputting a zoom signal ZOOM
  • switch circuits 218, 219, and 220 for switching the types of input signals in accordance with a switching signal CAMERA (image pickup signal)/LINE (external input)
  • CAMERA image pickup signal
  • LINE external input
  • digital recorder circuit 221 for performing signal processing such as data compression/expansion, digital modulation/demodulation, and the like.
  • the apparatus includes a recording/reproduction head (magnetic head) 222, a digital video tape 223, switch circuits 224, 225, and 226 for switching the types of output signals in accordance with a switching signal REC (recording)/PB (reproduction), D/A converters 228, 229, and 230, low-pass filters 231, 232, and 233, a color modulation circuit 234 for receiving color-difference signals R-Y and B-Y and outputting a modulated chrominance signal C, and YC separated video output terminals 235.
  • a recording/reproduction head magnetic head
  • PB digital video tape 223
  • switch circuits 224, 225, and 226 for switching the types of output signals in accordance with a switching signal REC (recording)/PB (reproduction)
  • D/A converters 228, 229, and 230 D/A converters 228, 229, and 230
  • low-pass filters 231, 232, and 233 low-pass filters 231, 232
  • the camera recording mode will be described below.
  • the switch circuits 218, 219, and 220 are connected to the CAMERA (C) side, and the switch circuits 224, 225, and 226 are connected to the REC (R) side.
  • An object image formed on the image pickup surface of the CCD 202 by the image pickup lens 201 is photoelectrically converted by the CCD 202 into electrical signals, and the electrical signals are sequentially read out according to a driving signal generated by the camera timing generator 203, thus obtaining image pickup signals.
  • the image pickup signals are converted by the S/H circuit 204 into a continuous image pickup signal, and this signal is converted into a digital image pickup signal by the A/D converter 205.
  • the digital image pickup signal is subjected to the above-mentioned signal processing, i.e., filtering, color separation, gamma correction, clipping, and the like, by the camera signal processing circuit 206, thus obtaining a luminance signal Y and color-difference signals R-Y and B-Y.
  • These signals are then input to the electronic zoom circuit 207, and are subjected to enlargement or reduction processing according to a zoom signal ZOOM input from the zoom terminal 217.
  • the processed signals are then input to the digital recorder circuit 221 via the switch circuits 218, 219, and 220.
  • the input signals are subjected to processing such as data compression, digital modulation, and the like.
  • the digital recording signal output from the circuit 221 is recorded on the digital video tape 223 via the magnetic head 222.
  • the outputs from the switch circuits 218, 219, and 220 are respectively supplied to the D/A converters 228, 229, and 230 via the switch circuits 224, 225, and 226, and are D/A-converted by these D/A converters 228, 229, and 230.
  • the D/A-converted outputs from the switch circuits 218, 219, and 220 are supplied to the low-pass filters 231, 232, and 233, and low-frequency signals are extracted therefrom.
  • the output from the low-pass filter 231 is directly output as a luminance (Y) signal from the corresponding output terminal 235 to an external device such as a television monitor (not shown) as a monitor signal.
  • the outputs from the low-pass filters 232 and 233 are balanced-modulated by a color subcarrier in the color modulation circuit 234, thus obtaining a chrominance signal C.
  • the chrominance signal C is output from the corresponding output terminal 235 together with the above-mentioned Y signal.
  • the electronic zoom circuit 207 receives synchronization signals HD and VD generated by the camera timing generator 203, and operates in synchronism with these signals.
  • the CCD 202, the S/H circuit 204, the A/D converter 205, and the camera signal processing circuit 206 use a camera clock (to be referred to as a CCLK hereinafter) generated by the camera timing generator 203.
  • a camera clock to be referred to as a CCLK hereinafter
  • the former half circuit portion uses the CCLK
  • the latter half circuit portion uses a recorder clock (to be referred to as RCLK hereinafter) generated by the digital recorder circuit 221.
  • the clock rate conversion is performed.
  • the digital recorder circuit 221, and the D/A converters 228, 229, and 230 use the RCLK.
  • the CCD 202 and the like use a reference clock frequency (for example, 10 MHz in the case of a CCD having 250,000 pixels; about 14 MHz in the case of a CCD having 380,000 pixels) according to the number of pixels of the CCD, and the digital recorder circuit 221 uses a reference clock frequency (e.g., 13.5 MHz) determined by its recording format.
  • a reference clock frequency for example, 10 MHz in the case of a CCD having 250,000 pixels; about 14 MHz in the case of a CCD having 380,000 pixels
  • the clock frequency must be converted between these two frequencies.
  • a memory and an interpolation circuit included in the electronic zoom circuit can be commonly used by other circuits, thus simplifying the arrangement of the overall apparatus.
  • the external input recording mode will be described below.
  • the switch circuits 218, 219, and 220 are connected to the LINE (L) side, and the switch circuits 224, 225, and 226 are connected to the REC (R) side.
  • YC-separated signals When YC-separated signals are input as an externally input signal, these signals are input from the S input terminals 208. In this case, a Y signal is supplied to the A/D converter 213 via the switch circuit 211, and is A/D-converted into a digital Y signal.
  • a C signal is supplied to the color demodulation circuit 214 via the switch circuit 212, and is subjected to color demodulation, thus obtaining color-difference color-difference signals R-Y and B-Y. Then, these signals are respectively A/D-converted into digital color-difference signals R-Y and B-Y by the A/D converters 215 and 216.
  • an externally input signal is a composite video signal CO
  • it is input from the composite signal external input terminal 209.
  • the composite video signal is separated into Y and C signals by the YC separation circuit 210, and the Y and C signals are respectively converted into a digital Y signal and digital color-difference signals R-Y and B-Y by the color demodulation circuit 214 and the A/D converters 213, 215, and 216 via the switch circuits 211 and 212, in the same manner as described above.
  • the outputs from the switch circuits 218, 219, and 220 are output from the video signal output terminals 235 as monitor signals like in the camera recording mode.
  • the A/D converters 213, 215, and 216, the digital recorder circuit 221, and the D/A converters 228, 229, and 230 use the RCLK.
  • the digital recorder circuit 221 uses the reference clock frequency determined by its recording format, the A/D converters 213, 215, and 216 are also operated using the same clock as the recorder circuit 221, thus simplifying the arrangement of the overall apparatus.
  • the switch circuits 224, 225, and 226 are connected to the PB (P) side.
  • a digital video signal recorded on the digital video tape 223 is reproduced by the magnetic head 222, and is converted into an electrical signal.
  • the electrical signal is supplied to the digital recorder circuit 221, and is subjected to processing such as digital demodulation, digital expansion, and the like, thus generating digital video signals Y, R-Y, and B-Y.
  • These signals are output as monitor signals from the video signal output terminals 235 in the same manner as in the above-mentioned two modes.
  • the digital recorder circuit 221, and the D/A converters 228, 229, and 230 use the RCLK.
  • a camera signal processing system is operated using a clock optimal for the CCD and its processing system, a signal with high image quality can be obtained.
  • an externally input signal processing system directly uses the clock of the digital recorder circuit, its circuit arrangement can be simplified. In particular, even when a synchronization signal of an externally input signal suffers from a temporal change component (jitter), the influence of the jitter can be minimized.
  • jitter temporal change component
  • Fig. 9 shows the detailed arrangement of the electronic zoom circuit 207 in the embodiment shown in Figs. 8A and 8B.
  • the digital zoom circuit 207 comprises input terminals 401 to 408, a coefficient circuit 409, a multiplier 410, a control circuit 411, a zoom processing circuit 412 for performing enlargement processing of one signal, and output terminals 426, 427, and 428.
  • the zoom processing circuit 412 includes a field memory 413 for memorizing an image signal for one vertical period, a line memory 414 for memorizing an image signal for one horizontal period, flip-flops (FFs) 415 and 416 each for delaying an image signal for one pixel, multipliers 417, 418, 419, and 420, and adders 421, 422, and 423.
  • FFs flip-flops
  • the circuit 207 also comprises zoom processing circuits 424 and 425, which are the same as the circuit 412. In Fig. 9, these circuits 424 and 425 are not illustrated in detail for the sake of simplicity.
  • an image signal uses signal lines corresponding to its data width, e.g., 8 bits. However, these signal lines for the image signal are illustrated as a single line for the sake of simplicity.
  • a zoom signal ZOOM input from the zoom signal input terminal 402 is input to the control circuit 411 as a vertical zoom coefficient VZOOM, and is also input to the multiplier 410.
  • the other input terminal of the multiplier 410 receives a coefficient signal from the coefficient circuit 409.
  • the coefficient circuit 409 stores a ratio FRCLK/FCCLK between a frequency FCCLK of the CCLK supplied from the camera timing generator 203 in Figs. 8A and 8B and a frequency FRCLK of the RCLK supplied from the digital recorder circuit 221.
  • a product between this value and the zoom signal is output from the multiplier 410, and is supplied to the control circuit 411 as a horizontal zoom coefficient HZOOM.
  • the control circuit 411 calculates the position on the screen based on input signals HD, VD, and RCK, and generates interpolation coefficients X1, X2, X3, and X4, a horizontal clock enable signal CE, and a read horizontal synchronization signal RHD.
  • the circuit 411 controls the operation of the electronic zoom circuit 207 using these signals.
  • a luminance signal Y input from the Y input terminal 403 is input to the zoom processing circuit 412, and a signal for one vertical period is stored in the field memory 413.
  • the field memory 413 is a memory called a dual-port memory.
  • the memory 413 receives an input image signal DIN in synchronism with a clock WCK, the horizontal synchronization signal HD, the vertical synchronization signal VD, and a horizontal synchronization enable signal WHC for the write mode.
  • the output from the memory 413 is input to a data input terminal DIN of the line memory 414.
  • the line memory 414 stores an input signal in accordance with the horizontal synchronization signal HD and the clock enable signal CE, and outputs the stored signal from a terminal DOUT.
  • the output signals from the field memory 413 and the line memory 414 are respectively input to the multipliers 417 and 419, and are delayed by one pixel by the flip-flops 415 and 416.
  • the delayed outputs are respectively input to the multipliers 418 and 420.
  • the multipliers 417, 418, 419, and 420 respectively receive the outputs X1, X2, X3, and X4 from the control circuit 411 at their other terminals, and product signals with these outputs are added to each other by the adders 421, 422, and 423 to obtain a Y output signal YOUT.
  • the signal YOUT is output from the Y output terminal 426.
  • Color-difference signals R-Y and B-Y are respectively input from the input terminals 407 and 408, are processed by the zoom processing circuits 424 and 425 in the same manner as the above-mentioned Y signal, and are respectively output from the color-difference output terminals 427 and 428.
  • the horizontal clock enable signal RCE is generated once per two RCLK clocks, the same output is obtained for every two output pixels.
  • the line memory 414 outputs signals obtained by delaying these pixels by one horizontal period.
  • signals of four pixels i.e., the current pixel P(x,y), its left neighboring pixel P(x-1,y), its upper neighboring pixel P(x,y-1), and its upper left neighboring pixel (x-1,y-1), are obtained in the multipliers 417 to 420 for every two clock periods.
  • the multipliers 417 to 420 receive the same signals as in the previous line for every two RCLK clock periods in the same manner as in the previous line.
  • the zoom processing circuits 424 and 425 output image signals obtained by enlarging the color-difference signals R-Y and B-Y in the horizontal and vertical directions in accordance with the zoom signal ZOOM and the output from the coefficient circuit 409 in the same manner as described above.
  • Fig. 10 is a detailed block diagram showing the second arrangement of the electronic zoom circuit 207 in the embodiment of the present invention.
  • the same reference numerals in Fig. 10 denote the same or corresponding parts as in Fig. 9.
  • the circuit 207 comprises frame memories 430 and 431 which are the same as the frame memory 413.
  • the control circuit 411 receives the CCLK, and also receives, at the terminal VZOOM, the zoom signal ZOOM, and at the terminal HZOOM, a value obtained by multiplying the zoom signal ZOOM with the output from the coefficient circuit 409 by the multiplier 410 as in Fig. 9.
  • the output WHC from the control circuit 411 is a write horizontal synchronization enable signal for the frame memories 413, 430, and 431, and the output WCE is a write clock enable signal for the frame memories 413, 430, and 431. These outputs are input to the frame memories, and control their operations.
  • the output WHC from the control circuit 411 is generated once per two horizontal periods 2H, and in the field memory 413, a signal is written at the same horizontal position for two horizontal periods.
  • the write clock enable signal WCE is generated once per two CCLK clocks, signals are written at the same positions for every two input pixels.
  • the frame memories 430 and 431 output image signals obtained by reducing the color-difference signals R-Y and B-Y in the horizontal and vertical directions in accordance with the signal ZOOM and the output from the coefficient circuit 409 in the same manner as described above.
  • the circuits shown in Figs. 9 and 10 respectively exemplify the arrangements for realizing enlargement and reduction of an image.
  • the arrangement for realizing reduction and enlargement by a single circuit can be easily obtained.
  • a switch circuit need only be added to the circuit shown in Fig. 9, and an increase in the number of circuit components can be minimized.
  • Figs. 11A and 11B are a block diagram showing the arrangement according to the eighth embodiment of the present invention.
  • the same reference numerals in Figs. 11A and 11B denote the same or corresponding parts as in Figs. 8A and 8B.
  • an apparatus comprises an AGC circuit 501 for varying the gain of an input signal, and a synchronization separation circuit 502 for separating a synchronization signal from an input digital Y signal with a synchronization signal, and generating a clock LCLK synchronized with the separated synchronization signal.
  • the apparatus also comprises switch circuits 503 and 504 for selecting an input signal in accordance with a switching signal S/CO as in the switch circuit 211, and a switch circuit 505 for switching an input signal in accordance with a switching signal C/L as in the switch circuits 218, 219, and 220.
  • YC separation circuit 210 and the color demodulation circuit 214 are arranged to process digital signals unlike in Figs. 8A and 8B.
  • the apparatus when the switch circuits 218, 219, 220, 224, 225, and 226 are switched in accordance with signals CAMERA/LINE and REC/PB generated by a control signal (not shown), the apparatus operates in three major modes, i.e., camera recording, external input recording, and reproduction modes. Operations in these modes will be described in turn below.
  • the camera recording mode will be described below.
  • the switch circuits 218, 219, 220, and 505 are connected to the CAMERA (C) side, and the switch circuits 224, 225, and 226 are connected to the REC (R) side.
  • the operation from the lens 201 to the camera signal processing circuit 206 is the same as that of the circuit shown in Figs. 8A and 8B.
  • a luminance signal Y and color-difference signals R-Y and B-Y output from the camera signal processing circuit 206 are input to the electronic zoom circuit 207 via the switch circuits 218, 219, and 220.
  • the CCLK generated from the camera timing generator 203 is input to the electronic zoom circuit 207 via the switch circuit 505.
  • the electronic zoom circuit 207 enlargement or reduction processing is performed at a magnification according to a zoom signal input from the zoom terminal 217 as in Figs. 8A and 8B.
  • the former half circuit portion uses the CCLK
  • the latter half circuit portion uses the RCLK generated by the digital recorder circuit 221
  • conversion of the clock rates is performed at a joint portion between these circuit portions.
  • the outputs from the electronic zoom circuit are input to the digital recorder circuit 221 in the same manner as in Figs. 8A and 8B, and thereafter, the same operation as in Figs. 8A and 8B is performed.
  • the external input recording mode will be described below.
  • the switch circuits 218, 219, 220, and 505 are connected to the LINE (L) side, and the switch circuits 224, 225, and 226 are connected to the REC (R) side.
  • a Y signal is supplied to the AGC circuit 501 via the switch circuit 211, and its signal level is adjusted in accordance with a synchronization signal SYNC (to be described later), so that the synchronization signal portion has a predetermined level.
  • the output from the AGC circuit 501 is A/D-converted by the A/D converter 213.
  • the digital Y signal as the output from the A/D converter 213 is input to the electronic zoom circuit 207 via the switch circuits 503 and 218.
  • the digital Y signal is also input to the synchronization separation circuit 502, thus generating a synchronization signal SYNC and an external input clock LCLK synchronized with the signal SYNC.
  • the external input clock LCLK is generated by, e.g., a phase-locked loop (PLL), to have a frequency corresponding to an integer multiple of the horizontal synchronization frequency in the synchronization signal and the color subcarrier frequency.
  • the clock LCLK is supplied to the electronic zoom circuit 207 via the A/D converters 213 and 215, the YC separation circuit 210, the color demodulation circuit 214, and the switch circuit 505.
  • a chrominance signal C input from the corresponding S input terminal 208 is A/D-converted into a digital chrominance signal by the A/D converter 215, and the digital chrominance signal is supplied to the color demodulation circuit 214 via the switch circuit 504.
  • the digital chrominance signal is demodulated into color-difference signals R-Y and B-Y by the circuit 214, and the color-difference signals R-Y and B-Y are input to the electronic zoom circuit 207 via the switch circuits 219 and 220, respectively.
  • an externally input signal is a composite video signal CO
  • the signal CO is input from the composite signal external input terminal 209, and is supplied to the AGC circuit 501 via the switch circuit 211.
  • the signal level of the composite video signal CO is adjusted by the circuit 501 in accordance with the synchronization signal, so that its synchronization signal portion has a predetermined level, in the same manner as described above.
  • the output from the AGC circuit 501 is A/D-converted by the A/D converter 213.
  • the digital composite video signal as the output from the A/D converter 213 is separated into Y and C signals by the YC separation circuit 210.
  • the Y signal is input to the electronic zoom circuit 207 via the switch circuits 503 and 218.
  • the chrominance signal C is demodulated into digital color-difference signals R-Y and B-Y by the color demodulation circuit 214 via the switch circuit 504 in the same manner as described above.
  • the color-difference signals are input to the electronic zoom circuit 207 via the switch circuits 219 and 220.
  • the electronic zoom circuit 207 enlargement or reduction processing is performed at a magnification according to a zoom signal input from the zoom terminal 217 as in Figs. 8A and 8B.
  • the former half circuit portion uses the LCLK
  • the latter half circuit portion uses the RCLK generated by the digital recorder circuit 221
  • conversion of the clock rates is performed at a joint portion between these circuit portions.
  • the outputs from the electronic zoom circuit 207 are input to the digital recorder circuit 221 in the same manner as in Figs. 8A and 8B, and thereafter, the same operation as in Figs. 8A and 8B is performed.
  • the Y signal of S input signals, and the composite input signal are subjected to level adjustment of the single AGC circuit. For this reason, even when the level of an externally input signal does not have a normal value, or when the level varies, deterioration of image quality can be suppressed.
  • YC separation, color demodulation, and synchronization separation are performed using digital signals, deterioration or aging of characteristics caused by crosstalk of signals between adjacent circuits, a change in circuit components due to a change in temperature, variations in individual circuit components, and the like can be prevented.
  • the circuit When the circuit is realized by a single semiconductor integrated circuit, an apparatus having a high integration degree, low cost, and low power consumption can be realized. Only two A/D converters for external inputs are required. Special effects such as enlargement, reduction, and the like can be similarly applied to an externally input signal as in a camera photographing mode.
  • Fig. 12 shows the detailed arrangement of main part of the electronic zoom circuit 207 in Figs. 11A and 11B according to the eighth embodiment of the present invention. Circuit portions other than those shown in Fig. 12 are the same as those in Fig. 9 or 10.
  • the circuit 207 includes a switch circuit 510, and coefficient circuits 511 and 512 respectively having coefficients K1 and K2.
  • a zoom signal ZOOM input from the zoom input terminal 402 is input to the control circuit 411 as a vertical zoom signal VZOOM, and is simultaneously input to the multiplier 410.
  • the output from the multiplier 410 is input to the control circuit 411 as a horizontal zoom signal HZOOM.
  • One of the coefficients K1 and K2 of the coefficient circuits 511 and 512 is selected by the switch circuit 510 in accordance with a camera/external input switching signal, and the selected coefficient is input to the other input of the above-mentioned multiplier 410.
  • the control circuit 411 generates interpolation coefficients X1, X2, X3, and X4, and the CE and RHD in accordance with the above-mentioned inputs RCLK, HD, VD, VZOOM, and HZOOM, and performs enlargement, reduction, and clock rate conversion in the same manner as in Fig. 9 or 10.
  • the clock rate can be converted at an appropriate ratio in correspondence with the camera recording mode or the external input recording mode. In this case, an increase in the number of circuit components can be minimized.
  • an apparatus includes an image pickup lens 201, a CCD 202 as a color image pickup element, an S/H circuit 204, and an A/D converter 205.
  • the apparatus also includes a filter color separation block 255 for obtaining a luminance signal Y 0 , a luminance signal Y 1 delayed from Y 0 by one horizontal period (to be referred to as 1H hereinafter), and chrominance signals Y L , C R , and C B .
  • the apparatus further includes a low-pass filter 256 and a color separation matrix circuit 257 for performing a matrix calculation of the input chrominance signals Y L , C R , and C B to obtain primary color signals R, G, and B.
  • the apparatus also includes a white balance circuit 258 for multiplying the input signals R, G, and B with coefficients according to the object illumination light color temperature, a gamma circuit 259 for performing gamma correction of the input signals R, G, and B, a color-difference matrix 260 for synthesizing color-difference signals R-Y and B-Y from the input signals R, G, and B, and a modulation circuit 261 for performing quadrature modulation of the input signals R-Y and B-Y with a color subcarrier.
  • a white balance circuit 258 for multiplying the input signals R, G, and B with coefficients according to the object illumination light color temperature
  • a gamma circuit 259 for performing gamma correction of the input signals R, G, and B
  • a color-difference matrix 260 for synthesizing color-difference signals R-Y and B-Y from the input signals R, G, and B
  • a modulation circuit 261 for performing quadrature modulation of the input
  • the apparatus also includes a burst adder 262, a chrominance signal output terminal 263, a subtracter 264, a vertical aperture signal processing circuit (VAPC processing) 265 including gain varying processing, base clipping processing, and low-pass filter processing, an adder 266, a gamma circuit 267, a white black clipping circuit 268, a delay circuit 269, a synchronization adder 270, and a Y output terminal 271.
  • VAPC processing vertical aperture signal processing circuit
  • an object image (not shown) is formed on the photoelectric conversion surface of the CCD 202 via the image pickup lens 201, and is photoelectrically converted into image pickup signals.
  • the image pickup signals are output to the S/H circuit 204.
  • the image pickup signals are converted into a continuous signal by the S/H circuit 204, and the continuous signal is A/D-converted into a digital image pickup signal by the A/D converter 205.
  • the digital image pickup signal is converted into chrominance signals Y L , C R , and C B , and luminance signals Y 0 and Y 1 by the filter color separation block 255.
  • the chrominance signals Y L , C R , and C B are formed as follows. More specifically, four different types of small color filters Y e , C y , M g , and G are formed on the photoelectric conversion portion of the CCD 202. In a read operation, the CCD 202 adds and reads outputs from these filters as four combinations Y e + M g , C y + G, Y e + G, and C y + M g by an interlace operation. These combinations will be referred to as W r , G b , G r , and W b for the sake of simplicity.
  • the obtained signals Y L , C R , and C B are input to the low-pass filter 256 to extract their low-frequency components. Then, the color separation matrix performs the following matrix calculation of the input signals Y L , C R , and C B to separate the primary color components R, G, and B:
  • the components R, G, and B obtained as described above are adjusted by the white balance circuit 258 by multiplying them with the reciprocal ratio of the color component ratio in object illumination light, so that the components R, G, and B of a white object have a ratio of 1 : 1 : 1. Thereafter, the components R, G, and B are subjected to predetermined gamma correction in the gamma circuit 259.
  • the color-difference matrix 260 performs a predetermined calculation to obtain color-difference signals R-Y and B-Y.
  • the color-difference signals are subjected to quadrature modulation in the modulation circuit 261, and a burst signal is added to the modulated signal by the burst adder 262.
  • the chrominance signal output from the adder 262 is directly output from the C output terminal 263, or is output to an external device such as a television, a VTR, or the like after D/A conversion.
  • the signals Y 0 and Y 1 output from the filter color separation block 255 are input to the subtracter 264 to obtain a signal Y 1 -Y 0 .
  • This signal is subjected to gain varying processing, base clipping processing, and low-pass filter processing in the VAPC processing circuit 265 so as to form a vertical aperture signal.
  • the vertical aperture signal is added to the signal Y 0 by the adder 266, and the sum signal is subjected to gamma correction in the gamma circuit 267. Then, the signal output from the circuit 267 is clipped at predetermined white and black levels in the white ⁇ black slipping circuit 268, and is then delayed by the delay circuit 269.
  • the delay amount of the delay circuit 269 is set to be a delay amount corresponding to the difference between these total numbers.
  • the output from the delay circuit 269 is added to a synchronization signal by the synchronization adder 270, and the sum signal is connected to an external device via the Y output terminal 271 in the same manner as the above-mentioned signal.
  • Fig. 14 is a block diagram showing in detail the arrangement of the filter color separation block 255 in Fig. 13.
  • the block 255 includes a delay line (1H D.L.) 901 for 1H, and delay elements 902, 903, 904, 905, 906, 907, 924, 925, 926, 927, 928, and 929 such as D-type flip-flops.
  • the block 255 also includes coefficient multipliers 908, 909, 910, 911, 912, 913, 914, 930, 931, 932, 933, 934, 935, and 936 respectively having predetermined coefficients K 1 to K 7 .
  • the block 255 further includes adding up circuits 915 and 937 for adding up all input signals, adders 916, 921, and 938, 1/2 coefficient multipliers 917 and 939, switch circuits 918, 919, 922, 923, 940, and 941, and subtracters 920 and 942.
  • an input signal S in is delayed by the delay elements 902 to 907, and the signal S in and the outputs from these delay elements are respectively multiplied with the coefficients K 1 to K 7 by the coefficient multipliers 908 to 914.
  • These product signals are added up by the adding up circuit 915, thus forming and outputting the luminance signal Y 0 .
  • the input signal S in and the output from the delay element 903 are added to each other by the adder 916, and the sum signal is multiplied with 1/2 by the coefficient multiplier 917. Then, the product signal and the output from the delay element 902 are alternately selected by the switch circuits 918 and 919 in accordance with a switching signal S 1 .
  • This switching signal S 1 is used for switching signals in accordance with the arrangement of the color filters on the CCD 202 in synchronism with the horizontal scanning clock.
  • the outputs from the switch circuits 918 and 919 are added to each other to obtain the signal Y L , and at the same time, a difference between these outputs is calculated by the subtracter 920.
  • the output from the subtracter 920 and the output from the subtracter 942 (to be described later) are alternately switched by the switch circuits 922 and 923 in accordance with a switching signal S 2 , thus forming and outputting the signals C R and C B .
  • the input signal S in is delayed by 1H by the delay line 901, and the luminance signal Y 1 delayed from Y 0 by 1H is generated and output by the delay elements 924 to 929, the coefficient multipliers 930 to 936, and the adding up circuit 937 in the same manner as described above.
  • the outputs from the delay line 901 and the delay element 925 are added to each other and multiplied with 1/2 via the adder 938 and the coefficient multiplier 939, and the output from the coefficient multiplier 939 and the output from the delay element 924 are alternately selected by the switch circuits 940 and 941.
  • the difference between the outputs from the switch circuits 940 and 941 is calculated by the subtracter 942, and as described above, the output from the subtracter 942 and the output from the subtracter 920 are alternately selected to form and output the signals C R and C B .
  • H 1 (Z) K 1 + Z -1 ⁇ K 2 + Z -2 ⁇ K 3 + Z -3 ⁇ K 4 + Z -4 ⁇ K 5 + Z -5 ⁇ K 6 + Z -6 ⁇ K 7
  • the group delay time is 3 ⁇ ( ⁇ is the delay time per stage of the delay element).
  • Y 1 the group delay time in the horizontal direction is assumed to be 3 ⁇ .
  • the signals Y L , C R , and C B are output earlier by 2 ⁇ than the signals Y 0 and Y 1 , and the number of stages of the above-mentioned delay circuit 269 can be decreased.
  • Fig. 15 is a block diagram showing another embodiment of the filter color separation block.
  • the same reference numerals in Fig. 15 denote the same parts as in Fig. 14.
  • the filter color separation block includes a 1H delay line 943, an adder 944, and a coefficient multiplier 945 having a coefficient of 1/2.
  • An input signal S 1 is added to a 2H-delayed signal (to be described later) by the adder 944, and the sum signal is multiplied with 1/2 by the coefficient multiplier 945. Thereafter, the product signal is input to the delay element 902, the coefficient multiplier 908, and the adder 916 in the same manner as in Fig. 14.
  • the output from the delay line 901 is input to the delay element 924, the coefficient multiplier 930, and the adder 938 as in Fig. 14, and is simultaneously input to the 1H delay line 943.
  • the delay line 943 further delays the input signal by 1H, and outputs a signal delayed by a total of 2H.
  • the 2H-delayed signal is added to the signal S in by the adder 944, as described above. The following operation is the same as that in Fig. 14.
  • the digital recorder circuit performs recording/reproduction of an image.
  • the present invention is not limited to this.
  • the present invention can be applied to recording/reproduction apparatuses which receive digital signals.
  • image pickup video signal data having the first clock rate for operating an image pickup unit and video signal data having the second clock rate for operating the recording unit are converted in the electronic zoom circuit for electronically enlarging or reducing an image
  • a video signal formed by the camera can be recorded by the digital recorder without being D/A-converted.
  • deterioration of image quality can be minimized.
  • the memory and interpolation circuit in the electronic zoom circuit can be commonly used, recording/reproduction of a camera signal and an external signal can be realized by adding a small number of components to the circuit for realizing an electronic zoom function. Therefore, the power consumption and mounting area can be minimized, and the arrangement of the overall apparatus can be simplified.
  • a digital image pickup signal processing circuit can be realized without increasing the circuit scale.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Color Television Image Signal Generators (AREA)
  • Television Signal Processing For Recording (AREA)
  • Processing Of Color Television Signals (AREA)

Claims (9)

  1. Digitale Signalaufzeichnungseinrichtung (10 - 21) zur digitalen Aufzeichnung eines Bildes auf ein Videoband (22) mit einer Abtastfrequenz, wobei die digitale Signalaufzeichnungseinrichtung (10 - 21) eingerichtet ist, digitale Leuchtdichte- und digitale Farbinformationssignale und analoge Leuchtdichte- und analoge Farbinformationssignale (Y, C) zu empfangen, dadurch gekennzeichnet, daß die Aufzeichnungseinrichtung (10 - 21) ausgestattet ist mit:
    einem A/D-Wandler (18), der das analoge Leuchtdichtesignal (Y) mit der Abtastfrequenz in ein digitales Leuchtdichtesignal umsetzt, und mit
    einem A/D-Wandler (10), der das analoge Farbinformationssignal (C) mit einer Frequenz gemäß einem ganzzahligen Vielfachen der Unterträgerfrequenz in ein digitales Signal umsetzt, wobei sich die Frequenz von der Abtastfrequenz unterscheidet.
  2. Digitale Signalaufzeichnungseinrichtung (10 - 21) nach Anspruch 1, die des weiteren eingerichtet ist zur Wiedergabe auf einem Videoband (22) digital aufgezeichneter Bilder, die des weiteren ausgestattet ist mit:
    einem Frequenzumsetzer (19, 20) zum Umsetzen einer Abtastfrequenz digitaler Farbinformationssignale in die Abtastfrequenz der digitalen Aufzeichnungseinrichtung (10 - 21); und mit
    digitalen Modulationsmitteln (28 - 32) zur Modulation von digitalen Farbinformationssignalen, die die digitale Aufzeichnungseinrichtung (10 - 21) wiedergibt oder die ein digitales Verarbeitungsmittel (6) erzeugt und der Frequenzumsetzer (19, 20) umsetzt.
  3. Digitale Signalaufzeichnungseinrichtung nach Anspruch 2, deren digitales Modulationsmittel (30 - 32) einen D/A-Wandler (28, 29) zur D/A-Wandlung von digitalen Farbinformationssignalen enthält, die die digitale Aufzeichnungseinrichtung (10 - 21) wiedergibt oder die das digitalen Verarbeitungsmittel (6) erzeugt und der Frequenzumsetzer (19, 20) umsetzt; und mit
       einem analogen Modulationsmittel (32), das das Ausgangssignals vom D/A-Wandler (28, 29) moduliert.
  4. Gerät nach einem der vorstehendne Ansprüche, dessen Signalaufzeichnungseinrichtung des weiteren ausgestattet ist mit:
       einem D/A-Wandler (12), der ein empfangenes digitales Leuchtdichtesignal in ein analoges Leuchtdichtesignal umsetzt, wobei der A/D-Wandler (18), der ein analoges Leuchtdichtesignal in ein digitales Leuchtdichtesignal umsetzt, eingerichtet ist zum Umsetzen eines empfangenen analogen Leuchtdichtesignals oder eines vom D/A-Wandler (12) umgesetzten digitalen Leuchtdichtesignals.
  5. Gerät nach einem der vorstehenden Ansprüche, dessen A/D-Wandler (10), der das analoge Farbdichtesignal umsetzt, eingerichtet ist zum Umsetzen des Signals mit einer Frequenz, die die vierfache einer Unterträgerfrequenz ist.
  6. Digitale Videokamera, mit:
    einer digitalen Signalaufzeichnungseinrichtung (10 - 21) nach einem der vorstehenden Ansprüche;
    einem Bildaufnahmemittel (1 - 5) zum Erzeugen eines digitalen Bildsignals;
    einem digitalen Verarbeitungsmittel (6) zur Verarbeitung eines vom Bildaufnahmemittel (1 - 5) erzeugten digitalen Bildsignals, um ein digitales Leuchtdichtesignal und ein digitales Farbinformationssignal zu erzeugen; und mit
    einem Eingabemittel (7 - 9), das ein analoges Leuchtdichtesignal (Y) und ein analoges Farbinformationssignal (C) aus einer externen Einrichtung empfängt.
  7. Gerät nach Anspruch 6, dessen Bildaufnahmemittel (1 - 5) ausgestattet ist mit:
    einem analoges Bildaufnahmemittel (1 - 4), das ein analoges Bildsignal erzeugt; und mit
    einem A/D-Wandler (5), der das analoge Bildsignal in ein digitales Bildsignal umsetzt.
  8. Digitales Videokameragerät nach Anspruch 6 oder 7, das des weiteren ausgestattet ist mit:
    einer elektronischen Zoomschaltung (202 - 221), die ein Bild elektronisch vergrößert oder verkleinert, mit:
    einem ersten Takt (203), der eine Abtastfrequenz für das Bildaufnahmemittel (1 - 5) bestimmt; und mit
    einem zweiten Takt (221) zum Betreiben der digitalen Signalaufzeichnungseinrichtung (10 - 21), wobei der zweite Takt (221) eine Frequenz hat, die sich von der Frequenz des ersten Taktes (203) unterscheidet;
    wobei eine Umsetzung vom Bildaufnahmemittel (1 - 5) erzeugter digitaler Bilddaten mit der ersten Taktrate in Bilddaten einer zweiten Taktrate in der elektronischen Zoomschaltung (202 - 221) erfolgt.
  9. Digitale Videokamera nach einem der Ansprüche 6, 7 oder 8, dessen digitales Verarbeitungsmittel (6) zum Verarbeiten eines vom Bildaufnahmemittel (1 - 5) erzeugten digitalen Bildsignals zum Erzeugen eines digitalen Leuchtdichtesignals und ein digitales Farbinformationssignal gebildet ist aus: einer Vielzahl von Stufen von Verzögerungsschaltungen, einer Vielzahl von Koeffizientenmultiplizierern, die Ausgangssignale aus der Vielzahl von Stufen der Verzögerungsschaltung mit vorbestimmten Koeffizienten multiplizieren, einer Aufaddierschaltung zum Aufaddieren der Ausgangssignale aus der Vielzahl von Koeffizientenmultiplizierern und aus einer Farbsignalerzeugungsschaltung, die ein Farbinformationssignal unter Verwendung einiger Ausgangssignale aus der Vielzahl von Stufen der Verzögerungsschaltungen erzeugt.
EP94301921A 1993-03-19 1994-03-17 Digitale Videokamera und Aufzeichnungsvorrichtung Expired - Lifetime EP0618739B1 (de)

Priority Applications (2)

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EP98201698A EP0868078B1 (de) 1993-03-19 1994-03-17 Digitale Videokamera mit elektronischer Zoomschaltung
EP98201701A EP0868090B1 (de) 1993-03-19 1994-03-17 Digitale Videokamera und Aufzeichnungsvorrichtung

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Application Number Priority Date Filing Date Title
JP08557493A JP3231133B2 (ja) 1993-03-19 1993-03-19 ディジタルビデオカメラ装置
JP8557493 1993-03-19
JP85574/93 1993-03-19
JP15298193 1993-05-31
JP152981/93 1993-05-31
JP15298193A JP3281454B2 (ja) 1993-05-31 1993-05-31 撮像記録装置
JP166318/93 1993-06-11
JP16631893 1993-06-11
JP5166318A JPH06351044A (ja) 1993-06-11 1993-06-11 ディジタルビデオカメラ装置

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EP98201701A Division EP0868090B1 (de) 1993-03-19 1994-03-17 Digitale Videokamera und Aufzeichnungsvorrichtung

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EP0618739B1 true EP0618739B1 (de) 1999-10-27

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EP98201701A Expired - Lifetime EP0868090B1 (de) 1993-03-19 1994-03-17 Digitale Videokamera und Aufzeichnungsvorrichtung
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US6380974B1 (en) 2002-04-30
KR940023231A (ko) 1994-10-22
DE69421309T2 (de) 2000-04-13
CN1048131C (zh) 2000-01-05
EP0868090A1 (de) 1998-09-30
DE69428140T2 (de) 2002-03-21
KR0139117B1 (en) 1998-05-15
CN1155227C (zh) 2004-06-23
US5570128A (en) 1996-10-29
US5966171A (en) 1999-10-12
CN1103741A (zh) 1995-06-14
EP0618739A2 (de) 1994-10-05
KR0139116B1 (en) 1998-05-15
US5552826A (en) 1996-09-03
EP0618739A3 (de) 1995-09-27
DE69429677D1 (de) 2002-02-21
EP0868078B1 (de) 2001-08-29
DE69421309D1 (de) 1999-12-02
US5572253A (en) 1996-11-05
KR0139134B1 (ko) 1998-05-15
US5572254A (en) 1996-11-05
EP0868078A1 (de) 1998-09-30
DE69428140D1 (de) 2001-10-04
DE69429677T2 (de) 2002-08-14
EP0868090B1 (de) 2002-01-16
CN1275860A (zh) 2000-12-06

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