DE69413477D1 - Addressing system for semiconductor integrated circuits - Google Patents
Addressing system for semiconductor integrated circuitsInfo
- Publication number
- DE69413477D1 DE69413477D1 DE69413477T DE69413477T DE69413477D1 DE 69413477 D1 DE69413477 D1 DE 69413477D1 DE 69413477 T DE69413477 T DE 69413477T DE 69413477 T DE69413477 T DE 69413477T DE 69413477 D1 DE69413477 D1 DE 69413477D1
- Authority
- DE
- Germany
- Prior art keywords
- integrated circuits
- semiconductor integrated
- addressing system
- addressing
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/06—Address interface arrangements, e.g. address buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5189931A JP2739809B2 (ja) | 1993-07-30 | 1993-07-30 | 半導体集積回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69413477D1 true DE69413477D1 (de) | 1998-10-29 |
DE69413477T2 DE69413477T2 (de) | 1999-05-12 |
Family
ID=16249609
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69413477T Expired - Lifetime DE69413477T2 (de) | 1993-07-30 | 1994-07-29 | Addressing system for semiconductor integrated circuits |
Country Status (5)
Country | Link |
---|---|
US (1) | US5511034A (de) |
EP (1) | EP0637132B1 (de) |
JP (1) | JP2739809B2 (de) |
KR (1) | KR100301606B1 (de) |
DE (1) | DE69413477T2 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5615164A (en) * | 1995-06-07 | 1997-03-25 | International Business Machines Corporation | Latched row decoder for a random access memory |
US5654660A (en) * | 1995-09-27 | 1997-08-05 | Hewlett-Packard Company | Level shifted high impedance input multiplexor |
US5687121A (en) * | 1996-03-29 | 1997-11-11 | Aplus Integrated Circuits, Inc. | Flash EEPROM worldline decoder |
US5822252A (en) * | 1996-03-29 | 1998-10-13 | Aplus Integrated Circuits, Inc. | Flash memory wordline decoder with overerase repair |
FI964950A (fi) | 1996-12-11 | 1998-06-12 | Nokia Telecommunications Oy | Resetoitava muistirakenne |
US5949266A (en) * | 1997-10-28 | 1999-09-07 | Advanced Micro Devices, Inc. | Enhanced flip-flop for dynamic circuits |
US5999459A (en) * | 1998-05-27 | 1999-12-07 | Winbond Electronics Corporation | High-performance pass-gate isolation circuitry |
US6349376B1 (en) * | 1998-07-07 | 2002-02-19 | Micron Technology, Inc. | Method for decoding addresses using comparison with range previously decoded |
KR100301252B1 (ko) | 1999-06-23 | 2001-11-01 | 박종섭 | 파워 온 리셋 회로 |
JP4712365B2 (ja) * | 2004-08-13 | 2011-06-29 | ルネサスエレクトロニクス株式会社 | 不揮発性半導体記憶装置および半導体記憶装置 |
US20080256551A1 (en) * | 2005-09-21 | 2008-10-16 | Freescale Semiconductor. Inc. | System and Method For Storing State Information |
JP4893393B2 (ja) * | 2007-03-15 | 2012-03-07 | 日本電気株式会社 | 差動型ラッチ、差動型フリップフロップ、lsi、差動型ラッチ構成方法、および、差動型フリップフロップ構成方法 |
JP5738450B2 (ja) * | 2014-04-10 | 2015-06-24 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | 半導体メモリ集積回路 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4660178A (en) * | 1983-09-21 | 1987-04-21 | Inmos Corporation | Multistage decoding |
JPS6070817A (ja) * | 1983-09-28 | 1985-04-22 | Hitachi Ltd | 論理回路 |
JPS61101113A (ja) * | 1984-10-24 | 1986-05-20 | Toshiba Corp | フリツプフロツプ回路 |
JP2560020B2 (ja) * | 1987-02-18 | 1996-12-04 | 株式会社日立製作所 | 半導体記憶装置 |
JPH02141993A (ja) * | 1988-11-21 | 1990-05-31 | Toshiba Corp | 半導体記憶装置 |
JPH03286494A (ja) * | 1990-03-30 | 1991-12-17 | Sharp Corp | 半導体記憶装置 |
JP2531829B2 (ja) * | 1990-05-01 | 1996-09-04 | 株式会社東芝 | スタティック型メモリ |
US5128897A (en) * | 1990-09-26 | 1992-07-07 | Sgs-Thomson Microelectronics, Inc. | Semiconductor memory having improved latched repeaters for memory row line selection |
JPH0574167A (ja) * | 1991-09-17 | 1993-03-26 | Nec Corp | 半導体記憶装置 |
JPH05144273A (ja) * | 1991-11-18 | 1993-06-11 | Mitsubishi Electric Corp | 半導体集積回路装置 |
JPH0684354A (ja) * | 1992-05-26 | 1994-03-25 | Nec Corp | 行デコーダ回路 |
-
1993
- 1993-07-30 JP JP5189931A patent/JP2739809B2/ja not_active Expired - Lifetime
-
1994
- 1994-07-29 KR KR1019940018613A patent/KR100301606B1/ko not_active IP Right Cessation
- 1994-07-29 US US08/282,429 patent/US5511034A/en not_active Expired - Lifetime
- 1994-07-29 EP EP94111895A patent/EP0637132B1/de not_active Expired - Lifetime
- 1994-07-29 DE DE69413477T patent/DE69413477T2/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5511034A (en) | 1996-04-23 |
JPH0745075A (ja) | 1995-02-14 |
DE69413477T2 (de) | 1999-05-12 |
KR100301606B1 (ko) | 2001-10-22 |
JP2739809B2 (ja) | 1998-04-15 |
EP0637132A3 (de) | 1995-09-20 |
EP0637132B1 (de) | 1998-09-23 |
EP0637132A2 (de) | 1995-02-01 |
KR950004268A (ko) | 1995-02-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC CORP., TOKIO/TOKYO, JP Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: ELPIDA MEMORY, INC., TOKYO, JP |