DE69231832D1 - Halbleiteranordnung ausgerüstet mit einem Hochspannungs-MISFET - Google Patents
Halbleiteranordnung ausgerüstet mit einem Hochspannungs-MISFETInfo
- Publication number
- DE69231832D1 DE69231832D1 DE69231832T DE69231832T DE69231832D1 DE 69231832 D1 DE69231832 D1 DE 69231832D1 DE 69231832 T DE69231832 T DE 69231832T DE 69231832 T DE69231832 T DE 69231832T DE 69231832 D1 DE69231832 D1 DE 69231832D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor device
- high voltage
- device equipped
- voltage misfet
- misfet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
- H01L29/1087—Substrate region of field-effect devices of field-effect transistors with insulated gate characterised by the contact structure of the substrate region, e.g. for controlling or preventing bipolar effect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17985991A JP3206026B2 (ja) | 1991-07-19 | 1991-07-19 | 高電圧用misfetを備える半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69231832D1 true DE69231832D1 (de) | 2001-06-28 |
DE69231832T2 DE69231832T2 (de) | 2001-11-22 |
Family
ID=16073165
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69231832T Expired - Lifetime DE69231832T2 (de) | 1991-07-19 | 1992-07-20 | Halbleiteranordnung ausgerüstet mit einem Hochspannungs-MISFET |
Country Status (4)
Country | Link |
---|---|
US (1) | US5319236A (de) |
EP (1) | EP0524030B1 (de) |
JP (1) | JP3206026B2 (de) |
DE (1) | DE69231832T2 (de) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5274259A (en) * | 1993-02-01 | 1993-12-28 | Power Integrations, Inc. | High voltage transistor |
JP3307481B2 (ja) * | 1993-11-05 | 2002-07-24 | 三菱電機株式会社 | 半導体装置 |
US5349223A (en) * | 1993-12-14 | 1994-09-20 | Xerox Corporation | High current high voltage vertical PMOS in ultra high voltage CMOS |
DE4405631C1 (de) * | 1994-02-22 | 1995-07-20 | Bosch Gmbh Robert | Integriertes Bauelement |
US5903032A (en) * | 1994-05-13 | 1999-05-11 | Texas Instruments Incorporated | Power device integration for built-in ESD robustness |
JP4775357B2 (ja) * | 1995-04-12 | 2011-09-21 | 富士電機株式会社 | 高耐圧ic |
JP3528420B2 (ja) * | 1996-04-26 | 2004-05-17 | 株式会社デンソー | 半導体装置およびその製造方法 |
JPH11297847A (ja) * | 1998-04-13 | 1999-10-29 | Nec Kyushu Ltd | 半導体装置及びその製造方法 |
GB2340999A (en) * | 1998-08-28 | 2000-03-01 | Ericsson Telefon Ab L M | Isolating MOS transistors from substrates |
DE19957532A1 (de) * | 1999-11-30 | 2001-06-07 | Infineon Technologies Ag | Halbleiterschaltungsanordnung und Verfahren zur Herstellung |
JP2002270830A (ja) * | 2001-03-12 | 2002-09-20 | Fuji Electric Co Ltd | 半導体装置 |
JP4166010B2 (ja) * | 2001-12-04 | 2008-10-15 | 富士電機デバイステクノロジー株式会社 | 横型高耐圧mosfet及びこれを備えた半導体装置 |
JP4508606B2 (ja) * | 2003-03-20 | 2010-07-21 | 株式会社リコー | 複数種類のウエルを備えた半導体装置の製造方法 |
JP4841106B2 (ja) | 2003-08-28 | 2011-12-21 | ルネサスエレクトロニクス株式会社 | Mis型半導体装置及びその製造方法 |
DE102004009521B4 (de) | 2004-02-27 | 2020-06-10 | Austriamicrosystems Ag | Hochvolt-PMOS-Transistor, Maske zur Herstellung einer Wanne und Verfahren zur Herstellung eines Hochvolt-PMOS-Transistors |
JP2006054247A (ja) * | 2004-08-10 | 2006-02-23 | Fuji Electric Device Technology Co Ltd | 半導体装置 |
JP4611270B2 (ja) * | 2006-09-27 | 2011-01-12 | Okiセミコンダクタ株式会社 | 半導体装置の製造方法 |
CN107452735B (zh) * | 2017-09-07 | 2024-05-07 | 湖南静芯微电子技术有限公司 | 一种嵌入无沟道型ldpmos的双向可控硅静电防护器件 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01147854A (ja) * | 1987-12-04 | 1989-06-09 | Nissan Motor Co Ltd | 半導体装置 |
US5047358A (en) * | 1989-03-17 | 1991-09-10 | Delco Electronics Corporation | Process for forming high and low voltage CMOS transistors on a single integrated circuit chip |
US5008719A (en) * | 1989-10-20 | 1991-04-16 | Harris Corporation | Dual layer surface gate JFET having enhanced gate-channel breakdown voltage |
-
1991
- 1991-07-19 JP JP17985991A patent/JP3206026B2/ja not_active Expired - Fee Related
-
1992
- 1992-07-14 US US07/913,493 patent/US5319236A/en not_active Expired - Lifetime
- 1992-07-20 DE DE69231832T patent/DE69231832T2/de not_active Expired - Lifetime
- 1992-07-20 EP EP92306642A patent/EP0524030B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0524030B1 (de) | 2001-05-23 |
EP0524030A3 (de) | 1995-03-22 |
EP0524030A2 (de) | 1993-01-20 |
JP3206026B2 (ja) | 2001-09-04 |
DE69231832T2 (de) | 2001-11-22 |
US5319236A (en) | 1994-06-07 |
JPH0529620A (ja) | 1993-02-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8320 | Willingness to grant licences declared (paragraph 23) | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: FUJI ELECTRIC SYSTEMS CO., LTD., TOKYO/TOKIO, JP |
|
R071 | Expiry of right |
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