DE69010546T2 - Hochfrequenz-Halbleiteranordnung. - Google Patents

Hochfrequenz-Halbleiteranordnung.

Info

Publication number
DE69010546T2
DE69010546T2 DE69010546T DE69010546T DE69010546T2 DE 69010546 T2 DE69010546 T2 DE 69010546T2 DE 69010546 T DE69010546 T DE 69010546T DE 69010546 T DE69010546 T DE 69010546T DE 69010546 T2 DE69010546 T2 DE 69010546T2
Authority
DE
Germany
Prior art keywords
semiconductor device
high frequency
frequency semiconductor
semiconductor
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69010546T
Other languages
English (en)
Other versions
DE69010546D1 (de
Inventor
Shutaro Nambu
Osamu Ishikawa
Chinatsu Azuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of DE69010546D1 publication Critical patent/DE69010546D1/de
Publication of DE69010546T2 publication Critical patent/DE69010546T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/10329Gallium arsenide [GaAs]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15151Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Wire Bonding (AREA)
DE69010546T 1989-04-17 1990-04-17 Hochfrequenz-Halbleiteranordnung. Expired - Fee Related DE69010546T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9711489 1989-04-17

Publications (2)

Publication Number Publication Date
DE69010546D1 DE69010546D1 (de) 1994-08-18
DE69010546T2 true DE69010546T2 (de) 1995-02-09

Family

ID=14183550

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69010546T Expired - Fee Related DE69010546T2 (de) 1989-04-17 1990-04-17 Hochfrequenz-Halbleiteranordnung.

Country Status (3)

Country Link
US (1) US5109270A (de)
EP (1) EP0393584B1 (de)
DE (1) DE69010546T2 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5256590A (en) * 1989-11-24 1993-10-26 Mitsubishi Denki Kabushiki Kaisha Method of making a shielded semiconductor device
FR2655195B1 (fr) * 1989-11-24 1997-07-18 Mitsubishi Electric Corp Dispositif a semiconducteurs comportant un blindage contre le rayonnement electromagnetique et procede de fabrication.
US5768109A (en) * 1991-06-26 1998-06-16 Hughes Electronics Multi-layer circuit board and semiconductor flip chip connection
US5444300A (en) * 1991-08-09 1995-08-22 Sharp Kabushiki Kaisha Semiconductor apparatus with heat sink
KR930006868A (ko) * 1991-09-11 1993-04-22 문정환 반도체 패키지
JP3044872B2 (ja) * 1991-09-25 2000-05-22 ソニー株式会社 半導体装置
DE4444808B4 (de) * 1993-12-17 2005-12-15 Denso Corp., Kariya Halbleitervorrichtung
JP2778587B2 (ja) * 1996-07-04 1998-07-23 日本電気株式会社 半導体装置
US6346842B1 (en) * 1997-12-12 2002-02-12 Intel Corporation Variable delay path circuit
JP2001196488A (ja) * 1999-10-26 2001-07-19 Nec Corp 電子部品装置及びその製造方法
US6442039B1 (en) 1999-12-03 2002-08-27 Delphi Technologies, Inc. Metallic microstructure springs and method of making same
US6828663B2 (en) 2001-03-07 2004-12-07 Teledyne Technologies Incorporated Method of packaging a device with a lead frame, and an apparatus formed therefrom
US7656236B2 (en) 2007-05-15 2010-02-02 Teledyne Wireless, Llc Noise canceling technique for frequency synthesizer
US8179045B2 (en) 2008-04-22 2012-05-15 Teledyne Wireless, Llc Slow wave structure having offset projections comprised of a metal-dielectric composite stack
US9202660B2 (en) 2013-03-13 2015-12-01 Teledyne Wireless, Llc Asymmetrical slow wave structures to eliminate backward wave oscillations in wideband traveling wave tubes
US10820412B1 (en) * 2019-10-08 2020-10-27 Cymmetrik Enterprise Co., Ltd. Circuit wire crossing structure and manufacturing method of the same

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3403438A (en) * 1964-12-02 1968-10-01 Corning Glass Works Process for joining transistor chip to printed circuit
US3657613A (en) * 1970-05-04 1972-04-18 Westinghouse Electric Corp Thin film electronic components on flexible metal substrates
US3942245A (en) * 1971-11-20 1976-03-09 Ferranti Limited Related to the manufacture of lead frames and the mounting of semiconductor devices thereon
US4232512A (en) * 1976-12-27 1980-11-11 Citizen Watch Co., Ltd. Solid state watch module construction
NL7713758A (nl) * 1977-12-13 1979-06-15 Philips Nv Halfgeleiderinrichting.
US4200975A (en) * 1978-05-30 1980-05-06 Western Electric Company, Incorporated Additive method of forming circuit crossovers
SU801143A1 (ru) * 1978-11-09 1981-01-30 Предприятие П/Я Г-4367 Перемычка дл соединени тонко-плЕНОчНыХ элЕМЕНТОВ МиКРОСХЕМ
EP0039160A3 (de) * 1980-04-29 1982-08-25 Minnesota Mining And Manufacturing Company Verfahren zum Verbinden elektrisch leitender Höcker an elektronische Schaltkreise
JPS5739559A (en) * 1980-08-20 1982-03-04 Citizen Watch Co Ltd Resin sealing method for ic
US4413308A (en) * 1981-08-31 1983-11-01 Bell Telephone Laboratories, Incorporated Printed wiring board construction
JPS59143351A (ja) * 1983-02-04 1984-08-16 Matsushita Electric Ind Co Ltd バンプ付フイルムキヤリアとその製造方法
JPS59143352A (ja) * 1983-02-05 1984-08-16 Matsushita Electric Ind Co Ltd バンプ付フイルムキヤリヤとその製造方法
US4527330A (en) * 1983-08-08 1985-07-09 Motorola, Inc. Method for coupling an electronic device into an electrical circuit
JPS6080230A (ja) * 1983-10-07 1985-05-08 Akita Denshi Kk 半導体装置およびその製法
JPS6092829U (ja) * 1983-11-30 1985-06-25 アルプス電気株式会社 マイクロ波トランジスタの取付構造体
US4670770A (en) * 1984-02-21 1987-06-02 American Telephone And Telegraph Company Integrated circuit chip-and-substrate assembly
US4736236A (en) * 1984-03-08 1988-04-05 Olin Corporation Tape bonding material and structure for electronic circuit fabrication
US4607276A (en) * 1984-03-08 1986-08-19 Olin Corporation Tape packages
JPS61135211A (ja) * 1984-12-05 1986-06-23 Mitsubishi Electric Corp マイクロ波半導体増幅器
US4649415A (en) * 1985-01-15 1987-03-10 National Semiconductor Corporation Semiconductor package with tape mounted die
JPS636852A (ja) * 1986-06-26 1988-01-12 Nec Corp 半導体装置
JPS63131561A (ja) * 1986-11-18 1988-06-03 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 電子パツケージ
JP2507475B2 (ja) * 1987-09-28 1996-06-12 株式会社東芝 フィルムキャリアを用いた半導体集積回路装置

Also Published As

Publication number Publication date
US5109270A (en) 1992-04-28
EP0393584A2 (de) 1990-10-24
DE69010546D1 (de) 1994-08-18
EP0393584B1 (de) 1994-07-13
EP0393584A3 (de) 1991-05-02

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Legal Events

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8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee