DE602005012028D1 - Nichtflüchtige Halbleiterspeicheranordnung und Leseverfahren - Google Patents

Nichtflüchtige Halbleiterspeicheranordnung und Leseverfahren

Info

Publication number
DE602005012028D1
DE602005012028D1 DE602005012028T DE602005012028T DE602005012028D1 DE 602005012028 D1 DE602005012028 D1 DE 602005012028D1 DE 602005012028 T DE602005012028 T DE 602005012028T DE 602005012028 T DE602005012028 T DE 602005012028T DE 602005012028 D1 DE602005012028 D1 DE 602005012028D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
volatile semiconductor
reading method
reading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005012028T
Other languages
English (en)
Inventor
Hidechika Kawazoe
Yukio Tamai
Atsushi Shimaoka
Hidenori Morimoto
Nobuyoshi Awaya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of DE602005012028D1 publication Critical patent/DE602005012028D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0023—Address circuits or decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30—Resistive cell, memory material aspects
    • G11C2213/31—Material having complex metal oxide, e.g. perovskite structure
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/79—Array wherein the access device being a transistor

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Read Only Memory (AREA)
DE602005012028T 2004-07-28 2005-07-27 Nichtflüchtige Halbleiterspeicheranordnung und Leseverfahren Active DE602005012028D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004219810 2004-07-28
JP2005193329A JP4189395B2 (ja) 2004-07-28 2005-07-01 不揮発性半導体記憶装置及び読み出し方法

Publications (1)

Publication Number Publication Date
DE602005012028D1 true DE602005012028D1 (de) 2009-02-12

Family

ID=35311289

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005012028T Active DE602005012028D1 (de) 2004-07-28 2005-07-27 Nichtflüchtige Halbleiterspeicheranordnung und Leseverfahren

Country Status (6)

Country Link
US (1) US7535746B2 (de)
EP (1) EP1622163B1 (de)
JP (1) JP4189395B2 (de)
KR (1) KR100745516B1 (de)
DE (1) DE602005012028D1 (de)
TW (1) TWI277973B (de)

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Also Published As

Publication number Publication date
EP1622163B1 (de) 2008-12-31
JP2006066052A (ja) 2006-03-09
KR100745516B1 (ko) 2007-08-02
EP1622163A1 (de) 2006-02-01
TWI277973B (en) 2007-04-01
JP4189395B2 (ja) 2008-12-03
KR20060053918A (ko) 2006-05-22
US7535746B2 (en) 2009-05-19
US20060023497A1 (en) 2006-02-02
TW200620276A (en) 2006-06-16

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