DE3587231D1 - Verfahren zum herstellen einer dmos-halbleiteranordnung. - Google Patents
Verfahren zum herstellen einer dmos-halbleiteranordnung.Info
- Publication number
- DE3587231D1 DE3587231D1 DE8585113221T DE3587231T DE3587231D1 DE 3587231 D1 DE3587231 D1 DE 3587231D1 DE 8585113221 T DE8585113221 T DE 8585113221T DE 3587231 T DE3587231 T DE 3587231T DE 3587231 D1 DE3587231 D1 DE 3587231D1
- Authority
- DE
- Germany
- Prior art keywords
- producing
- semiconductor arrangement
- dmos semiconductor
- dmos
- arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8423302A IT1213234B (it) | 1984-10-25 | 1984-10-25 | Procedimento perfezionato per la fabbricazione di dispositivi a semiconduttore dmos. |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3587231D1 true DE3587231D1 (de) | 1993-05-06 |
DE3587231T2 DE3587231T2 (de) | 1993-07-08 |
Family
ID=11205870
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8585113221T Expired - Fee Related DE3587231T2 (de) | 1984-10-25 | 1985-10-18 | Verfahren zum herstellen einer dmos-halbleiteranordnung. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4757032A (de) |
EP (1) | EP0179407B1 (de) |
JP (1) | JPS61102782A (de) |
DE (1) | DE3587231T2 (de) |
IT (1) | IT1213234B (de) |
Families Citing this family (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0812918B2 (ja) * | 1986-03-28 | 1996-02-07 | 株式会社東芝 | 半導体装置の製造方法 |
IT1197523B (it) * | 1986-10-30 | 1988-11-30 | Sgs Microelettronica Spa | Processo per la fabbricazione di transistori ad effetto di campo a "gate" isolata con giunzioni aventi profondita' estremamente ridotta |
US4818235A (en) * | 1987-02-10 | 1989-04-04 | Industry Technology Research Institute | Isolation structures for integrated circuits |
JPH0766968B2 (ja) * | 1987-08-24 | 1995-07-19 | 株式会社日立製作所 | 半導体装置及びその製造方法 |
US5179034A (en) * | 1987-08-24 | 1993-01-12 | Hitachi, Ltd. | Method for fabricating insulated gate semiconductor device |
US5285094A (en) * | 1987-08-24 | 1994-02-08 | Hitachi, Ltd. | Vertical insulated gate semiconductor device with less influence from the parasitic bipolar effect |
JP2604777B2 (ja) * | 1988-01-18 | 1997-04-30 | 松下電工株式会社 | 二重拡散型電界効果半導体装置の製法 |
JPH02281662A (ja) * | 1989-04-21 | 1990-11-19 | Mitsubishi Electric Corp | 半導体装置 |
US5262339A (en) * | 1989-06-12 | 1993-11-16 | Hitachi, Ltd. | Method of manufacturing a power semiconductor device using implants and solid diffusion source |
IT1236994B (it) * | 1989-12-29 | 1993-05-12 | Sgs Thomson Microelectronics | Processo per la fabbricazione di dispositivi semiconduttori mos di potenza e dispositivi con esso ottenuti |
JP2672694B2 (ja) * | 1990-07-13 | 1997-11-05 | 松下電子工業株式会社 | Mosfet |
US5202276A (en) * | 1990-08-20 | 1993-04-13 | Texas Instruments Incorporated | Method of forming a low on-resistance DMOS vertical transistor structure |
JPH04152536A (ja) * | 1990-10-16 | 1992-05-26 | Fuji Electric Co Ltd | Mis型半導体装置の製造方法 |
US5182222A (en) * | 1991-06-26 | 1993-01-26 | Texas Instruments Incorporated | Process for manufacturing a DMOS transistor |
IT1252625B (it) * | 1991-12-05 | 1995-06-19 | Cons Ric Microelettronica | Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenuti |
US5252848A (en) * | 1992-02-03 | 1993-10-12 | Motorola, Inc. | Low on resistance field effect transistor |
IT1254799B (it) * | 1992-02-18 | 1995-10-11 | St Microelectronics Srl | Transistore vdmos con migliorate caratteristiche di tenuta di tensione. |
US5248627A (en) * | 1992-03-20 | 1993-09-28 | Siliconix Incorporated | Threshold adjustment in fabricating vertical dmos devices |
JP2900698B2 (ja) * | 1992-05-07 | 1999-06-02 | 日本電気株式会社 | 絶縁形電界効果トランジスタの製造方法 |
US5631177A (en) * | 1992-12-07 | 1997-05-20 | Sgs-Thomson Microelectronics, S.R.L. | Process for manufacturing integrated circuit with power field effect transistors |
US5369045A (en) * | 1993-07-01 | 1994-11-29 | Texas Instruments Incorporated | Method for forming a self-aligned lateral DMOS transistor |
US5397715A (en) * | 1993-10-21 | 1995-03-14 | Micrel, Incorporated | MOS transistor having increased gate-drain capacitance |
EP0689239B1 (de) * | 1994-06-23 | 2007-03-07 | STMicroelectronics S.r.l. | Verfahren zur Herstellung von Leistungsbauteilen in MOS-Technologie |
DE69434268T2 (de) * | 1994-07-14 | 2006-01-12 | Stmicroelectronics S.R.L., Agrate Brianza | Intergrierte Struktur einer Hochgeschwindigkeits-MOS-Technologe-Leistungsvorrichtung und zugehöriges Herstellungsverfahren |
JP3586332B2 (ja) * | 1995-02-28 | 2004-11-10 | 新日本製鐵株式会社 | 不揮発性半導体記憶装置及びその製造方法 |
US6008092A (en) * | 1996-02-12 | 1999-12-28 | International Rectifier Corporation | Short channel IGBT with improved forward voltage drop and improved switching power loss |
JP4014676B2 (ja) | 1996-08-13 | 2007-11-28 | 株式会社半導体エネルギー研究所 | 絶縁ゲイト型半導体装置およびその作製方法 |
JP3949193B2 (ja) * | 1996-08-13 | 2007-07-25 | 株式会社半導体エネルギー研究所 | 絶縁ゲイト型半導体装置 |
KR100198634B1 (ko) * | 1996-09-07 | 1999-06-15 | 구본준 | 반도체 소자의 배선구조 및 제조방법 |
US5879994A (en) * | 1997-04-15 | 1999-03-09 | National Semiconductor Corporation | Self-aligned method of fabricating terrace gate DMOS transistor |
US6429481B1 (en) | 1997-11-14 | 2002-08-06 | Fairchild Semiconductor Corporation | Field effect transistor and method of its manufacture |
JP3283458B2 (ja) * | 1997-12-19 | 2002-05-20 | セイコーインスツルメンツ株式会社 | 半導体装置の製造方法 |
JP4310657B2 (ja) * | 2006-05-26 | 2009-08-12 | セイコーエプソン株式会社 | 光素子 |
CN109119483A (zh) * | 2018-11-05 | 2019-01-01 | 深圳市鹏朗贸易有限责任公司 | 一种晶体管及其制作方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2417853A1 (fr) * | 1978-02-17 | 1979-09-14 | Thomson Csf | Procede de realisation d'un transistor de type mos et transistor realise selon ce procede |
US4274892A (en) * | 1978-12-14 | 1981-06-23 | Trw Inc. | Dopant diffusion method of making semiconductor products |
FR2461360A1 (fr) * | 1979-07-10 | 1981-01-30 | Thomson Csf | Procede de fabrication d'un transistor a effet de champ du type dmos a fonctionnement vertical et transistor obtenu par ce procede |
US4389255A (en) * | 1980-01-14 | 1983-06-21 | Burroughs Corporation | Method of forming buried collector for bipolar transistor in a semiconductor by selective implantation of poly-si followed by oxidation and etch-off |
US4344081A (en) * | 1980-04-14 | 1982-08-10 | Supertex, Inc. | Combined DMOS and a vertical bipolar transistor device and fabrication method therefor |
US4345265A (en) * | 1980-04-14 | 1982-08-17 | Supertex, Inc. | MOS Power transistor with improved high-voltage capability |
US4402003A (en) * | 1981-01-12 | 1983-08-30 | Supertex, Inc. | Composite MOS/bipolar power device |
US4472212A (en) * | 1982-02-26 | 1984-09-18 | At&T Bell Laboratories | Method for fabricating a semiconductor device |
US4471524A (en) * | 1982-06-01 | 1984-09-18 | At&T Bell Laboratories | Method for manufacturing an insulated gate field effect transistor device |
JPS58216466A (ja) * | 1982-06-11 | 1983-12-16 | Toshiba Corp | 絶縁ゲ−ト型fetの製造方法 |
JPS5933860A (ja) * | 1982-08-19 | 1984-02-23 | Toshiba Corp | 半導体装置およびその製造方法 |
JPS6057952A (ja) * | 1983-09-09 | 1985-04-03 | Toshiba Corp | 半導体装置の製造方法 |
US4546535A (en) * | 1983-12-12 | 1985-10-15 | International Business Machines Corporation | Method of making submicron FET structure |
US4653173A (en) * | 1985-03-04 | 1987-03-31 | Signetics Corporation | Method of manufacturing an insulated gate field effect device |
-
1984
- 1984-10-25 IT IT8423302A patent/IT1213234B/it active
-
1985
- 1985-09-06 US US06/773,318 patent/US4757032A/en not_active Expired - Lifetime
- 1985-10-18 DE DE8585113221T patent/DE3587231T2/de not_active Expired - Fee Related
- 1985-10-18 EP EP85113221A patent/EP0179407B1/de not_active Expired - Lifetime
- 1985-10-23 JP JP60238542A patent/JPS61102782A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
DE3587231T2 (de) | 1993-07-08 |
EP0179407A3 (en) | 1988-02-10 |
US4757032A (en) | 1988-07-12 |
EP0179407B1 (de) | 1993-03-31 |
EP0179407A2 (de) | 1986-04-30 |
JPS61102782A (ja) | 1986-05-21 |
IT8423302A0 (it) | 1984-10-25 |
IT1213234B (it) | 1989-12-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: STMICROELECTRONICS S.R.L., AGRATE BRIANZA, MAILAND |
|
8339 | Ceased/non-payment of the annual fee |