CN1921108A - 半导体封装及其制造方法 - Google Patents
半导体封装及其制造方法 Download PDFInfo
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- CN1921108A CN1921108A CNA2006101118222A CN200610111822A CN1921108A CN 1921108 A CN1921108 A CN 1921108A CN A2006101118222 A CNA2006101118222 A CN A2006101118222A CN 200610111822 A CN200610111822 A CN 200610111822A CN 1921108 A CN1921108 A CN 1921108A
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- Condensed Matter Physics & Semiconductors (AREA)
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- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
一种半导体封装100,包括:半导体芯片110;密封树脂106,用于密封所述半导体芯片110;以及布线105,形成于密封树脂106的内部。此外,布线105包括:图形布线105b,连接到半导体芯片110并形成为曝露于密封树脂106的下表面106b;以及在后部分105a,形成为在密封树脂106的厚度方向上扩展,在该在后部分中,一端连接到图形布线105b并且另一端形成为曝露于密封树脂106的上表面106a。
Description
技术领域
本公开涉及半导体封装及其制造方法,具体地说,涉及三维安装的半导体封装及其制造方法。
背景技术
近年来,在安装半导体封装的电子设备中非常期望小型化和纤细化。为此,已经提出被称为所谓的层叠封装(POP)的封装结构,在该封装结构中,可通过层压半导体封装来执行三维安装以改善半导体封装的安装密度(例如见专利文献1:第2002-158312号日本专利未决公开)。
在这种类型的半导体封装中,先制作在其中形成布线的树脂基片,通过引线接合或倒装芯片等方法在树脂基片上安装诸如半导体芯片的部件,其后,通过环氧成型树脂形成密封树脂。
其后,通过以激光照射密封树脂,形成用于在树脂基片上曝露布线的开口,而且通过电镀法在该开口中形成布线。作为该处理的结果,形成布线,在该布线中,一端连接到树脂基片的布线,另一端曝露到树脂基片的上表面。
通过形成通过密封树脂扩展的布线,可在树脂基片的上表面上安装另一半导体封装。在现有技术中,可通过使用这样的技术来执行半导体封装的三维安装。
然而,在现有技术的半导体封装中,需要树脂基片,从而出现半导体封装变得较高(较厚)的问题。具体地说,当为了三维安装而层压具有该树脂基片的半导体封装时,在层压之后整个高度变高,并且难以降低在其中安装了该半导体封装的电子设备等的高度。
此外,在现有技术的半导体封装中,通过激光在密封树脂中形成开口,以形成通过密封树脂扩展的布线,从而出现开口的形成精度低的问题。作为该处理的结果,出现了一些问题,例如在该开口中形成的布线的精度下降,在三维安装时在上下半导体封装中出现了不良连接。
发明内容
本发明实施例提供一种半导体封装以及该半导体封装的制造方法,该半导体封装能够实现纤细化并改善通过穿过密封树脂扩展形成的布线的精度。
为了解决上述问题,本发明的特征在于采用下面的每一种措施。
根据本发明的一个或多个实施例的第一方面,提供一种半导体封装,其包括:半导体芯片;密封树脂,用于密封所述半导体芯片;以及布线,包括图形布线部分和在后部分,所述图形布线部分连接到半导体芯片,并且所述图形布线部分形成为曝露于密封树脂的第一表面,所述在后部分形成为在密封树脂的厚度方向上扩展,所述在后部分具有连接到图形布线部分的一端和形成为曝露于与密封树脂的第一表面相对的第二表面的另一端。
根据本发明,无需使用现有技术中所需的树脂基片,从而可节省成本并实现半导体封装的纤细化。此外,布线的图形布线部分曝露于密封树脂的第一表面,布线的在后部分的端曝露于第二表面,从而可层压多个半导体封装以执行三维安装。
此外,在第一方面的半导体封装中,本发明的一个或多个实施例的第二方面的特征在于在图形布线部分上形成在其上布置了外部连接端子的第一电极和用于测试的第二电极。
根据本发明,在图形布线部分上形成了在其上布置了外部连接端子的第一电极和用于测试的第二电极,从而可使用第二电极进行半导体芯片的公知良好确定。
此外,在第一或第二方面的半导体封装中,本发明的一个或多个实施例的第三方面的特征在于在后部分具有圆柱形状,通过电镀方法形成所述在后部分。
根据本发明,在后部分具有剖面直径完全相同的圆柱形状,从而与圆锥形状的电极等相比,可改善电特性。
此外,根据本发明的一个或多个实施例的第四方面,提供一种半导体封装的制造方法,在该方法中,在密封树脂中嵌入半导体芯片,该制造方法的特征在于具有:第一步骤,在支撑基片上形成图形布线部分;第二步骤,通过使用光致抗蚀剂图形以电镀方法在图形布线部分上形成在后部分;第三步骤,在支撑基片上布置半导体芯片,并将半导体芯片连接到图形布线部分;第四步骤,形成用于密封在后部分和半导体芯片的密封树脂;以及第五步骤,移除支撑基片。
根据本发明,通过使用光致抗蚀剂图形以电镀方法形成在后部分。作为该操作的结果,在光致抗蚀剂图形中形成图形,以通过光刻技术形成在后部分,从而可形成具有高精度的高纵横比的图形。因此,可通过使用该光致抗蚀剂图形电镀和形成在后部分来形成具有高精度的在后部分。
此外,在第四方面的半导体封装的制造方法中,本发明的一个或多个实施例的第五方面的特征在于在第四步骤中,将液态树脂用作密封树脂的材料,并于在支撑基片上安排液态树脂之后液态树脂硬化以形成密封树脂。
根据本发明,将液态树脂用作密封树脂的材料,从而即使当在图形布线部分上形成多个在后部分从而在厚度方向上扩展时,也可由密封树脂安全地密封在后部分。
此外,在第四方面的半导体封装的制造方法中,本发明的一个或多个实施例的第六方面的特征在于在第三步骤中,通过引线接合将半导体芯片连接到图形布线部分。
根据本发明,通过引线接合将半导体芯片连接到图形布线部分,从而可进行高可靠性连接。此外,将液态树脂用作密封树脂的材料,从而即使当通过引线将半导体芯片连接到图形布线部分时也可在第四步骤中通过安排液态树脂来防止引线变形。
此外,在第四至第六方面的半导体封装的制造方法中,本发明的一个或多个实施例的第七方面的特征在于在第一步骤中,于在支撑基片上形成停止层之后形成图形布线部分,并且在第五步骤中,由停止层停止移除支撑基片。
根据本发明,由停止层停止移除支撑基片,从而可防止支撑基片的移除过程对停止层内部的层产生影响。此外,促进了支撑基片的移除中的移除过程的管理,并可简化半导体封装的制造。
此外,在第七方面的半导体封装的制造方法中,本发明的一个或多个实施例的第八方面的特征在于:在第五步骤之后通过使停止层形成图形以在图形布线部分上形成在其上布置了外部连接端子的第一电极和用于测试的第二电极。
根据本发明,使用用于使移除支撑基片停止的停止层来形成第一和第二电极,从而可简化制造步骤。
各种实现可包括以下一个或多个优点。例如,无需使用现有技术所需的树脂基片,从而节省成本并可实现半导体封装的纤细化。此外,通过使用光致抗蚀剂图形以电镀方法来形成在后部分,从而能以高精度形成在后部分。
其它特点和优点将从以下详细描述、附图和权利要求书中变得清楚。
附图说明
图1是示出通过作为本发明一个实施例的布线基片的制造方法制造的布线基片的剖面图。
图2是通过以下过程(第一)示出作为本发明的一个实施例的布线基片的制造方法的示图。
图3是通过以下过程(第二)示出作为本发明的一个实施例的布线基片的制造方法的示图。
图4是通过以下过程(第三)示出作为本发明的一个实施例的布线基片的制造方法的示图。
图5是通过以下过程(第四)示出作为本发明的一个实施例的布线基片的制造方法的示图。
图6是通过以下过程(第五)示出作为本发明的一个实施例的布线基片的制造方法的示图。
图7是通过以下过程(第六)示出作为本发明的一个实施例的布线基片的制造方法示图。
图8是通过以下过程(第七)示出作为本发明的一个实施例的布线基片的制造方法的示图。
图9是通过以下过程(第八)示出作为本发明的一个实施例的布线基片的制造方法的示图。
图10是通过以下过程(第九)示出作为本发明的一个实施例的布线基片的制造方法的示图。
图11是通过以下过程(第十)示出作为本发明的一个实施例的布线基片的制造方法的示图。
图12是通过以下过程(第十一)示出作为本发明的一个实施例的布线基片的制造方法的示图。
图13是通过以下过程(第十二)示出作为本发明的一个实施例的布线基片的制造方法的示图。
图14是通过以下过程(第十三)示出作为本发明的一个实施例的布线基片的制造方法的示图。
具体实施方式
接下来,将结合附图描述实现本发明的最佳模式。
图1是示意性地示出作为本发明一个实施例的半导体封装100剖面图。图1示出在其中通过层压两个半导体封装100来执行三维安装的状态。半导体封装100大致由布线105、密封树脂106、半导体芯片110和阻焊剂117、119等构成。
布线105被构造为整体地形成在后部分105a和图形布线105b。在附图中,示出了两个布线105,并且与在半导体芯片110上形成的电极垫等对应地形成多重布线105。通过具有良好导电性的Cu(铜)来形成该布线105。
形成在后部分105a从而沿密封树脂106的厚度方向(附图中的向上方向和向下方向)扩展。此外,在后部分105a具有圆柱形状,通过如下所述的电镀方法形成在后部分105a。通过顺序层压Ni层118b和Au层118a于在后部分105a的上端上形成电极118。
电极118被构造为从密封树脂106的上表面106a(与权利要求中描述的第二表面对应)曝露,并通过在布置在密封树脂106的上表面上的阻焊剂117中形成的开口117A曝露到外部。另一方面,在后部分105a的下端被构造为连接到图形布线105b。此外,在以下描述中,假定附图中的箭头X1示出的方向是向上方向,附图中的箭头X2示出的方向是向下方向。
另一方面,形成图形布线105b从而以预定的图形沿密封树脂106的表面方向(关于附图中的纸面的上下方向和左右方向)扩展。从密封树脂106的下表面106b(与权利要求中描述的第一表面对应)曝露该图形布线105b的下表面。
在从图形布线105b的下表面106b曝露的表面上形成顺序层压了Ni层102b和Au层102a的电极102和相似地顺序层压了Ni层112b和Au层112a的测试垫112。如下所述共同形成电极102和测试垫112。
通过在密封树脂106的下表面106b上布置的阻焊剂119中形成的开口119A将电极102曝露到外部。此外,通过在阻焊剂119中形成的开口119B将测试垫112曝露到外部。本实施例被构造为安排在电极102上的焊料球制成的外部连接端子120。
此外,在来自图形布线105b的在后部分105a的形成位置的内部的上表面位置形成接合垫108。该接合垫108被构造为在图形布线105b的上表面上层压Ni层108b和Au层108a。
半导体芯片110被构造为嵌入密封树脂106中。在该实施例中,面朝上形成半导体芯片110,并通过引线接合方法在形成于半导体芯片110的上表面上的电极垫(未示出)和在布线105上形成的接合垫108之间安排引线111。作为该处理的结果,半导体芯片110被构造为通过引线111电连接到布线105(在后部分105a、图形布线105b)。
此外,在半导体芯片110的下部上布置管芯附加薄膜层110A,并且该管芯附加薄膜层110A被构造为面对阻焊剂119。此外,本实施例被构造为通过引线接合方法将半导体芯片110连接到布线105,但也可通过倒装芯片接合方法将半导体芯片110连接到布线105,在此情况下,无需管芯附加薄膜层110A。
密封树脂106是如下所述液态树脂硬化的基片。例如,可使用环氧液态密封材料或液态成型材料,也可使用液晶聚合物作为密封树脂106的材料。
形成密封树脂106从而覆盖布线105、半导体芯片110和引线111。然而,构成布线105的在后部分105a的上表面(在其上形成电极118)、构成布线105的图形布线105b的底面以及安排在半导体芯片110的下部上的管芯附加薄膜层110A的下表面被构造为从密封树脂106曝露。
如上所述,在密封树脂106的上表面106a上形成阻焊剂层117,在密封树脂106的下表面106b上形成阻焊剂119。此外,在该实施例中,在电极102上形成外部连接端子120,但外部连接端子120可被构造为形成于电极118上。
在图1的示例中,一对半导体封装100被构造为通过将位于上部的半导体封装100的外部连接端子120结合到位于下部的半导体封装100的电极118来执行三维安装。在此情况下,在位于上部的半导体封装100和位于下部的半导体封装100之间排列由树脂制成的NCF127(绝缘薄膜)。
在连接一对上下半导体封装100的情况下,在位于下部的半导体封装100的阻焊剂117上预先排列NCF 127,并且在将位于上部的半导体封装100的外部连接端子120结合到位于下部分的半导体封装100的电极118的情况下NCF 127同时硬化。此外该NCF 127的安装是必须的。
在如上所述构造的半导体封装100中,与现有技术半导体封装不同的是,不使用树脂基片,从而可降低成本并实现半导体封装100的纤细化。此外,在图形布线105b上形成用于测试的测试垫112连同在其上布置了外部连接端子120的电极102,从而可使用该测试垫112进行密封的半导体芯片110的可靠性的确定(KGD:已知良好管芯)。此外,在该实施例中,构成布线105的在后部分105a具有剖面直径完全相同的圆柱形状,并通过电镀方法形成在后部分105a。作为该处理的结果,与在其中以使用例如激光形成的圆锥形状的开口中形成的通道栓(via plug)的构造相比,可改善电特性。
接下来,将使用图2至图14描述如上所述构造的半导体封装100的制造方法。
首先,在图2示出的步骤中,准备由导电材料(例如Cu)制成的支撑基片101。其后,使用电解电镀方法在该支撑基片101上形成停止层121。
通过使用电解电镀方法使用支撑基片101作为电极顺序地层压0.1至0.2μm厚度的Au层121a和0.1至3μm厚度的Ni层121b来形成停止层121。在此情况下,在以上电解电镀和后面的步骤的电解电镀中,支撑基片101和停止层121形成电流承载路径,从而支撑基片101优选地是导电材料,并且还更优选的是诸如Cu的具有低电阻的材料。
在接下来的图3所示的步骤中,于在其上形成停止层121的支撑基片101上形成图形布线105b。具体地说,通过以光刻方法形成光致抗蚀剂图形(未示出)并通过使用该光致抗蚀剂图形作为掩膜并且其后移除该光致抗蚀剂图形以使Cu沉淀来形成图形布线105b。此外,在该实施例中,在除了在其中安装如下所述的半导体芯片110的中心部分之外的中心部分的***中形成图形布线105b。
其后,在图4所示的步骤中,在图形布线105b的内部位置(靠近中心的位置)中形成接合垫108。通过在图形布线105b上形成光致抗蚀剂图形并且使用电解电镀方法使用该光致抗蚀剂图形作为掩膜顺序地层压Ni层108b和Au层108a来形成接合垫108。
其后,在图5所示的步骤中,在支撑基片101上形成光致抗蚀剂图形103,从而覆盖图形布线105b。在该光致抗蚀剂图形103中,首先使用旋转器(spinner)等以预定的厚度将光致抗蚀剂涂覆于支撑基片101,并通过光刻方法使该光致抗蚀剂形成图形,从而形成具有开103A的光致抗蚀剂图形103。
其后,在图6所示的步骤中,使用光致抗蚀剂图形103作为掩膜,通过电解电镀使Cu沉淀并在开口103A内部使在后部分105a沉淀。作为该处理的结果,形成由在后部分105a和图形布线105b制成的布线105。
如此形成的在后部分105a被构造为沿附图中的向上和向下方向(制造的半导体封装100的厚度方向)构造。此外,在后部分105a的下端被构造为整体地连接到图形布线105b,并且图形布线105b的上端被构造为从开口103A曝露于外部。
其后,在从在后部分105a的开口103A曝露的端上形成电极118。通过使用电解电镀方法顺序层压Ni层118b和Au层118a来形成该电极118。当如上所述形成在后部分105a(布线105)和电极118时,移除光致抗蚀剂图形103。图7示出了在其中移除光致抗蚀剂图形103的状态。
其后,在图8所示的步骤中,执行在停止层121上安装半导体芯片110的处理。具体地说,使用管芯附加薄膜层110A将半导体芯片110面朝上固定到停止层121。
在该处理之后,使用引线接合装置通过引线111将形成在半导体芯片110上的电极垫连接到形成在布线105上的接合垫108。作为该处理的结果,其被构造为在半导体芯片110和布线105之间进行电连接。在该实施例中,在安装半导体芯片110时使用引线接合方法,从而可将半导体芯片110以低成本和高可靠性连接到布线105。
其后,在图9所示的步骤中,形成密封树脂106。该实施例的特征在于通过使用液态树脂作为密封树脂106的材料。作为液态树脂,可使用环氧液态密封材料或液态成型材料,也可使用液晶聚合物。此外,当使用环氧液态密封材料或液态成型材料作为液态树脂时,于在支撑基片101上排列之后执行硬化处理。
通过使用液态树脂作为密封树脂106,因此,即使当在图形布线105b上形成许多在后部分105a从而在厚度方向(附图中的向上方向)上扩展时,液态树脂也在在后部分105a之间平滑地移动。作为该处理的结果,即使当出现许多在后部分105a时,也不会在密封树脂106和布线105的内部形成气隙,可安全地密封半导体芯片110等。此外,通过使用液态树脂作为密封树脂106的材料,即使当半导体芯片110通过布线连接到图形布线105b,引线111也不会在排列液态树脂时变形,并且可提高产出。
此外,可关于密封树脂106的上表面106a执行抛光处理,以在排列密封树脂106之后从密封树脂106安全地曝露电极118。
其后,在图10所示的步骤中,执行通过蚀刻移除支撑基片101的处理。在此情况下,使用支撑基片101(Cu)溶解但停止层121不溶解的蚀刻方案作为蚀刻方案。作为该处理的结果,通过停止层121来停止移除支撑基片101,从而可防止蚀刻方案对来自停止层121的内部的层(布线105、密封树脂106、半导体芯片110等)产生影响。此外,促进了在移除支撑基片101时的移除处理的管理,并可简化半导体封装100的制造。
此外,通过移除支撑基片101,形成在其中不出现用于支撑密封树脂106的构件的构造,但在移除支撑基片101的时间点,密封树脂106硬化以确保预定的硬度。因此,即使当不出现支撑基片101时,也可执行在此之后的每一步骤。
其后,在如图11所示的步骤中,在密封树脂106的上表面106a上形成抗蚀图形125,并还在下表面106b上形成抗蚀图形126。在所有上表面106a上形成抗蚀图形125。另一方面,使用光刻方法使在下表面106b上形成的抗蚀图形126形成图形,从而仅在测试垫112的形成位置以及外部连接端子120稍后连接到其的电极102的形成位置形成。
其后,使用抗蚀图形125、126作为掩膜执行停止层121(Au层121a,Ni层121b)的蚀刻处理。作为该处理的结果,留下电极102和测试垫112,移除停止层121的其它部分。接下来,移除抗蚀图形125、126。图12示出移除抗蚀图形125、126的状态。
在上述实施例中,在支撑基片101的移除处理中,其被构造为使用具有停止移除支撑基片101的功能的停止层121并通过使该停止层121形成图形来形成电极102和测试垫112。作为该处理的结果,与通过与停止层121分离地形成导电薄膜形成电极102和测试垫112的方法相比,可简化制造步骤。
此外,由抗蚀图形125保护在在后部分105a的上端形成的电极118(由Au层118a和Ni层118b制成)。作为该处理的结果,在蚀刻停止层121时不移除电极118。
其后,在图13所示的步骤中,在密封树脂106的上表面106a上形成阻焊剂117,并在密封树脂106的下表面106b上形成阻焊剂119。其后,以阻焊剂117覆盖上表面106a的整个表面,但在电极118的对面的位置中形成开口117A。因此,电极118被构造为通过开口117A曝露到外部。
此外,形成阻焊剂119从而覆盖密封树脂106的下表面106b、图形布线105b的下表面以及管芯附加薄膜层110A。然而,在阻焊剂119的电极102的对面的位置形成开口119A,并在测试垫112的对面位置形成开口119B。因此,电极102被构造为通过开口119A曝露到外部,测试垫112被构造为通过开口119B曝露到外部。
其后,在图14所示的步骤中,可通过结合焊料球并在电极102上形成外部连接端子120来形成图1所示的半导体封装100。
在根据上述实施例的制造方法中,通过使用上述光致抗蚀剂图形103以电镀方法来形成在后部分105a。作为该处理的结果,使用光刻技术形成为了形成在后部分105a而在光致抗蚀剂图形103中形成的开口103A,从而可形成具有高精度的高纵横比的图形。
通过使用光致抗蚀剂图形103电镀并形成在后部分105a,从而,可形成具有高精度的在后部分105a。因此,即使当层压多个半导体封装100以执行如图1所示的三维安装时,也可安全地进行外部连接端子120和电极118之间的连接。
此外,通过如上所述以具有高纵横比的开口103A形成在后部分105a,在后部分105a具有在厚度方向上横截面完全统一的圆柱形状,并可形成具有良好电特性的布线,还可很好地处理高频信号。
此外,在上述半导体封装的制造方法中,为了示出方便已经示出和描述了从一个支撑基片101制造一个半导体封装100的过程,但实际上是制造所谓的多重封装。也就是说,在一个支撑基片101上形成多个半导体封装100,在图14所示的步骤之后在预定的位置切割密封树脂106或阻焊剂117、119,并制造各个半导体封装100。
已经根据优选实施例描述了本发明,但本发明不限于上述特定实施例,在权利要求中描述的主旨中可进行各种修改和改变。
具体地说,上述实施例已经被构造为使用贵金属Au层112a连同Ni层112b作为停止层121。然而,使用诸如Au的贵金属可能增加半导体封装100的制造成本。因此,其可被构造为仅使用Ni层作为停止层121。然而,在此情况下,例如,在图13所示的步骤中,在形成阻焊剂119之后,通过进行无电电镀在测试垫112的镍(Ni)层112b以及电极102上形成Au层121a。
Claims (8)
1.一种半导体封装,包括:
半导体芯片;
密封树脂,用于密封所述半导体芯片;以及
布线,包括图形布线部分和在后部分,所述图形布线部分连接到所述半导体芯片,并且所述图形布线部分形成为曝露于密封树脂的第一表面,并且所述在后部分形成为在所述密封树脂的厚度方向上扩展,所述在后部分具有连接到所述图形布线部分的一端以及形成为曝露于与所述密封树脂的第一表面相对的第二表面的另一端。
2.如权利要求1所述的半导体封装,其中,在所述图形布线部分上形成在其上布置了外部连接端子的第一电极和用于测试的第二电极。
3.如权利要求1或2所述的半导体封装,其中,所述在后部分具有圆柱形状,并通过电镀方法而形成。
4.一种将半导体芯片嵌入密封树脂中的半导体封装的制造方法,该方法包括:
第一步骤,在支撑基片上形成图形布线部分;
第二步骤,使用光致抗蚀剂图形通过电镀方法在所述图形布线部分上形成在后部分;
第三步骤,在所述支撑基片上布置半导体芯片,并将所述半导体芯片连接到所述图形布线部分;
第四步骤,形成用于密封所述在后部分和所述半导体芯片的密封树脂;以及
第五步骤,移除所述支撑基片。
5.如权利要求4所述的半导体封装的制造方法,其中,在所述第四步骤中,使用液态树脂作为所述密封树脂的材料,并于在所述支撑基片上排列所述液态树脂之后所述液态树脂硬化以形成所述密封树脂。
6.如权利要求4所述的半导体封装的制造方法,其中,在所述第三步骤中,通过引线接合将所述半导体芯片连接到所述图形布线部分。
7.如权利要求4至6中的任意一个所述的半导体封装的制造方法,其中,在所述第一步骤中,于在所述支撑基片上形成停止层之后形成所述图形布线部分,并且在所述第五步骤中,由所述停止层停止移除所述支撑基片。
8.如权利要求7所述的半导体封装的制造方法,其中,在所述第五步骤之后通过使所述停止层形成图形在所述图形布线部分上形成在其上布置了外部连接端子的第一电极和用于测试的第二电极。
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JP (1) | JP4541253B2 (zh) |
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CN100576531C (zh) | 2009-12-30 |
US20070052083A1 (en) | 2007-03-08 |
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TWI390683B (zh) | 2013-03-21 |
JP4541253B2 (ja) | 2010-09-08 |
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KR20070023523A (ko) | 2007-02-28 |
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