CN1505052A - 半导体存储装置和存储单元的写入以及擦除方法 - Google Patents
半导体存储装置和存储单元的写入以及擦除方法 Download PDFInfo
- Publication number
- CN1505052A CN1505052A CNA200310119596A CN200310119596A CN1505052A CN 1505052 A CN1505052 A CN 1505052A CN A200310119596 A CNA200310119596 A CN A200310119596A CN 200310119596 A CN200310119596 A CN 200310119596A CN 1505052 A CN1505052 A CN 1505052A
- Authority
- CN
- China
- Prior art keywords
- mentioned
- resistance
- semiconductor storage
- memory cells
- variable resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 65
- 230000015654 memory Effects 0.000 title claims abstract description 51
- 238000000034 method Methods 0.000 title claims description 20
- 238000001514 detection method Methods 0.000 claims abstract description 10
- 238000003860 storage Methods 0.000 claims description 173
- 230000007246 mechanism Effects 0.000 claims description 36
- 230000009471 action Effects 0.000 claims description 12
- 238000009792 diffusion process Methods 0.000 claims description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 10
- 229920005591 polysilicon Polymers 0.000 claims description 10
- 230000000694 effects Effects 0.000 claims description 8
- 230000008859 change Effects 0.000 claims description 7
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 claims description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 6
- 229910052748 manganese Inorganic materials 0.000 claims description 6
- 239000011572 manganese Substances 0.000 claims description 6
- 239000011159 matrix material Substances 0.000 abstract 1
- 238000012795 verification Methods 0.000 description 18
- 230000006870 function Effects 0.000 description 7
- 102000054766 genetic haplotypes Human genes 0.000 description 5
- 230000008569 process Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 230000001960 triggered effect Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- AMWRITDGCCNYAT-UHFFFAOYSA-L hydroxy(oxo)manganese;manganese Chemical compound [Mn].O[Mn]=O.O[Mn]=O AMWRITDGCCNYAT-UHFFFAOYSA-L 0.000 description 2
- 241001269238 Data Species 0.000 description 1
- 101000912503 Homo sapiens Tyrosine-protein kinase Fgr Proteins 0.000 description 1
- 102000001332 SRC Human genes 0.000 description 1
- 108060006706 SRC Proteins 0.000 description 1
- 102100026150 Tyrosine-protein kinase Fgr Human genes 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 230000008676 import Effects 0.000 description 1
- 230000005415 magnetization Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5678—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using amorphous/crystalline phase transition storage elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5685—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using storage elements comprising metal oxide memory material, e.g. perovskites
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0038—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0064—Verifying circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0097—Erasing, e.g. resetting, circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
- G11C2013/0054—Read is performed on a reference element, e.g. cell, and the reference sensed value is used to compare the sensed value of the selected cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0064—Verifying circuits or methods
- G11C2013/0066—Verify correct writing whilst writing is in progress, e.g. by detecting onset or cessation of current flow in cell and using the detector output to terminate writing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/562—Multilevel memory programming aspects
- G11C2211/5624—Concurrent multilevel programming and programming verification
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/31—Material having complex metal oxide, e.g. perovskite structure
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/79—Array wherein the access device being a transistor
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Computer Hardware Design (AREA)
- Crystallography & Structural Chemistry (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
Claims (38)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002353053 | 2002-12-04 | ||
JP2002353053 | 2002-12-04 | ||
JP2003018645A JP4249992B2 (ja) | 2002-12-04 | 2003-01-28 | 半導体記憶装置及びメモリセルの書き込み並びに消去方法 |
JP2003018645 | 2003-01-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1505052A true CN1505052A (zh) | 2004-06-16 |
CN100367411C CN100367411C (zh) | 2008-02-06 |
Family
ID=32314124
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2003101195969A Expired - Fee Related CN100367411C (zh) | 2002-12-04 | 2003-12-04 | 半导体存储装置和存储单元的写入以及擦除方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US7006371B2 (zh) |
EP (1) | EP1426969A3 (zh) |
JP (1) | JP4249992B2 (zh) |
KR (1) | KR100593325B1 (zh) |
CN (1) | CN100367411C (zh) |
TW (1) | TWI245290B (zh) |
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101894587A (zh) * | 2010-07-23 | 2010-11-24 | 上海宏力半导体制造有限公司 | 相变存储器的自限写入脉冲发生电路 |
CN102077293A (zh) * | 2008-06-27 | 2011-05-25 | 桑迪士克3D公司 | 非易失性存储器中的同时写入和核对 |
CN101371313B (zh) * | 2006-01-13 | 2011-08-17 | 夏普株式会社 | 非易失性半导体存储装置 |
CN102169722A (zh) * | 2010-02-25 | 2011-08-31 | 复旦大学 | 降低初始化或置位操作功耗的电阻随机存储器及其操作方法 |
CN102169720A (zh) * | 2010-02-25 | 2011-08-31 | 复旦大学 | 一种消除过写、误写现象的电阻随机存储器 |
CN101030448B (zh) * | 2006-03-01 | 2011-09-07 | 松下电器产业株式会社 | 半导体存储器件及半导体集成电路*** |
CN102270505A (zh) * | 2011-06-24 | 2011-12-07 | 北京时代全芯科技有限公司 | 相变存储单元及相变存储器 |
US8456887B2 (en) | 2007-12-26 | 2013-06-04 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device |
CN103229419A (zh) * | 2010-11-19 | 2013-07-31 | 惠普发展公司,有限责任合伙企业 | 用于切换忆阻器件的方法和电路 |
CN103262414A (zh) * | 2010-11-19 | 2013-08-21 | 惠普发展公司,有限责任合伙企业 | 用于切换阵列中的忆阻器件的方法和电路 |
CN103578548A (zh) * | 2012-08-09 | 2014-02-12 | 北京兆易创新科技股份有限公司 | 快闪存储器及其参考单元的确定方法 |
CN106448731A (zh) * | 2015-08-06 | 2017-02-22 | 意法半导体(鲁塞)公司 | 用于管理eeprom存储器单元中的数据的写入周期的方法和*** |
CN106776362A (zh) * | 2015-11-24 | 2017-05-31 | 中芯国际集成电路制造(上海)有限公司 | 存储器的控制方法及装置 |
US10528287B2 (en) | 2015-10-09 | 2020-01-07 | Sony Corporation | Memory, memory controller, storage apparatus, information processing system, and control method for tracking erase count and rewrite cycles of memory pages |
CN113345503A (zh) * | 2020-03-02 | 2021-09-03 | 华邦电子股份有限公司 | 半导体存储装置以及读出方法 |
CN113744780A (zh) * | 2021-09-07 | 2021-12-03 | 上海集成电路装备材料产业创新中心有限公司 | 一种多值存储器的校准电路、校准方法和编程方法 |
Families Citing this family (129)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3894030B2 (ja) * | 2002-04-17 | 2007-03-14 | ソニー株式会社 | 抵抗変化記憶素子を用いた記憶装置及び同装置の参照抵抗値決定方法 |
US7085154B2 (en) * | 2003-06-03 | 2006-08-01 | Samsung Electronics Co., Ltd. | Device and method for pulse width control in a phase change memory device |
JP5121859B2 (ja) * | 2003-09-12 | 2013-01-16 | ルネサスエレクトロニクス株式会社 | 記憶装置 |
US7050319B2 (en) * | 2003-12-03 | 2006-05-23 | Micron Technology, Inc. | Memory architecture and method of manufacture and operation thereof |
TWI288931B (en) * | 2004-06-19 | 2007-10-21 | Samsung Electronics Co Ltd | Phase-change memory element driver circuits using measurement to control current and methods of controlling drive current of phase-change memory elements using measurement |
KR100618836B1 (ko) * | 2004-06-19 | 2006-09-08 | 삼성전자주식회사 | 반도체 메모리 장치 및 반도체 메모리 장치의 프로그래밍방법 |
JP2006134398A (ja) | 2004-11-04 | 2006-05-25 | Sony Corp | 記憶装置及び半導体装置 |
KR100576369B1 (ko) * | 2004-11-23 | 2006-05-03 | 삼성전자주식회사 | 전이 금속 산화막을 데이타 저장 물질막으로 채택하는비휘발성 기억소자의 프로그램 방법 |
JP4546842B2 (ja) * | 2005-01-20 | 2010-09-22 | シャープ株式会社 | 不揮発性半導体記憶装置及びその制御方法 |
JP4735948B2 (ja) * | 2005-03-29 | 2011-07-27 | 日本電気株式会社 | 磁気ランダムアクセスメモリ及びその動作方法 |
KR100674983B1 (ko) | 2005-07-13 | 2007-01-29 | 삼성전자주식회사 | 구동전압 레벨을 변경할 수 있는 상 변화 메모리 장치 |
US7755931B2 (en) | 2005-08-02 | 2010-07-13 | Nec Corporation | Magnetic random access memory and operation method thereof |
KR100757410B1 (ko) * | 2005-09-16 | 2007-09-11 | 삼성전자주식회사 | 상 변화 메모리 장치 및 그것의 프로그램 방법 |
WO2007040189A1 (ja) | 2005-10-03 | 2007-04-12 | Nec Corporation | 磁気ランダムアクセスメモリ及びその動作方法 |
JP4238248B2 (ja) * | 2005-11-11 | 2009-03-18 | シャープ株式会社 | 可変抵抗素子を備えた不揮発性半導体記憶装置の製造方法 |
US7733684B2 (en) | 2005-12-13 | 2010-06-08 | Kabushiki Kaisha Toshiba | Data read/write device |
US7292466B2 (en) * | 2006-01-03 | 2007-11-06 | Infineon Technologies Ag | Integrated circuit having a resistive memory |
JP4781431B2 (ja) | 2006-05-16 | 2011-09-28 | 富士通株式会社 | 不揮発性半導体記憶装置及びその書き込み方法 |
JP5012802B2 (ja) * | 2006-07-25 | 2012-08-29 | 富士通株式会社 | 不揮発性半導体記憶装置 |
JP4309413B2 (ja) | 2006-08-31 | 2009-08-05 | 株式会社東芝 | 情報記録再生装置 |
JP4823316B2 (ja) * | 2006-09-05 | 2011-11-24 | 富士通株式会社 | 不揮発性半導体記憶装置の書き込み方法 |
JP4792007B2 (ja) | 2007-06-12 | 2011-10-12 | 株式会社東芝 | 情報記録再生装置 |
JP4792006B2 (ja) | 2007-06-12 | 2011-10-12 | 株式会社東芝 | 情報記録再生装置 |
JP4792010B2 (ja) | 2007-06-12 | 2011-10-12 | 株式会社東芝 | 情報記録再生装置 |
JP4792009B2 (ja) | 2007-06-12 | 2011-10-12 | 株式会社東芝 | 情報記録再生装置 |
JP2009026382A (ja) | 2007-07-19 | 2009-02-05 | Hitachi Ltd | 半導体記憶装置 |
JP4344011B2 (ja) | 2007-08-01 | 2009-10-14 | パナソニック株式会社 | 不揮発性記憶装置 |
JP5002401B2 (ja) * | 2007-10-03 | 2012-08-15 | 株式会社東芝 | 抵抗変化メモリ |
CN101828262B (zh) * | 2007-10-15 | 2012-06-06 | 松下电器产业株式会社 | 非易失性存储元件和使用该非易失性存储元件的非易失性半导体装置 |
US7924597B2 (en) | 2007-10-31 | 2011-04-12 | Hewlett-Packard Development Company, L.P. | Data storage in circuit elements with changed resistance |
US7593255B2 (en) * | 2007-12-07 | 2009-09-22 | Qimonda North America Corp. | Integrated circuit for programming a memory element |
TWI413121B (zh) * | 2008-02-29 | 2013-10-21 | Toshiba Kk | Semiconductor memory device |
WO2009128142A1 (ja) | 2008-04-15 | 2009-10-22 | 株式会社 東芝 | 情報記録再生装置 |
JP5676842B2 (ja) * | 2008-05-30 | 2015-02-25 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | 半導体装置 |
JP5086919B2 (ja) * | 2008-06-30 | 2012-11-28 | 株式会社東芝 | 半導体記憶装置 |
US8130528B2 (en) | 2008-08-25 | 2012-03-06 | Sandisk 3D Llc | Memory system with sectional data lines |
JP5127661B2 (ja) * | 2008-10-10 | 2013-01-23 | 株式会社東芝 | 半導体記憶装置 |
JP5127665B2 (ja) * | 2008-10-23 | 2013-01-23 | 株式会社東芝 | 半導体記憶装置 |
JP5293132B2 (ja) * | 2008-12-09 | 2013-09-18 | ソニー株式会社 | 半導体装置 |
JP2010182373A (ja) * | 2009-02-05 | 2010-08-19 | Sony Corp | 不揮発性半導体メモリデバイスと、そのベリファイ書き込み方法 |
US7916515B2 (en) * | 2009-03-10 | 2011-03-29 | Seagate Technology Llc | Non-volatile memory read/write verify |
JP4774109B2 (ja) * | 2009-03-13 | 2011-09-14 | シャープ株式会社 | 不揮発性可変抵抗素子のフォーミング処理の制御回路、並びにフォーミング処理の制御方法 |
JP2010225221A (ja) * | 2009-03-23 | 2010-10-07 | Toshiba Corp | 半導体記憶装置 |
WO2010119671A1 (ja) | 2009-04-15 | 2010-10-21 | パナソニック株式会社 | 抵抗変化型不揮発性記憶装置 |
US8279650B2 (en) | 2009-04-20 | 2012-10-02 | Sandisk 3D Llc | Memory system with data line switching scheme |
JP5418147B2 (ja) * | 2009-10-26 | 2014-02-19 | 日本電気株式会社 | 素子制御回路、スイッチング素子及び素子制御方法 |
TWI428929B (zh) * | 2009-11-24 | 2014-03-01 | Ind Tech Res Inst | 控制方法 |
US8817521B2 (en) | 2009-11-24 | 2014-08-26 | Industrial Technology Research Institute | Control method for memory cell |
KR101652333B1 (ko) | 2010-02-10 | 2016-08-30 | 삼성전자주식회사 | 가변 저항 메모리 장치 및 그것의 프로그램 방법 |
US8848430B2 (en) * | 2010-02-23 | 2014-09-30 | Sandisk 3D Llc | Step soft program for reversible resistivity-switching elements |
US8593853B2 (en) | 2010-03-30 | 2013-11-26 | Panasonic Corporation | Nonvolatile storage device and method for writing into the same |
US8385102B2 (en) | 2010-05-11 | 2013-02-26 | Sandisk 3D Llc | Alternating bipolar forming voltage for resistivity-switching elements |
JP5367641B2 (ja) * | 2010-06-03 | 2013-12-11 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP2011253595A (ja) * | 2010-06-03 | 2011-12-15 | Toshiba Corp | 不揮発性半導体記憶装置 |
JP5521850B2 (ja) * | 2010-07-21 | 2014-06-18 | ソニー株式会社 | 抵抗変化型メモリデバイスおよびその駆動方法 |
US8619460B2 (en) | 2010-10-29 | 2013-12-31 | Panasonic Corporation | Nonvolatile memory device and method for programming nonvolatile memory element |
US8686415B2 (en) * | 2010-12-17 | 2014-04-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
JP5598363B2 (ja) | 2011-02-15 | 2014-10-01 | ソニー株式会社 | 記憶装置およびその動作方法 |
CN102822901B (zh) | 2011-03-25 | 2014-09-24 | 松下电器产业株式会社 | 电阻变化型非易失性元件的写入方法及存储装置 |
TWI506627B (zh) | 2011-08-30 | 2015-11-01 | Ind Tech Res Inst | 電阻式記憶體及其寫入驗證方法 |
KR101325234B1 (ko) | 2012-02-01 | 2013-11-04 | 한양대학교 산학협력단 | 자기 메모리 장치 |
WO2013128854A1 (ja) | 2012-02-29 | 2013-09-06 | パナソニック株式会社 | 不揮発性半導体記憶装置 |
US20130242640A1 (en) * | 2012-03-07 | 2013-09-19 | Brent Steven Haukness | Methods and Systems for Resistive Change Memory Cell Restoration |
WO2013132781A1 (ja) | 2012-03-07 | 2013-09-12 | パナソニック株式会社 | 不揮発性半導体記憶装置 |
JP2013201276A (ja) | 2012-03-23 | 2013-10-03 | Toshiba Corp | 抵抗変化素子及び不揮発性記憶装置 |
JP5867315B2 (ja) * | 2012-06-28 | 2016-02-24 | 富士通株式会社 | 判定装置、および判定方法 |
KR101993180B1 (ko) * | 2012-07-23 | 2019-06-27 | 삼성전자주식회사 | 비휘발성 메모리 장치의 동작 방법 |
US9275731B1 (en) * | 2012-10-05 | 2016-03-01 | Marvell International Ltd. | Systems and methods for increasing the read sensitivity of a resistive random access memory (RRAM) |
JP6260832B2 (ja) | 2012-10-30 | 2018-01-17 | パナソニックIpマネジメント株式会社 | 不揮発性半導体記憶装置 |
US9437257B2 (en) * | 2012-12-31 | 2016-09-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Sensing circuit, memory device and data detecting method |
WO2014129172A1 (ja) | 2013-02-19 | 2014-08-28 | パナソニック株式会社 | 不揮発性半導体記憶装置 |
US9311999B2 (en) | 2013-09-06 | 2016-04-12 | Micron Technology, Inc. | Memory sense amplifiers and memory verification methods |
US20150117087A1 (en) * | 2013-10-31 | 2015-04-30 | Honeywell International Inc. | Self-terminating write for a memory cell |
US9286976B2 (en) * | 2014-05-29 | 2016-03-15 | Intel Corporation | Apparatuses and methods for detecting write completion for resistive memory |
JP6425137B2 (ja) | 2014-06-12 | 2018-11-21 | パナソニックIpマネジメント株式会社 | データ記録方法および不揮発性記憶装置 |
JP6372203B2 (ja) | 2014-07-07 | 2018-08-15 | 株式会社ソシオネクスト | データ保持回路および保持データ復元方法 |
FR3025647B1 (fr) * | 2014-09-09 | 2018-01-05 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Dispositif et procede d'ecriture de donnees dans une memoire resistive |
US9312001B1 (en) * | 2015-02-17 | 2016-04-12 | Winbond Electronics Corp. | Writing and verifying circuit for a resistive memory and method for writing and verifying a resistive memory |
US10163479B2 (en) | 2015-08-14 | 2018-12-25 | Spin Transfer Technologies, Inc. | Method and apparatus for bipolar memory write-verify |
KR101770890B1 (ko) | 2015-08-31 | 2017-08-24 | 한양대학교 산학협력단 | 자기 저항 메모리에서 셀프 레퍼런스 조정을 이용한 스위칭 감지 방법 및 장치 |
US10318726B2 (en) * | 2016-04-18 | 2019-06-11 | Qualcomm Incorporated | Systems and methods to provide security to one time program data |
KR101976045B1 (ko) * | 2016-08-30 | 2019-05-09 | 에스케이하이닉스 주식회사 | 쓰기 동작시 상태 전환 인식이 가능한 자기 저항 메모리 장치 및 이에 있어서 읽기 및 쓰기 동작 방법 |
US10360964B2 (en) | 2016-09-27 | 2019-07-23 | Spin Memory, Inc. | Method of writing contents in memory during a power up sequence using a dynamic redundancy register in a memory device |
US10446210B2 (en) | 2016-09-27 | 2019-10-15 | Spin Memory, Inc. | Memory instruction pipeline with a pre-read stage for a write operation for reducing power consumption in a memory device that uses dynamic redundancy registers |
US10546625B2 (en) | 2016-09-27 | 2020-01-28 | Spin Memory, Inc. | Method of optimizing write voltage based on error buffer occupancy |
US10818331B2 (en) | 2016-09-27 | 2020-10-27 | Spin Memory, Inc. | Multi-chip module for MRAM devices with levels of dynamic redundancy registers |
US10437723B2 (en) | 2016-09-27 | 2019-10-08 | Spin Memory, Inc. | Method of flushing the contents of a dynamic redundancy register to a secure storage area during a power down in a memory device |
US10460781B2 (en) | 2016-09-27 | 2019-10-29 | Spin Memory, Inc. | Memory device with a dual Y-multiplexer structure for performing two simultaneous operations on the same row of a memory bank |
US10366774B2 (en) | 2016-09-27 | 2019-07-30 | Spin Memory, Inc. | Device with dynamic redundancy registers |
US10437491B2 (en) | 2016-09-27 | 2019-10-08 | Spin Memory, Inc. | Method of processing incomplete memory operations in a memory device during a power up sequence and a power down sequence using a dynamic redundancy register |
US10489245B2 (en) | 2017-10-24 | 2019-11-26 | Spin Memory, Inc. | Forcing stuck bits, waterfall bits, shunt bits and low TMR bits to short during testing and using on-the-fly bit failure detection and bit redundancy remapping techniques to correct them |
US10529439B2 (en) | 2017-10-24 | 2020-01-07 | Spin Memory, Inc. | On-the-fly bit failure detection and bit redundancy remapping techniques to correct for fixed bit defects |
US10656994B2 (en) | 2017-10-24 | 2020-05-19 | Spin Memory, Inc. | Over-voltage write operation of tunnel magnet-resistance (“TMR”) memory device and correcting failure bits therefrom by using on-the-fly bit failure detection and bit redundancy remapping techniques |
US10481976B2 (en) | 2017-10-24 | 2019-11-19 | Spin Memory, Inc. | Forcing bits as bad to widen the window between the distributions of acceptable high and low resistive bits thereby lowering the margin and increasing the speed of the sense amplifiers |
US10395711B2 (en) | 2017-12-28 | 2019-08-27 | Spin Memory, Inc. | Perpendicular source and bit lines for an MRAM array |
US10891997B2 (en) | 2017-12-28 | 2021-01-12 | Spin Memory, Inc. | Memory array with horizontal source line and a virtual source line |
US10395712B2 (en) | 2017-12-28 | 2019-08-27 | Spin Memory, Inc. | Memory array with horizontal source line and sacrificial bitline per virtual source |
US10424726B2 (en) | 2017-12-28 | 2019-09-24 | Spin Memory, Inc. | Process for improving photoresist pillar adhesion during MRAM fabrication |
US10360962B1 (en) * | 2017-12-28 | 2019-07-23 | Spin Memory, Inc. | Memory array with individually trimmable sense amplifiers |
US10811594B2 (en) | 2017-12-28 | 2020-10-20 | Spin Memory, Inc. | Process for hard mask development for MRAM pillar formation using photolithography |
US10840436B2 (en) | 2017-12-29 | 2020-11-17 | Spin Memory, Inc. | Perpendicular magnetic anisotropy interface tunnel junction devices and methods of manufacture |
US10367139B2 (en) | 2017-12-29 | 2019-07-30 | Spin Memory, Inc. | Methods of manufacturing magnetic tunnel junction devices |
US10424723B2 (en) | 2017-12-29 | 2019-09-24 | Spin Memory, Inc. | Magnetic tunnel junction devices including an optimization layer |
US10886330B2 (en) | 2017-12-29 | 2021-01-05 | Spin Memory, Inc. | Memory device having overlapping magnetic tunnel junctions in compliance with a reference pitch |
US10840439B2 (en) | 2017-12-29 | 2020-11-17 | Spin Memory, Inc. | Magnetic tunnel junction (MTJ) fabrication methods and systems |
US10784439B2 (en) | 2017-12-29 | 2020-09-22 | Spin Memory, Inc. | Precessional spin current magnetic tunnel junction devices and methods of manufacture |
US10546624B2 (en) | 2017-12-29 | 2020-01-28 | Spin Memory, Inc. | Multi-port random access memory |
US10438996B2 (en) | 2018-01-08 | 2019-10-08 | Spin Memory, Inc. | Methods of fabricating magnetic tunnel junctions integrated with selectors |
US10438995B2 (en) | 2018-01-08 | 2019-10-08 | Spin Memory, Inc. | Devices including magnetic tunnel junctions integrated with selectors |
US10446744B2 (en) | 2018-03-08 | 2019-10-15 | Spin Memory, Inc. | Magnetic tunnel junction wafer adaptor used in magnetic annealing furnace and method of using the same |
US20190296220A1 (en) | 2018-03-23 | 2019-09-26 | Spin Transfer Technologies, Inc. | Magnetic Tunnel Junction Devices Including an Annular Free Magnetic Layer and a Planar Reference Magnetic Layer |
US10784437B2 (en) | 2018-03-23 | 2020-09-22 | Spin Memory, Inc. | Three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer |
US11107974B2 (en) | 2018-03-23 | 2021-08-31 | Spin Memory, Inc. | Magnetic tunnel junction devices including a free magnetic trench layer and a planar reference magnetic layer |
US11107978B2 (en) | 2018-03-23 | 2021-08-31 | Spin Memory, Inc. | Methods of manufacturing three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer |
US10411185B1 (en) | 2018-05-30 | 2019-09-10 | Spin Memory, Inc. | Process for creating a high density magnetic tunnel junction array test platform |
US10692569B2 (en) | 2018-07-06 | 2020-06-23 | Spin Memory, Inc. | Read-out techniques for multi-bit cells |
US10593396B2 (en) | 2018-07-06 | 2020-03-17 | Spin Memory, Inc. | Multi-bit cell read-out techniques for MRAM cells with mixed pinned magnetization orientations |
US10559338B2 (en) | 2018-07-06 | 2020-02-11 | Spin Memory, Inc. | Multi-bit cell read-out techniques |
US10600478B2 (en) | 2018-07-06 | 2020-03-24 | Spin Memory, Inc. | Multi-bit cell read-out techniques for MRAM cells with mixed pinned magnetization orientations |
US10650875B2 (en) | 2018-08-21 | 2020-05-12 | Spin Memory, Inc. | System for a wide temperature range nonvolatile memory |
US10699761B2 (en) | 2018-09-18 | 2020-06-30 | Spin Memory, Inc. | Word line decoder memory architecture |
US10971680B2 (en) | 2018-10-01 | 2021-04-06 | Spin Memory, Inc. | Multi terminal device stack formation methods |
US11621293B2 (en) | 2018-10-01 | 2023-04-04 | Integrated Silicon Solution, (Cayman) Inc. | Multi terminal device stack systems and methods |
JP2020087495A (ja) * | 2018-11-29 | 2020-06-04 | キオクシア株式会社 | 半導体メモリ |
US11107979B2 (en) | 2018-12-28 | 2021-08-31 | Spin Memory, Inc. | Patterned silicide structures and methods of manufacture |
US11347999B2 (en) * | 2019-05-22 | 2022-05-31 | International Business Machines Corporation | Closed loop programming of phase-change memory |
CN111326201B (zh) * | 2020-02-19 | 2023-06-09 | 上海集成电路研发中心有限公司 | 自关断电路及半导体存储结构 |
WO2022197307A1 (en) * | 2021-03-19 | 2022-09-22 | Crossbar, Inc. | Methods and apparatus for facilitated program and erase of two-terminal memory devices |
US11881241B2 (en) * | 2022-03-31 | 2024-01-23 | Globalfoundries U.S. Inc. | Resistive memory array with localized reference cells |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2519585B2 (ja) * | 1990-07-03 | 1996-07-31 | 三菱電機株式会社 | 不揮発性半導体記憶装置 |
JP3152720B2 (ja) | 1991-03-12 | 2001-04-03 | 株式会社東芝 | 不揮発性半導体記憶装置 |
US5166646A (en) * | 1992-02-07 | 1992-11-24 | Motorola, Inc. | Integrated tunable resonators for use in oscillators and filters |
US5422842A (en) * | 1993-07-08 | 1995-06-06 | Sundisk Corporation | Method and circuit for simultaneously programming and verifying the programming of selected EEPROM cells |
TW287313B (zh) * | 1995-02-20 | 1996-10-01 | Matsushita Electric Ind Co Ltd | |
US5712815A (en) * | 1996-04-22 | 1998-01-27 | Advanced Micro Devices, Inc. | Multiple bits per-cell flash EEPROM capable of concurrently programming and verifying memory cells and reference cells |
JPH1055690A (ja) * | 1996-08-07 | 1998-02-24 | Nec Corp | 電気的書込可能な不揮発性半導体記憶装置 |
EP0905712B1 (en) | 1997-09-29 | 2003-04-23 | STMicroelectronics S.r.l. | Method and device for analog programming of flash EEPROM memory cells with autoverify |
KR100327421B1 (ko) * | 1997-12-31 | 2002-07-27 | 주식회사 하이닉스반도체 | 비휘발성 메모리 소자의 프로그램 시스템 및 그의 프로그램 방법 |
JP2000076873A (ja) * | 1998-08-26 | 2000-03-14 | Oki Micro Design:Kk | メモリセルのしきい値電圧制御方法及び半導体記憶装置 |
US6314014B1 (en) | 1999-12-16 | 2001-11-06 | Ovonyx, Inc. | Programmable resistance memory arrays with reference cells |
US6473332B1 (en) * | 2001-04-04 | 2002-10-29 | The University Of Houston System | Electrically variable multi-state resistance computing |
JP4907011B2 (ja) * | 2001-04-27 | 2012-03-28 | 株式会社半導体エネルギー研究所 | 不揮発性メモリとその駆動方法、及び半導体装置 |
US7116593B2 (en) * | 2002-02-01 | 2006-10-03 | Hitachi, Ltd. | Storage device |
-
2003
- 2003-01-28 JP JP2003018645A patent/JP4249992B2/ja not_active Expired - Fee Related
- 2003-11-25 US US10/722,732 patent/US7006371B2/en not_active Expired - Lifetime
- 2003-12-04 CN CNB2003101195969A patent/CN100367411C/zh not_active Expired - Fee Related
- 2003-12-04 KR KR20030087430A patent/KR100593325B1/ko active IP Right Grant
- 2003-12-04 EP EP20030257632 patent/EP1426969A3/en not_active Withdrawn
- 2003-12-04 TW TW92134200A patent/TWI245290B/zh not_active IP Right Cessation
Cited By (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101371313B (zh) * | 2006-01-13 | 2011-08-17 | 夏普株式会社 | 非易失性半导体存储装置 |
CN101030448B (zh) * | 2006-03-01 | 2011-09-07 | 松下电器产业株式会社 | 半导体存储器件及半导体集成电路*** |
US8456887B2 (en) | 2007-12-26 | 2013-06-04 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device |
CN101911205B (zh) * | 2007-12-26 | 2014-06-04 | 株式会社东芝 | 非易失性半导体存储器件 |
CN102077293A (zh) * | 2008-06-27 | 2011-05-25 | 桑迪士克3D公司 | 非易失性存储器中的同时写入和核对 |
CN102077293B (zh) * | 2008-06-27 | 2014-10-15 | 桑迪士克3D公司 | 非易失性存储器中的同时写入和核对 |
CN102169722B (zh) * | 2010-02-25 | 2014-01-08 | 复旦大学 | 降低初始化或置位操作功耗的电阻随机存储器及其操作方法 |
CN102169722A (zh) * | 2010-02-25 | 2011-08-31 | 复旦大学 | 降低初始化或置位操作功耗的电阻随机存储器及其操作方法 |
CN102169720A (zh) * | 2010-02-25 | 2011-08-31 | 复旦大学 | 一种消除过写、误写现象的电阻随机存储器 |
CN102169720B (zh) * | 2010-02-25 | 2014-04-02 | 复旦大学 | 一种消除过写、误写现象的电阻随机存储器 |
CN101894587A (zh) * | 2010-07-23 | 2010-11-24 | 上海宏力半导体制造有限公司 | 相变存储器的自限写入脉冲发生电路 |
CN103229419B (zh) * | 2010-11-19 | 2016-08-03 | 惠普发展公司,有限责任合伙企业 | 用于切换忆阻器件的方法和电路 |
CN103262414A (zh) * | 2010-11-19 | 2013-08-21 | 惠普发展公司,有限责任合伙企业 | 用于切换阵列中的忆阻器件的方法和电路 |
CN103229419A (zh) * | 2010-11-19 | 2013-07-31 | 惠普发展公司,有限责任合伙企业 | 用于切换忆阻器件的方法和电路 |
US9324421B2 (en) | 2010-11-19 | 2016-04-26 | Hewlett Packard Enterprise Development Lp | Method and circuit for switching a memristive device |
CN102270505A (zh) * | 2011-06-24 | 2011-12-07 | 北京时代全芯科技有限公司 | 相变存储单元及相变存储器 |
CN103578548B (zh) * | 2012-08-09 | 2016-08-03 | 北京兆易创新科技股份有限公司 | 快闪存储器及其参考单元的确定方法 |
CN103578548A (zh) * | 2012-08-09 | 2014-02-12 | 北京兆易创新科技股份有限公司 | 快闪存储器及其参考单元的确定方法 |
CN106448731A (zh) * | 2015-08-06 | 2017-02-22 | 意法半导体(鲁塞)公司 | 用于管理eeprom存储器单元中的数据的写入周期的方法和*** |
US10528287B2 (en) | 2015-10-09 | 2020-01-07 | Sony Corporation | Memory, memory controller, storage apparatus, information processing system, and control method for tracking erase count and rewrite cycles of memory pages |
CN106776362A (zh) * | 2015-11-24 | 2017-05-31 | 中芯国际集成电路制造(上海)有限公司 | 存储器的控制方法及装置 |
CN113345503A (zh) * | 2020-03-02 | 2021-09-03 | 华邦电子股份有限公司 | 半导体存储装置以及读出方法 |
CN113345503B (zh) * | 2020-03-02 | 2024-05-14 | 华邦电子股份有限公司 | 半导体存储装置以及读出方法 |
CN113744780A (zh) * | 2021-09-07 | 2021-12-03 | 上海集成电路装备材料产业创新中心有限公司 | 一种多值存储器的校准电路、校准方法和编程方法 |
CN113744780B (zh) * | 2021-09-07 | 2024-03-08 | 上海集成电路装备材料产业创新中心有限公司 | 一种多值存储器的校准电路、校准方法和编程方法 |
Also Published As
Publication number | Publication date |
---|---|
US7006371B2 (en) | 2006-02-28 |
EP1426969A3 (en) | 2005-11-16 |
CN100367411C (zh) | 2008-02-06 |
JP2004234707A (ja) | 2004-08-19 |
KR20040048864A (ko) | 2004-06-10 |
JP4249992B2 (ja) | 2009-04-08 |
TW200418034A (en) | 2004-09-16 |
KR100593325B1 (ko) | 2006-06-26 |
US20040114444A1 (en) | 2004-06-17 |
TWI245290B (en) | 2005-12-11 |
EP1426969A2 (en) | 2004-06-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1505052A (zh) | 半导体存储装置和存储单元的写入以及擦除方法 | |
US8125818B2 (en) | Method of programming variable resistance element and variable resistance memory device using the same | |
KR101193395B1 (ko) | 비휘발성 메모리 셀 및 반도체 메모리 장치 | |
JP5542737B2 (ja) | 不揮発性半導体記憶装置 | |
US6330189B1 (en) | Nonvolatile semiconductor memory device | |
US8254183B2 (en) | Method of programming nonvolatile memory device | |
TWI559310B (zh) | 非揮發性記憶體裝置,其抹除方法,及包括該非揮發性記憶體裝置之記憶體系統 | |
JP4909670B2 (ja) | 不揮発性半導体記憶装置及びそれを用いた不揮発性メモリシステム | |
JP5307213B2 (ja) | 不揮発性記憶装置 | |
TWI406297B (zh) | Semiconductor memory device | |
US20100271860A1 (en) | Driving method of variable resistance element, initialization method of variable resistance element, and nonvolatile storage device | |
JP2008085196A (ja) | 半導体不揮発性メモリ、データ書き込み方法、半導体不揮発性メモリの製造方法、及びデータ書き込みプログラム | |
US8023330B2 (en) | Method of erasing a nonvolatile memory device | |
JP5132703B2 (ja) | 不揮発性半導体記憶装置 | |
CN106486166A (zh) | 存储器设备、存储器***及其操作方法 | |
WO2006124352A2 (en) | Devices for programming a memory | |
CN1505054A (zh) | 半导体存储装置及存储单元阵列的擦除方法 | |
JP5565948B2 (ja) | 半導体メモリ | |
CN101123120A (zh) | 一种采用电阻存储介质的一次编程存储器及其操作方法 | |
JP2010113742A (ja) | 不揮発性半導体記憶装置及びその制御方法 | |
JP2011040142A (ja) | 不揮発性半導体記憶装置 | |
JP2005527061A (ja) | 予備消去ステップを用いてフラッシュメモリを消去する方法 | |
JP2007179687A (ja) | 不揮発性半導体記憶装置及びその駆動方法 | |
CN104620321B (zh) | 用于非易失性存储器的互补解码 | |
DE112020000174T5 (de) | Adaptive vpass für 3d-flash-speicher mit paarkettenstruktur |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: ICAN TREFFERT INTELLECTUAL PROPERTY Free format text: FORMER OWNER: SHARP CORPORATION Effective date: 20130201 Owner name: ALLOGENE DEVELOPMENT CO., LTD. Free format text: FORMER OWNER: ICAN TREFFERT INTELLECTUAL PROPERTY Effective date: 20130201 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20130201 Address after: Delaware Patentee after: Allogeneic Development Co.,Ltd. Address before: Budapest Patentee before: Eicke Fout intellectual property Co. Effective date of registration: 20130201 Address after: Budapest Patentee after: Eicke Fout intellectual property Co. Address before: Osaka Japan Patentee before: Sharp Corp. |
|
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080206 |