CN1275801A - 半导体装置的制造方法和半导体装置 - Google Patents
半导体装置的制造方法和半导体装置 Download PDFInfo
- Publication number
- CN1275801A CN1275801A CN00117939A CN00117939A CN1275801A CN 1275801 A CN1275801 A CN 1275801A CN 00117939 A CN00117939 A CN 00117939A CN 00117939 A CN00117939 A CN 00117939A CN 1275801 A CN1275801 A CN 1275801A
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- oxide film
- semiconductor substrate
- liner oxide
- film
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Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 120
- 238000000034 method Methods 0.000 title claims abstract description 99
- 239000000758 substrate Substances 0.000 claims abstract description 121
- 238000005530 etching Methods 0.000 claims abstract description 63
- 230000003647 oxidation Effects 0.000 claims abstract description 42
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 42
- 230000015572 biosynthetic process Effects 0.000 claims description 31
- 238000004519 manufacturing process Methods 0.000 claims description 30
- 230000001590 oxidative effect Effects 0.000 abstract description 2
- 230000002265 prevention Effects 0.000 abstract 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 22
- 229910052710 silicon Inorganic materials 0.000 description 22
- 239000010703 silicon Substances 0.000 description 22
- 238000002955 isolation Methods 0.000 description 11
- 230000001154 acute effect Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 238000001312 dry etching Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 239000010410 layer Substances 0.000 description 3
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 230000006835 compression Effects 0.000 description 2
- 238000007906 compression Methods 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000003064 anti-oxidating effect Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010790 dilution Methods 0.000 description 1
- 239000012895 dilution Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000003701 mechanical milling Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000010301 surface-oxidation reaction Methods 0.000 description 1
- 238000002560 therapeutic procedure Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
- -1 wiring Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Element Separation (AREA)
- Local Oxidation Of Silicon (AREA)
Abstract
Description
Claims (6)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15361099A JP3917327B2 (ja) | 1999-06-01 | 1999-06-01 | 半導体装置の製造方法及び装置 |
JP153610/1999 | 1999-06-01 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1275801A true CN1275801A (zh) | 2000-12-06 |
CN1145208C CN1145208C (zh) | 2004-04-07 |
Family
ID=15566259
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB00117939XA Expired - Fee Related CN1145208C (zh) | 1999-06-01 | 2000-06-01 | 半导体装置的制造方法和半导体装置 |
Country Status (7)
Country | Link |
---|---|
US (2) | US6635945B1 (zh) |
JP (1) | JP3917327B2 (zh) |
KR (1) | KR100399829B1 (zh) |
CN (1) | CN1145208C (zh) |
MY (1) | MY124777A (zh) |
SG (1) | SG82695A1 (zh) |
TW (1) | TW466549B (zh) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100350589C (zh) * | 2005-01-18 | 2007-11-21 | 旺宏电子股份有限公司 | 由清洗形成圆滑边角的浅沟渠隔离方法 |
CN100401498C (zh) * | 2003-01-27 | 2008-07-09 | 尔必达存储器株式会社 | 半导体设备的制造方法以及半导体衬底的氧化方法 |
CN100416833C (zh) * | 2005-03-10 | 2008-09-03 | 台湾积体电路制造股份有限公司 | 半导体元件及其形成方法 |
CN102237405A (zh) * | 2010-05-07 | 2011-11-09 | 富士通半导体股份有限公司 | 复合半导体器件及其制造方法 |
CN102842595A (zh) * | 2011-06-20 | 2012-12-26 | 中国科学院微电子研究所 | 半导体器件及其制造方法 |
CN103515382A (zh) * | 2012-06-14 | 2014-01-15 | 拉碧斯半导体株式会社 | 半导体装置及其制造方法 |
CN112086351A (zh) * | 2019-06-13 | 2020-12-15 | 芯恩(青岛)集成电路有限公司 | 沟槽刻蚀方法 |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW388100B (en) * | 1997-02-18 | 2000-04-21 | Hitachi Ulsi Eng Corp | Semiconductor deivce and process for producing the same |
KR100873358B1 (ko) * | 2002-10-31 | 2008-12-10 | 매그나칩 반도체 유한회사 | 반도체소자의 소자분리막 제조방법 |
US20050095808A1 (en) * | 2003-11-04 | 2005-05-05 | Industrial Technology Research Institute | Thermal oxidation method for topographic feature corner rounding |
KR100545182B1 (ko) * | 2003-12-31 | 2006-01-24 | 동부아남반도체 주식회사 | 반도체 소자 및 그의 제조 방법 |
US7339253B2 (en) * | 2004-08-16 | 2008-03-04 | Taiwan Semiconductor Manufacturing Company | Retrograde trench isolation structures |
KR100688750B1 (ko) * | 2005-08-18 | 2007-03-02 | 동부일렉트로닉스 주식회사 | 섀로우 트렌치 아이솔레이션의 제조방법 |
US7687370B2 (en) * | 2006-01-27 | 2010-03-30 | Freescale Semiconductor, Inc. | Method of forming a semiconductor isolation trench |
KR100780656B1 (ko) * | 2006-06-29 | 2007-11-29 | 주식회사 하이닉스반도체 | 반도체 소자의 리세스게이트 제조방법 |
KR100801062B1 (ko) * | 2006-07-07 | 2008-02-04 | 삼성전자주식회사 | 트렌치 소자 분리 방법, 이를 이용한 게이트 구조물 형성방법 및 불 휘발성 메모리 소자 형성 방법 |
US8120094B2 (en) | 2007-08-14 | 2012-02-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | Shallow trench isolation with improved structure and method of forming |
JP5630090B2 (ja) * | 2010-06-17 | 2014-11-26 | 富士電機株式会社 | 半導体装置の製造方法 |
KR101703539B1 (ko) | 2015-02-10 | 2017-02-07 | 재단법인 아산사회복지재단 | 가이드 카테터 |
CN110137082A (zh) * | 2018-02-09 | 2019-08-16 | 天津环鑫科技发展有限公司 | 一种功率器件沟槽形貌的优化方法 |
Family Cites Families (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5696402A (en) * | 1965-09-28 | 1997-12-09 | Li; Chou H. | Integrated circuit device |
JPS60223153A (ja) * | 1984-04-19 | 1985-11-07 | Nippon Telegr & Teleph Corp <Ntt> | Mis型キャパシタを有する半導体装置の製法 |
US4735824A (en) * | 1985-05-31 | 1988-04-05 | Kabushiki Kaisha Toshiba | Method of manufacturing an MOS capacitor |
US4693781A (en) * | 1986-06-26 | 1987-09-15 | Motorola, Inc. | Trench formation process |
US4729815A (en) * | 1986-07-21 | 1988-03-08 | Motorola, Inc. | Multiple step trench etching process |
JPS63314844A (ja) * | 1987-06-18 | 1988-12-22 | Toshiba Corp | 半導体装置の製造方法 |
US5258332A (en) * | 1987-08-28 | 1993-11-02 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor devices including rounding of corner portions by etching |
DE3902701A1 (de) * | 1988-01-30 | 1989-08-10 | Toshiba Kawasaki Kk | Verfahren zur herstellung einer halbleiteranordnung |
KR940003218B1 (ko) * | 1988-03-24 | 1994-04-16 | 세이꼬 엡슨 가부시끼가이샤 | 반도체 장치 및 그 제조방법 |
KR960006714B1 (ko) | 1990-05-28 | 1996-05-22 | 가부시끼가이샤 도시바 | 반도체 장치의 제조 방법 |
US5448102A (en) * | 1993-06-24 | 1995-09-05 | Harris Corporation | Trench isolation stress relief |
US5358891A (en) * | 1993-06-29 | 1994-10-25 | Intel Corporation | Trench isolation with planar topography and method of fabrication |
JP2955459B2 (ja) | 1993-12-20 | 1999-10-04 | 株式会社東芝 | 半導体装置の製造方法 |
US5536675A (en) * | 1993-12-30 | 1996-07-16 | Intel Corporation | Isolation structure formation for semiconductor circuit fabrication |
JP3400846B2 (ja) * | 1994-01-20 | 2003-04-28 | 三菱電機株式会社 | トレンチ構造を有する半導体装置およびその製造方法 |
JP3414590B2 (ja) * | 1996-06-20 | 2003-06-09 | 株式会社東芝 | 半導体装置の製造方法 |
JP3611226B2 (ja) * | 1996-09-17 | 2005-01-19 | 株式会社ルネサステクノロジ | 半導体装置及びその製造方法 |
US5863827A (en) * | 1997-06-03 | 1999-01-26 | Texas Instruments Incorporated | Oxide deglaze before sidewall oxidation of mesa or trench |
US5880004A (en) * | 1997-06-10 | 1999-03-09 | Winbond Electronics Corp. | Trench isolation process |
US6002160A (en) * | 1997-12-12 | 1999-12-14 | Advanced Micro Devices, Inc. | Semiconductor isolation process to minimize weak oxide problems |
US6074932A (en) * | 1998-01-28 | 2000-06-13 | Texas Instruments - Acer Incorporated | Method for forming a stress-free shallow trench isolation |
US6274498B1 (en) * | 1998-09-03 | 2001-08-14 | Micron Technology, Inc. | Methods of forming materials within openings, and method of forming isolation regions |
US6372601B1 (en) * | 1998-09-03 | 2002-04-16 | Micron Technology, Inc. | Isolation region forming methods |
US6368941B1 (en) * | 2000-11-08 | 2002-04-09 | United Microelectronics Corp. | Fabrication of a shallow trench isolation by plasma oxidation |
-
1999
- 1999-06-01 JP JP15361099A patent/JP3917327B2/ja not_active Expired - Fee Related
-
2000
- 2000-05-27 SG SG200002903A patent/SG82695A1/en unknown
- 2000-05-29 TW TW089110412A patent/TW466549B/zh not_active IP Right Cessation
- 2000-05-30 MY MYPI20002391A patent/MY124777A/en unknown
- 2000-05-30 US US09/580,953 patent/US6635945B1/en not_active Expired - Fee Related
- 2000-06-01 KR KR10-2000-0029842A patent/KR100399829B1/ko not_active IP Right Cessation
- 2000-06-01 CN CNB00117939XA patent/CN1145208C/zh not_active Expired - Fee Related
-
2003
- 2003-08-12 US US10/638,485 patent/US6858515B2/en not_active Expired - Fee Related
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100401498C (zh) * | 2003-01-27 | 2008-07-09 | 尔必达存储器株式会社 | 半导体设备的制造方法以及半导体衬底的氧化方法 |
CN100350589C (zh) * | 2005-01-18 | 2007-11-21 | 旺宏电子股份有限公司 | 由清洗形成圆滑边角的浅沟渠隔离方法 |
CN100416833C (zh) * | 2005-03-10 | 2008-09-03 | 台湾积体电路制造股份有限公司 | 半导体元件及其形成方法 |
CN102237405A (zh) * | 2010-05-07 | 2011-11-09 | 富士通半导体股份有限公司 | 复合半导体器件及其制造方法 |
US9099545B2 (en) | 2010-05-07 | 2015-08-04 | Transphorm Japan, Inc. | Compound semiconductor device and method of manufacturing same |
CN102842595A (zh) * | 2011-06-20 | 2012-12-26 | 中国科学院微电子研究所 | 半导体器件及其制造方法 |
CN103515382A (zh) * | 2012-06-14 | 2014-01-15 | 拉碧斯半导体株式会社 | 半导体装置及其制造方法 |
US9627477B2 (en) | 2012-06-14 | 2017-04-18 | Lapis Semiconductor Co., Ltd. | Trench isolation structure having isolating trench elements |
CN103515382B (zh) * | 2012-06-14 | 2017-11-10 | 拉碧斯半导体株式会社 | 半导体装置及其制造方法 |
CN112086351A (zh) * | 2019-06-13 | 2020-12-15 | 芯恩(青岛)集成电路有限公司 | 沟槽刻蚀方法 |
Also Published As
Publication number | Publication date |
---|---|
KR100399829B1 (ko) | 2003-09-29 |
JP3917327B2 (ja) | 2007-05-23 |
JP2000340558A (ja) | 2000-12-08 |
US6858515B2 (en) | 2005-02-22 |
KR20010020932A (ko) | 2001-03-15 |
MY124777A (en) | 2006-06-30 |
CN1145208C (zh) | 2004-04-07 |
SG82695A1 (en) | 2001-08-21 |
TW466549B (en) | 2001-12-01 |
US6635945B1 (en) | 2003-10-21 |
US20040077152A1 (en) | 2004-04-22 |
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