CN1188563A - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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CN1188563A
CN1188563A CN96194858A CN96194858A CN1188563A CN 1188563 A CN1188563 A CN 1188563A CN 96194858 A CN96194858 A CN 96194858A CN 96194858 A CN96194858 A CN 96194858A CN 1188563 A CN1188563 A CN 1188563A
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substrate
chip
semiconductor device
wafer
methods according
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CN1098534C (zh
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宇佐美光雄
坪崎邦宏
西邦彦
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Hitachi Ltd
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Hitachi Ltd
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Abstract

用包含导电颗粒(406)的有机粘接剂层(409)把半导体芯片(105’)和基片(102)粘结在一起,通过导电颗粒(406)将压焊块(405)和电极(412)相互电连接在一起。通过使附着在带(107)上的半导体晶片(105)与刻蚀剂相接触形成该半导体芯片(105’),与刻蚀剂相接触的同时在半导体晶片的面内方向高速旋转该半导体晶片(105)或使该半导体晶片(105)作横向往复运动,均匀刻蚀该半导体晶片(105),从而减薄其厚度并把减薄后的晶片切割开。用加热头(106)热压分割开的薄芯片(105’),使其粘结到基片(102)。用这种方法可以低成本稳定制造薄半导体芯片,并把它粘结到基片上,不使其破碎,这样得到的半导体器件不大会由于来自外界的挠曲应力而破损。

Description

半导体器件及其制造方法
本发明涉及半导体器件，也涉及其制造方法。本发明尤其涉及这样一种半导体器件，它非常薄，不太可能被挠曲应力所破坏，适用于各种类型的卡，本发明也涉及以低成本稳定地生产这种薄型半导体器件的方法。
制造诸如IC卡一类的各种卡都要使用非常薄的半导体器件。由于挠曲应力容易使其破损，因此至今为止，很难得到能用于实际应用中的这种卡。
在例如“LSI Handbook(由Electronic Communication Society编辑及Ohom Corporation于1984年11月30日出版，406-416页)中描述了薄半导体器件的常规装配工艺。在这种常规半导体器件的装配工艺中，使用的半导体晶片厚约200微米或略多，直接对其进行处理不大会使其破损。
一般都知道，技术上广泛使用抛光方法来减薄半导体晶片。为了均匀地加工半导体晶片，例如加工精度为5％的抛光方法，必须使半导体晶片以高精度及高重复性地平行于抛光装置。为了达到这种高度的平行，需要非常昂贵的装置，因此很难得到实际应用。
曾尝试在监控半导体晶片的厚度时进行抛光的方法。如果用这种方法来抛光一个大面积的区域，则需要很长时间，造成生产率低下。
另外，当半导体晶片被抛光到非常薄，例如0.1微米左右时，会产生问题，由抛光产生的应力会使作在半导体晶片表面上的各种半导体器件(例如晶体管)损坏。
此外，当直接处理用现有技术的工艺减薄的半导体芯片时，会发生半导体芯片损坏的问题。因此，很难以高成品率及低成本制造半导体器件。
因此，本发明的一个目的是提供一种能解决现有技术工艺问题的半导体器件，它不大会被施加在其上的挠曲应力损坏，能用作各种类型的卡。
本发明的另一个目的是提供一种制造半导体器件的方法，这种方法能把半导体芯片减薄到0.1-110微米左右，并且这种非常薄的芯片可以不会发生任何破裂地进行处理。
为了达到上述目的，提供一种半导体器件，包括：利用包含众多导电颗粒的有机粘接剂层面对面粘结的薄半导体芯片和基片，半导体芯片基片一侧的表面上由导电薄膜形成的压焊块与基片芯片一侧的表面上的基片电极，使得压焊块和基片电极通过导电颗粒相互电连接。
该薄型半导体芯片和由弹性材料制成的基片相互面对面放置，通过有机粘接剂层结合并固定在一起，这样当从外界施加挠曲应力时，它们不大会被损坏。
有机粘接剂中的导电颗粒确保了半导体芯片和基片间的电连接。通过对相互面对面放置的半导体芯片的压焊块及基片的电极施加压力使导电颗粒变形。这种变形的导电颗粒用来相互电连接半导体芯片和基片，因此，压焊块和电极间的电连接非常可靠。
在半导体芯片上形成具有给定图形的钝化薄膜，压焊块形成在没有钝化薄膜的区域。压焊块的厚度小于钝化薄膜的厚度，因此有效地抑制了在面对面的压焊块和电极间的导电颗粒迁移到外面。在这种方法中，导电颗粒使压焊块和电极可靠地电连接在一起。
本发明的另一个目的是制造半导体器件的方法，它包括以下步骤：使附着在带上的半导体晶片与刻蚀剂接触，同时以高速在面内方向使该晶片旋转或作横向往复运动，这样通过刻蚀使该半导体晶片的厚度均匀减薄，然后把减薄后的半导体晶片划分成众多芯片，使薄芯片分别热压到基片，把它们一个接一个地粘结到基片上。
当以高速在晶片面内方向旋转晶片或使其作横向往复运动时，使该半导体芯片与刻蚀剂接触，这样使晶片非常均匀地减薄，因此得到非常薄的基本上没有如何不平整和畸变的半导体晶片(0.1-110微米)。
通过把非常薄的半导体晶片切割成小尺寸的芯片得到的众多薄半导体芯片分别从作为第一基片的带上取下，在第二基片上被加热并用压力焊接。这样，尽管这些半导体芯片非常薄，也可以把它们粘结固定到第二基片上去，而不会发生任何不希望的破碎。尤其当使用不硬的带作为第一基片时，只有期望的芯片向上推并选择性地加热，这样很容易把期望的芯片粘结到第二基片。从实际应用的观点，最好通过切割把晶片完全分割成单独的芯片来把晶片划分成芯片。
通过导电粘接剂在第二基片和半导体芯片间进行粘结，因此任何引线键合都成为不必要的，这样非常有效地简化了生产步骤并降低了成本。
图1说明本发明的第一实施方式；
图2说明现有技术方法；
图3的平面图说明本发明的一个实施方式；
图4(1)的平面图说明芯片和基片之间的连接；
图4(2)的截面图说明该芯片和该基片之间的连接；
图4(3)的截面图说明该芯片和该基片之间连接部分；
图5(1)-图5(3)的简图分别说明本发明的第二实施方式的实施步骤；
图6(1)-图6(5)的简图分别说明本发明的第三实施方式的实施步骤；
图7(1)-图7(6)的简图分别说明本发明的第四实施方式的实施步骤；
例1
如图1所示，薄半导体晶片105放在用框架101固定的带107(HitachiChemical Ltd.的HA-1506)上。划片槽104把该晶片105完全切开，分割成众多芯片105’。
利用加热头106从带107的背面向上推已被分割开的芯片105’，推向已预先涂了粘接剂103的基片102，因而使芯片热粘结到基片102上。粘接剂1 03是由有机材料和导电颗粒的化合物材料组成的各向异性导电粘接剂，因此通过加压和加热，由粘接剂103中所含的导电颗粒把作在基片102上的电极(未表示出来)和薄芯片105的电极(即压焊块，未表示出来)相互电连接。
应该注意到芯片105’的厚度薄至0.1-110微米，是可弯曲的。如果其厚度薄于0.1微米，就很难在芯片105’上制作各种类型的半导体器件。如果厚度大于110微米，弯曲芯片时可能会发生碎裂。芯片105’的厚度最好应该在0.1-110微米的范围内。
带107的性质不硬。当加热带107的同时用加热头106向上推带107时，带107上的薄芯片105’也向上推，因此保证了芯片105’和其上方的基片102均匀和稳定的粘结。
图3表示图1所示的平面结构，其中用环形框架101把带107固定，划片槽104把晶片105分割成众多芯片105’。晶片105的圆周304在框架101内侧之内，与带107呈平面粘结。框架101由不锈钢或塑料材料制成。虽然晶片105有0.1-110微米那么薄，利用压感粘接剂可以把其牢固地粘结到带107上。在这种情况下，当晶片105被粘结到带107上时，对晶片105进行划片，划开的芯片105’不会从带107上单独剥离开。
图4表示薄芯片105’被粘结到基片102后的情况。图4(1)是平面图，图4(2)是截面图。薄芯片105’粘结到基片102的给定位置。作在薄芯片105’上的电极(压焊块)面向下与作在基片102上的电极(基片电极)相互连接。或者它们也可以通过引线键合或导电糊桨相互连接。
如上所述薄芯片的安装很简单，很容易实现，所以半导体器件可以以较低成本高性能地被减薄及划分，因此使其应用范围可以扩大到许多新的领域。
应该注意到，图4(3)表示图4(1)和图4(2)所示的薄芯片105’和基片102之间的连接部分的放大截面简图。如图4(3)所示，由导电薄膜组成的压焊块(即半导体芯片上的电极)405做在薄芯片105’的表面上没有任何钝化薄膜408的区域，由导电颗粒406把它和做在基片102表面上的基片电极412连接在一起。有机薄膜(有机粘接剂薄膜)409填充在基片102和芯片105’之间。有机薄膜409中包含导电颗粒410，确保压焊块405和基片电极412间的电连接。如图4(3)所示，在这种情况下，钝化薄膜409的厚度大于压焊块405的厚度。这样有效地抑制了压焊块405和基片电极412之间的导电颗粒406向外迁移。结果，压焊块405和基片电极412非常可靠地相互电连接在一起。
在现有技术方法中，如图2所示，用真空吸盘201吸住放在带203上的芯片202，把其移到另一个基片(未表示出)上去。特别是，带203上的芯片202是从晶片上切割下来的单个芯片。用真空吸盘201的吸针204吸住芯片202，一个接一个地移动。
带203涂有压感粘接剂，受到紫外光(UV)照射或受热后其粘性降低，但仍留有少量黏性。因此利用与真空吸盘201同步工作的吸针204可以把芯片202从带203上分开。
然而，在已知的用吸针204吸芯片的方法中，当芯片202的厚度限薄，薄至0.1-110微米时，芯片202很容易破碎。因此生产率降低，使该方法很难在实际中得到广泛应用。
例2
本例说明减薄半导体晶片的方法。
如图5(1)所示，用压感粘接剂把硅晶片105粘结在连接于框架101的带107上，然后硅晶片105以每分钟1000转或更高的速度旋转，刻蚀剂502从刻蚀喷嘴501洒到硅晶片105，刻蚀硅晶片的表面。本例中所用的刻蚀剂502由氢氧化钾水溶液组成(浓度：40％)。也可以使用氢氧化钾以外的其它刻蚀剂。
由于当硅晶片105以高速旋转时刻蚀剂502洒下，落到硅晶片105表面的刻蚀剂502相对于硅晶片105的表面以高速横向运动，如图5(2)所示。这使硅晶片105的表面均匀刻蚀，使硅晶片105被减薄，并且没有任何高度差和损伤。
如图5(3)所示，当硅晶片105以每分钟1000转或更高的高速作往复运动时，刻蚀剂502洒下，刻蚀剂502同样沿着硅晶片105的表面以高速横向运动。这使硅晶片105的表面均匀刻蚀，使硅晶片105被减薄，并且没有任何高度差和损伤。
例3
图6表示本发明的又一实施方式的流程图。
如图6(1)所示，硅晶片105固定在连接于框架101上的带107上，然后根据例2所示方法刻蚀并减薄硅晶片105，由此形成如图6(2)所示的截面结构。如图6(3)所示，进一步用划片槽104把硅晶片105分割开，形成众多芯片105’。
然后如图6(4)所示，把给定的芯片105’放在基片102的相应位置处，随后从下面推动加热头106，向着基片102热压芯片105’，使薄芯片105’移到基片102上，如图6(5)所示，因而通过粘接剂103把它们固定在一起。在晶片被分开前每一个芯片105’的特性都初步测量过，因此可以单独确认有缺陷的芯片和没有缺陷的芯片。因此，把没有缺陷的芯片单独选出来，放在适当的位置，移开并固定到基片102上。
应注意到，在例2和例3中所用的带107和例1中所用的是同一种类型，也可以使用其它类型的带。
例4
本例说明芯片的主表面和基片的主表面相对将薄芯片和基片面向下粘结固定的例子。
开始时如图7(1)所示，利用一个压敏带把硅晶片105固定到连接在第一框架101上的第一带107。此后如图7(2)所示，用和例2相同的方法减薄硅晶片。
下一步如图7(3)所示，硅晶片105的表面翻转向下与连接在第二框架101’上的第二带107’的表面面对面地放置，粘结在一起。
第一带107从硅晶片105上去除，形成做在第二带107’的表面上的硅晶片105的结构。随后如图7(4)所示，在硅晶片105上刻出划片槽104，把硅晶片分割成众多芯片105’。
如图7(5)所示，给定的芯片105’放在基片102的适当位置上，然后从下面推动加热头106，进行热压，通过各向异性的导电粘接剂103把薄芯片105’粘结到基片102上，如图7(6)所示。
根据这个例子，第二带107’移走后，芯片105’移到基片102上。与例1的情况相比，改变了上表面和底面。尤其是硅晶片105被固定到基片102上后，其初始上表面仍然保持。因此在此例中，如果硅晶片105被减薄以后，要求的半导体器件做在硅晶片105的表面，则把该半导体器件做在形成于基片102表面的芯片105’的表面。
从前面的描述中可以很清楚的看出，根据本发明可以得到下述的效果和优点。
(1)利用粘接剂把薄半导体芯片粘结到基片上，做在半导体芯片表面上的压焊块与基片表面的基片电极通过粘接剂中的导电颗粒相互电连接在一起，因此降低了由于弯曲造成破坏的可能性，并确保了电连接的高可靠性。
(2)由于减薄半导体晶片利用了刻蚀剂，其沿着晶片的主表面以高速运动，可以很容易得到厚度均匀的薄半导体，在其中不会产生任何变形或缺陷。
(3)薄半导体芯片离开带与粘结到基片上是在同一步中完成，这样薄半导体芯片可以粘结到基片上而不发生碎裂。
(4)对选定的芯片加热并加压，将其转移到基片上，因而确保很容易以较低成本把薄芯片安装到基片上。
(5)利用各向异性的导电粘接剂可以把每个半导体芯片粘结到基片上，因此不用引线键合就可以把芯片与基片电连接在一起。
(6)半导体芯片的厚度薄至0.1-110微米，在这个范围内芯片可以弯曲，因此可以实现能抵御弯曲的薄半导体器件。

Claims (24)

1半导体器件，包括：
半导体芯片和基片，利用包含大量导电颗粒的有机粘接剂层使半导体芯片与基片面对面，做在该半导体芯片基片一侧的表面上的由导电薄膜构成的压焊块，基片芯片一侧的表面上的基片电极，它位于对应于所述压焊块的位置上，使所述压焊块和所述基片电极通过所述导电颗粒相互电连接。
2根据权利要求1的半导体器件，其中所述半导体芯片的厚度为0.1-110微米。
3半导体器件，包括：
至少一个半导体芯片和一个基片，通过包含大量导电颗粒的有机粘接剂层使所述半导体芯片与所述基片面对面，位于该半导体芯片基片一侧的表面上、由钝化薄膜和导电薄膜组成的压焊块，位于基片芯片一侧表面上、对应于所述压焊块的位置处的基片电极，其中通过所述导电颗粒使所述压焊块和所述基片电极相互电连接，所述压焊块做在所述半导体芯片基片一侧的表面上没有任何钝化薄膜的区域。
4根据权利要求3的半导体芯片，其中所述钝化薄膜的厚度大于所述压焊块的厚度。
5制作半导体器件的方法，由以下步骤组成：使固定在第一基片上的半导体晶片的表面与刻蚀剂接触，沿着所述半导体晶片表面快速移动所述刻蚀剂以减薄所述半导体晶片的厚度，把减薄后的晶片切割成众多芯片，把芯片从所述第一基片上取下，粘结到第二基片。
6根据权利要求5的制造半导体器件的方法，其中通过切割把所述晶片分割成众多芯片的步骤包括用划片槽把所述半导体芯片完全切开。
7根据权利要求5的制造半导体器件的方法，其中减薄所述半导体器件的厚度的步骤包括使所述半导体晶片的表面与所述刻蚀剂接触，及在所述半导体晶片的面内方向旋转所述晶片。
8根据权利要求7的制造半导体器件的方法，其中所述晶片以每分钟1000转或更高的速度旋转。
9根据权利要求5的制造半导体器件的方法，其中减薄所述半导体晶片的厚度的步骤包括使所述半导体晶片的表面与所述刻蚀剂接触，及所述半导体晶片沿着所述晶片的面内方向作往复运动。
10根据权利要求5的制造半导体器件的方法，其中所述第一基片由带组成。
11根据权利要求10的制造半导体器件的方法，其中所述带是由有机材料制成的不硬的带组成。
12根据权利要求10的制造半导体器件的方法，其中所述带由框架支撑。
13根据权利要求12的制造半导体器件的方法，其中所述框架是园环形。
14根据权利要求5的制造半导体器件的方法，其中从所述第一基片上取下所述芯片，并粘结到所述第二基片上的步骤包括有选择地加热期望的芯片，并压向所述第二基片。
15根据权利要求5的制造半导体器件的方法，其中从所述第一基片上取下所述芯片并将其粘结到所述第二基片上的步骤包括利用位于所述带下方的加热头向上推所述芯片并加热所述芯片。
16根据权利要求5的制造半导体器件的方法，其中用涂在所述第二基片的表面上的粘接剂层把所述芯片和所述第二基片粘结在一起。
17根据权利要求16的制造半导体器件的方法，其中所述粘接剂层由各向异性的导电粘接剂层组成。
18根据权利要求17的制造半导体器件的方法，其中所述各向异性的导电粘接剂层由有机材料及导电颗粒组成。
19根据权利要求5的制造半导体器件的方法，其中在所述芯片表面上的电极和所述第二基片表面上的电极相互面向下粘结而电连接在一起。
20根据权利要求5的制造半导体器件的方法，其中把减薄后的晶片转移到第三基片上去的步骤***减薄所述半导体晶片厚度的步骤和把所述最终的半导体晶片切割成众多芯片的步骤之间，所述芯片从所述第三基片上分开，粘结到所述第二基片上。
21根据权利要求20的制造半导体器件的方法，其中所述第三基片由不硬的带组成。
22根据权利要求5的制造半导体器件的方法，其中所述晶片厚为0.1-110微米。
23根据权利要求5的制造半导体器件的方法，还包括以下步骤：在把所述芯片粘结到所述第二基片的步骤前，执行在所述芯片第二基片一侧的表面上的形成给定图形的钝化薄膜及形成厚度小于所述钝化薄膜的电极的步骤。
24根据权利要求23的制造半导体器件的方法，其中所述电极做在所述芯片第二基片一侧的表面上没有形成任何钝化薄膜的区域。
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