JPH06204267A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPH06204267A
JPH06204267A JP5001486A JP148693A JPH06204267A JP H06204267 A JPH06204267 A JP H06204267A JP 5001486 A JP5001486 A JP 5001486A JP 148693 A JP148693 A JP 148693A JP H06204267 A JPH06204267 A JP H06204267A
Authority
JP
Japan
Prior art keywords
semiconductor
wafer
dicing
die bonding
elements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5001486A
Other languages
English (en)
Inventor
Hiroshi Shindo
浩志 進藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Yamagata Ltd
Original Assignee
NEC Yamagata Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Yamagata Ltd filed Critical NEC Yamagata Ltd
Priority to JP5001486A priority Critical patent/JPH06204267A/ja
Publication of JPH06204267A publication Critical patent/JPH06204267A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68354Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68363Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Dicing (AREA)

Abstract

(57)【要約】 【目的】半導体装置製造の後工程のウェーハマウント、
ダイシング、ダイボンディング時の、半導体素子への
傷、汚れ、欠けを防止する。 【構成】半導体ウェハ2の表面側にウェハ保持と表面保
護を兼ねた粘着テープ1を貼り付け、半導体ウェハ2の
裏面側からダイシングを行ない、ダイシングにより個々
に分割された半導体素子3裏面側を粘着テープ1越しに
ダイボンディング用治具5で押圧し、剥がすと同時にリ
ードフレーム4または半導体集積回路容器の素子搭載部
に移送し搭載する。これにより、半導体素子表面は保護
されたままダイシング、ダイボンディングが行なわれ、
またダイボンディング時はコレット等の治具が直接半導
体素子に接触すること無く行なわれ、半導体素子の傷、
汚れ、欠けの発生を防止できる。

Description

【発明の詳細な説明】
【0001】
【産業上の利用分野】本発明は半導体装置の製造方法に
関し、特にダイシング及び、ダイボンディングする方法
に関する。
【0002】
【従来の技術】半導体装置製造の後工程の製造方法を簡
単に説明する。半導体ウェーハを個々の半導体素子に分
割し、リードフレームまたは半導体集積回路容器の素子
搭載部に移送し搭載する。更に半導体素子の端子とリー
ドフレームまたは半導体集積回路容器の内部リードとの
結線、半導体素子の封止、外部リードのメッキ、捺印、
リード切断、選別、リード成形等を行ない半導体装置が
完成する。本発明は上述した半導体装置の製造方法の中
の、特に前半に関するものであり、その従来の製造方法
の詳細を図2を基に以下に説明する。半導体ウェーハ2
の裏面に粘着テープ1を貼り付け、半導体ウェハ2の表
面側からダイシングを行ない個々の半導体素子3に分割
する。次に半導体素子3の表面側を直接コレット5によ
り吸着し、リードフレーム4または半導体集積回路容器
の素子搭載部に移送し搭載する。
【0003】
【発明が解決しようとする課題】上述した従来の半導体
ウェーハを粘着テープに保持させてダイシング及び、ダ
イボンディングする方法では、半導体ウェーハ表面がむ
き出しの為ハンドリング時半導体素子の表面に傷、汚れ
が付き易い。また、ダイボンディングはコレットにより
半導体素子表面側を直接吸着し移送する為、半導体素子
端の欠け、表面の傷が生じ易いといった不具合がある。
【0004】本発明の目的は、半導体装置製造の後工程
のウェーハマウント、ダイシング、ダイボンディング時
に発生する半導体素子への傷、汚れ、欠けの発生を防止
できる半導体装置の製造方法を提供することにある。
【0005】
【課題を解決するための手段】本発明はダイシング前に
あらかじめ半導体ウェーハ表面側にウェハ保持と表面保
護膜を兼ねた粘着テープを貼り付け、その状態のままダ
イシングからダイボ,ディングまでを行なう。
【0006】
【実施例】次に本発明について図面を参照して説明す
る。図1は本発明の一実施例を説明するための工程断面
図である。
【0007】まず、半導体ウェハ2の表面側に粘着テー
プ1を貼り付ける(図1(a))。次に半導体ウェハ2
の裏面側からダイシングを行なう(図1(b))。次に
ダイシングされて個々に分割された半導体素子3を、粘
着テープ面を上側にしてダイボンダーにセットし、ダイ
ボンディング用治具5でテープごと半導体素子裏面を押
圧し(図1(c))、剥がすと同時にリードフレーム4
または半導体集積回路容器の素子搭載部に移送し搭載す
る〔図1(d)、(e)〕。
【0008】
【発明の効果】以上説明したように本発明は、ウェーハ
マウント工程からダイボンディング工程まで半導体ウェ
ーハ表面が粘着テープで保護されたまま行なわれる為、
半導体素子の表面の傷、汚れを防止できる。
【0009】また、ダイボンディング時はコレット等の
治具が半導体素子に直接接触しない為、半導体素子端の
欠け、表面の傷を防止できる効果がある。
【図面の簡単な説明】
【図1】本発明の一実施例を説明すために工程順に示し
た半導体装置の製造工程断面図である。
【図2】従来の半導体装置の製造方法を説明するために
工程順に示した製造工程断面図である。
【符号の説明】
1 粘着テープ 2 半導体ウェハ 3 半導体素子 4 リードフレーム 5 ダイボンディング用治具

Claims (1)

    【特許請求の範囲】
  1. 【請求項1】 半導体ウェハを粘着テープに保持させ、
    ダイシング、ダイボンディングを行なう方法において、
    半導体ウェハの表面側に粘着テープを貼り付け半導体ウ
    ェハの裏面側からダイシングし、更にダイボンディング
    時半導体素子を粘着テープ越しに押圧することにより剥
    離し、リードフレームまたは半導体集積回路容器の素子
    搭載部に移送し搭載することを特徴とする半導体装置の
    製造方法。
JP5001486A 1993-01-08 1993-01-08 半導体装置の製造方法 Pending JPH06204267A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5001486A JPH06204267A (ja) 1993-01-08 1993-01-08 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5001486A JPH06204267A (ja) 1993-01-08 1993-01-08 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
JPH06204267A true JPH06204267A (ja) 1994-07-22

Family

ID=11502775

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5001486A Pending JPH06204267A (ja) 1993-01-08 1993-01-08 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPH06204267A (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6215194B1 (en) 1998-10-01 2001-04-10 Mitsubishi Denki Kabushiki Kaisha Wafer sheet with adhesive on both sides and attached semiconductor wafer
US6514796B2 (en) 1995-05-18 2003-02-04 Hitachi, Ltd. Method for mounting a thin semiconductor device
CN1301536C (zh) * 2003-05-26 2007-02-21 台湾积体电路制造股份有限公司 一种避免晶圆切割时微粒掉落至晶圆上的方法
CN100431125C (zh) * 2005-07-20 2008-11-05 富士通株式会社 Ic芯片安装方法
CN111509107A (zh) * 2020-04-24 2020-08-07 湘能华磊光电股份有限公司 一种将led晶圆分离n份的倒膜的方法

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6514796B2 (en) 1995-05-18 2003-02-04 Hitachi, Ltd. Method for mounting a thin semiconductor device
US6589818B2 (en) 1995-05-18 2003-07-08 Hitachi. Ltd. Method for mounting a thin semiconductor device
US6215194B1 (en) 1998-10-01 2001-04-10 Mitsubishi Denki Kabushiki Kaisha Wafer sheet with adhesive on both sides and attached semiconductor wafer
US6461938B2 (en) 1998-10-01 2002-10-08 Mitsubishi Denki Kabushiki Kaisha Method of producing semiconductor devices
CN1301536C (zh) * 2003-05-26 2007-02-21 台湾积体电路制造股份有限公司 一种避免晶圆切割时微粒掉落至晶圆上的方法
CN100431125C (zh) * 2005-07-20 2008-11-05 富士通株式会社 Ic芯片安装方法
CN111509107A (zh) * 2020-04-24 2020-08-07 湘能华磊光电股份有限公司 一种将led晶圆分离n份的倒膜的方法
CN111509107B (zh) * 2020-04-24 2021-06-04 湘能华磊光电股份有限公司 一种将led晶圆分离n份的倒膜的方法

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Effective date: 19981104