CN110931532A - 一种像素单元、制作方法及显示装置 - Google Patents
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Abstract
本发明公开了一种像素单元、制作方法及显示装置,该像素单元包括第一正极层、设置于所述第一正极层之上的第一像素界定层、设置于所述第一像素界定层之上的第二正极层及设置于所述第二正极层之上的第二像素界定层,从而分别驱动所述第一正极层及所述第二正极层。本发明中通过在同一个子像素中采用两种阳极驱动电压,使两部分的发光材料分开驱动,中间区域亮度得到提高,使整个像素发光亮度均匀。
Description
技术领域
本发明涉及显示技术领域,更具体地说,涉及一种像素单元、制作方法及显示装置。
背景技术
目前打印OLED(OrganicLight-Emitting Diode)发展逐渐成熟,但是由于液态发光材料在升温干燥过程中,形貌会发生变化,如图1所示的OLED像素结构在升温干燥后像素界定层内材料高度会不均匀分布,像素界定层周围厚度较中间厚度大,造成发光亮度不均匀,周边亮度高,中间亮度低。
发明内容
本发明提供了一种像素单元、制作方法及显示装置,解决了现有技术的OLED像素结构在升温干燥后像素界定层内材料高度会不均匀分布,像素界定层周围厚度较中间厚度大,造成发光亮度不均匀,周边亮度高,中间亮度低的问题。
一方面,本发明提供了一种像素单元,包括第一正极层、设置于所述第一正极层之上的第一像素界定层、设置于所述第一像素界定层之上的第二正极层及设置于所述第二正极层之上的第二像素界定层,从而分别驱动所述第一正极层及所述第二正极层。
在本发明所述的像素单元中,还包括衬底基板、发光单元、电子传输层及负极层;
所述衬底基板、所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层、所述电子传输层及所述负极层依次层叠设置,所述发光单元分别与所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层及所述电子传输层连接。
在本发明所述的像素单元中,所述发光单元包括空穴注入层、空穴传输层及发光层。
在本发明所述的像素单元中,还包括驱动电路;
所述驱动电路包括分别连接于扫描线及数据线的主像素单元及副像素单元,所述主像素单元连接于所述第一正极层以提供第一驱动电压,所述副像素单元连接于所述第二正极层以提供第二驱动电压,且所述第一驱动电压与所述第二驱动电压的电压数值不同。
在本发明所述的像素单元中,所述主像素单元包括第一晶体管、第二晶体管、第三晶体管及第一电容;
所述第一晶体管的第一端连接于所述数据线,所述第一晶体管的第二端连接于所述扫描线,所述第一晶体管的第三端连接于第二晶体管的第一端及所述第一电容的一端,所述第二晶体管的第二端连接于所述第一电容的另一端、所述第一正极层及所述第三晶体管的第一端,所述第三晶体管的第二端连接于所述扫描线,所述第三晶体管的第三端连接于所述电源线。
在本发明所述的像素单元中,所述副像素单元包括第四晶体管、第五晶体管及第二电容;
所述第四晶体管的第一端连接于所述数据线,所述第四晶体管的第二端连接于所述扫描线,所述第四晶体管的第三端连接于所述第五晶体管的第一端及所述第二电容的一端,所述第五晶体管的第二端连接于所述第二电容的另一端及所述第二正极层。
一方面,提供一种像素电路的制作方法,包括:
设置第一正极层;
将第一像素界定层设置于所述第一正极层之上;
将第二正极层设置于所述第一像素界定层之上;
将第二像素界定层设置于所述第二正极层之上。
在本发明所述的制作方法中,还包括:
将电子传输层设置于第二像素界定层之上;
将发光单元分别与所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层及所述电子传输层连接。
在本发明所述的制作方法中,还包括:
将衬底基板设置于所述第一正极层之下。
一方面,提供一种显示装置,包括像素电路。
本发明具有以下有益效果:
通过在同一个子像素中采用两种阳极驱动电压,使两部分的发光材料分开驱动,中间区域亮度得到提高,使整个像素发光亮度均匀。
附图说明
下面将结合附图及实施例对本发明作进一步说明,附图中:
图1为现有技术的像素单元的结构示意图;
图2为本发明实施例提供的像素单元的结构示意图;
图3为本发明实施例提供的驱动电路的结构图。
具体实施方式
为了对本发明的技术特征、目的和效果有更加清楚的理解,现对照附图详细说明本发明的具体实施方式。
参见图2,图2为本发明实施例提供的像素单元的结构示意图,该像素单元包括第一正极层101、设置于所述第一正极层101之上的第一像素界定层102、设置于所述第一像素界定层102之上的第二正极层102及设置于所述第二正极层102之上的第二像素界定层104,从而分别驱动所述第一正极层101及所述第二正极层102。
此外,该像素单元还包括衬底基板105、发光单元106、电子传输层107及负极层108;所述衬底基板105、所述第一正极层101、所述第一像素界定层102、所述第二正极层102、所述第二像素界定层104、所述电子传输层107及所述负极层108依次层叠设置,所述发光单元106分别与所述第一正极层101、所述第一像素界定层102、所述第二正极层102、所述第二像素界定层104及所述电子传输层107连接。其中,所述发光单元106包括空穴注入层、空穴传输层及发光层。
参见图3,图3为本发明实施例提供的驱动电路的结构图,该像素单元还包括驱动电路;所述驱动电路包括分别连接于扫描线200及数据线100的主像素单元1及副像素单元2,即在现有的垂直放置的数据线100和水平放置的扫描线200之中,主像素单元及副像素单元同时连接扫描线200及数据线100。所述主像素单元1连接于所述第一正极层101以提供第一驱动电压,所述副像素单元2连接于所述第二正极层102以提供第二驱动电压。例如:同一个像素设置两种驱动电路,其中主像素单元1连接第一正极层101,提供100%驱动电压,副像素单元2连接第二正极层102提供80%驱动电压。
其中,主像素单元1采用3T1C架构,即三个晶体管和一个电容的架构,晶体管优选为TFT(Thin Film Transistor),所述主像素单元1还连接于电源线300。所述主像素单元1包括第一晶体管T1、第二晶体管T2、第三晶体管T3及第一电容C1;所述第一晶体管T1的第一端连接于所述数据线100,所述第一晶体管T1的第二端连接于所述扫描线200,所述第一晶体管T1的第三端连接于第二晶体管T2的第一端及所述第一电容C1的一端,所述第二晶体管T2的第二端连接于所述第一电容C1的另一端、所述第一正极层101及所述第三晶体管T3的第一端,所述第三晶体管T3的第二端连接于所述扫描线200,所述第三晶体管T3的第三端连接于所述电源线300。所述第二晶体管T2的第三端连接于第一电压端VDD1。
副像素单元2采用2T1C架构,所述副像素单元2包括第四晶体管T4、第五晶体管T5及第二电容C2;所述第四晶体管T4的第一端连接于所述数据线100,所述第四晶体管T4的第二端连接于所述扫描线200,所述第四晶体管T4的第三端连接于所述第五晶体管T5的第一端及所述第二电容C2的一端,所述第五晶体管T5的第二端连接于所述第二电容C2的另一端及所述第二正极层103。所述第五晶体管T5的第三端连接于第二电压端VDD2。
当扫描线200提供高压扫描信号时,数据电压同时供给两个像素电路相同的数据电压,但是由于主像素单元1采取3T1C结构,电源端可以供入参考电压给阳极点复位,像素的充电率相对于副像素单元2高,所以发光亮度校对较大。
本发明还提供一种像素电路的制作方法,包括步骤S1-S4:
S1、设置第一正极层101。
S2、将第一像素界定层102设置于所述第一正极层101之上。
S3、将第二正极层102设置于所述第一像素界定层102之上。
S4、将第二像素界定层104设置于所述第二正极层102之上。
优选的,该制作方法还包括步骤S5-S7:
S5、将电子传输层107设置于第二像素界定层104之上。
S6、将衬底基板105设置于所述第一正极层101之下。
S7、将发光单元106分别与所述第一正极层101、所述第一像素界定层102、所述第二正极层102、所述第二像素界定层104及所述电子传输层107连接。
本发明还提供一种显示装置,包括上述的像素电路。该显示装置通过在同一个子像素中采用两种阳极驱动电压,使两部分的发光材料分开驱动,中间区域亮度得到提高,使整个像素发光亮度均匀。
上面结合附图对本发明的实施例进行了描述,但是本发明并不局限于上述的具体实施方式,上述的具体实施方式仅仅是示意性的,而不是限制性的,本领域的普通技术人员在本发明的启示下,在不脱离本发明宗旨和权利要求所保护的范围情况下,还可做出很多形式,这些均属于本发明的保护之内。
Claims (10)
1.一种像素单元,其中,包括第一正极层、设置于所述第一正极层之上的第一像素界定层、设置于所述第一像素界定层之上的第二正极层及设置于所述第二正极层之上的第二像素界定层,从而分别驱动所述第一正极层及所述第二正极层。
2.根据权利要求1所述的像素单元,其中,还包括衬底基板、发光单元、电子传输层及负极层;
所述衬底基板、所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层、所述电子传输层及所述负极层依次层叠设置,所述发光单元分别与所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层及所述电子传输层连接。
3.根据权利要求2所述的像素单元,其中,所述发光单元包括空穴注入层、空穴传输层及发光层。
4.根据权利要求1所述的像素单元,其中,还包括驱动电路;
所述驱动电路包括分别连接于扫描线及数据线的主像素单元及副像素单元,所述主像素单元连接于所述第一正极层以提供第一驱动电压,所述副像素单元连接于所述第二正极层以提供第二驱动电压,且所述第一驱动电压与所述第二驱动电压的电压数值不同。
5.根据权利要求4所述的像素单元,其中,所述主像素单元包括第一晶体管、第二晶体管、第三晶体管及第一电容;
所述第一晶体管的第一端连接于所述数据线,所述第一晶体管的第二端连接于所述扫描线,所述第一晶体管的第三端连接于第二晶体管的第一端及所述第一电容的一端,所述第二晶体管的第二端连接于所述第一电容的另一端、所述第一正极层及所述第三晶体管的第一端,所述第三晶体管的第二端连接于所述扫描线,所述第三晶体管的第三端连接于所述电源线。
6.根据权利要求4所述的像素单元,其中,所述副像素单元包括第四晶体管、第五晶体管及第二电容;
所述第四晶体管的第一端连接于所述数据线,所述第四晶体管的第二端连接于所述扫描线,所述第四晶体管的第三端连接于所述第五晶体管的第一端及所述第二电容的一端,所述第五晶体管的第二端连接于所述第二电容的另一端及所述第二正极层。
7.一种像素电路的制作方法,其中,包括:
设置第一正极层;
将第一像素界定层设置于所述第一正极层之上;
将第二正极层设置于所述第一像素界定层之上;
将第二像素界定层设置于所述第二正极层之上。
8.根据权利要求7所述的制作方法,其中,还包括:
将电子传输层设置于第二像素界定层之上;
将发光单元分别与所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层及所述电子传输层连接。
9.根据权利要求7所述的制作方法,其中,还包括:
将衬底基板设置于所述第一正极层之下。
10.一种显示装置,其中,包括如权利要求1-6任一项所述的像素电路。
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