WO2021103194A1 - 一种像素单元、制作方法及显示装置 - Google Patents

一种像素单元、制作方法及显示装置 Download PDF

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Publication number
WO2021103194A1
WO2021103194A1 PCT/CN2019/125581 CN2019125581W WO2021103194A1 WO 2021103194 A1 WO2021103194 A1 WO 2021103194A1 CN 2019125581 W CN2019125581 W CN 2019125581W WO 2021103194 A1 WO2021103194 A1 WO 2021103194A1
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Prior art keywords
layer
transistor
positive electrode
electrode layer
pixel
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PCT/CN2019/125581
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English (en)
French (fr)
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蔡振飞
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深圳市华星光电半导体显示技术有限公司
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Priority to US16/626,389 priority Critical patent/US11362156B2/en
Publication of WO2021103194A1 publication Critical patent/WO2021103194A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/14—Carrier transporting layers
    • H10K50/16—Electron transporting layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80517—Multilayers, e.g. transparent multilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0804—Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements

Definitions

  • the present invention relates to the field of display technology, and more specifically, to a pixel unit, a manufacturing method and a display device.
  • OLED OrganicLight-Emitting Diode
  • the OLED pixel structure shown in Figure 1 will be unevenly distributed in the pixel defining layer after heating and drying, and the thickness around the pixel defining layer is larger than the middle thickness. , Resulting in uneven luminous brightness, high peripheral brightness, and low intermediate brightness.
  • the present invention provides a pixel unit, a manufacturing method and a display device, which solve the problem that the material height in the pixel defining layer of the prior art OLED pixel structure will be unevenly distributed after heating and drying, and the thickness around the pixel defining layer is larger than the middle thickness, resulting in The problem of uneven brightness, high peripheral brightness, and low intermediate brightness.
  • the present invention provides a pixel unit including a first positive electrode layer, a first pixel defining layer disposed on the first positive electrode layer, and a second positive electrode disposed on the first pixel defining layer Layer and a second pixel defining layer disposed on the second positive electrode layer, so as to drive the first positive electrode layer and the second positive electrode layer respectively.
  • the pixel unit of the present invention further includes a base substrate, a light-emitting unit, an electron transport layer and a negative electrode layer;
  • the base substrate, the first positive electrode layer, the first pixel defining layer, the second positive electrode layer, the second pixel defining layer, the electron transport layer and the negative electrode layer are stacked in sequence;
  • the light-emitting unit is respectively connected to the first anode layer, the first pixel defining layer, the second anode layer, the second pixel defining layer, and the electron transport layer.
  • the light-emitting unit includes a hole injection layer, a hole transport layer, and a light-emitting layer.
  • the pixel unit of the present invention further includes a driving circuit
  • the driving circuit includes a main pixel unit and a sub-pixel unit respectively connected to a scan line and a data line, the main pixel unit is connected to the first anode layer to provide a first driving voltage, and the sub-pixel unit is connected to the The second positive electrode layer provides a second driving voltage, and the first driving voltage and the second driving voltage have different voltage values.
  • the main pixel unit includes a first transistor, a second transistor, a third transistor, and a first capacitor;
  • the first end of the first transistor is connected to the data line
  • the second end of the first transistor is connected to the scan line
  • the third end of the first transistor is connected to the first end of the second transistor
  • one end of the first capacitor, the second end of the second transistor is connected to the other end of the first capacitor, the first anode layer and the first end of the third transistor, the third The second end of the transistor is connected to the scan line, and the third end of the third transistor is connected to the power line.
  • the sub-pixel unit includes a fourth transistor, a fifth transistor, and a second capacitor;
  • the first end of the fourth transistor is connected to the data line
  • the second end of the fourth transistor is connected to the scan line
  • the third end of the fourth transistor is connected to the first end of the fifth transistor.
  • One end and one end of the second capacitor, and the second end of the fifth transistor is connected to the other end of the second capacitor and the second positive electrode layer.
  • a method for manufacturing a pixel circuit which includes:
  • a second pixel defining layer is disposed on the second positive electrode layer.
  • the light-emitting unit is respectively connected with the first anode layer, the first pixel defining layer, the second anode layer, the second pixel defining layer, and the electron transport layer.
  • the base substrate is arranged under the first positive electrode layer.
  • a display device including a pixel circuit.
  • the two parts of the light-emitting materials are driven separately, the brightness of the middle area is improved, and the light-emitting brightness of the entire pixel is uniform.
  • FIG. 1 is a schematic diagram of the structure of a pixel unit in the prior art
  • FIG. 2 is a schematic diagram of the structure of a pixel unit provided by an embodiment of the present invention.
  • FIG. 3 is a structural diagram of a driving circuit provided by an embodiment of the present invention.
  • FIG. 2 is a schematic structural diagram of a pixel unit provided by an embodiment of the present invention.
  • the pixel unit includes a first anode layer 101, a first pixel defining layer 102 disposed on the first anode layer 101, and The second positive electrode layer 102 on the first pixel defining layer 102 and the second pixel defining layer 104 on the second positive electrode layer 102 respectively drive the first positive electrode layer 101 and the second positive electrode layer 101 Two positive electrode layer 102.
  • the pixel unit also includes a base substrate 105, a light-emitting unit 106, an electron transport layer 107, and a negative electrode layer 108; the base substrate 105, the first positive electrode layer 101, the first pixel defining layer 102, and the The second positive electrode layer 102, the second pixel defining layer 104, the electron transport layer 107, and the negative electrode layer 108 are stacked in sequence, and the light-emitting unit 106 is connected to the first positive electrode layer 101 and the first positive electrode layer 101, respectively.
  • a pixel defining layer 102, the second anode layer 102, the second pixel defining layer 104, and the electron transport layer 107 are connected.
  • the light-emitting unit 106 includes a hole injection layer, a hole transport layer, and a light-emitting layer.
  • FIG. 3 is a structural diagram of a driving circuit provided by an embodiment of the present invention.
  • the pixel unit further includes a driving circuit; the driving circuit includes a main pixel unit 1 and a sub-pixel connected to the scan line 200 and the data line 100, respectively.
  • Unit 2 that is, among the existing vertical data lines 100 and horizontal scan lines 200, the main pixel unit and the sub pixel unit are connected to the scan line 200 and the data line 100 at the same time.
  • the main pixel unit 1 is connected to the first anode layer 101 to provide a first driving voltage
  • the sub-pixel unit 2 is connected to the second anode layer 102 to provide a second driving voltage.
  • two driving circuits are provided for the same pixel, where the main pixel unit 1 is connected to the first anode layer 101 to provide 100% driving voltage, and the sub-pixel unit 2 is connected to the second anode layer 102 to provide 80% driving voltage.
  • the main pixel unit 1 adopts the 3T1C architecture, that is, the architecture of three transistors and one capacitor.
  • the transistors are preferably TFT (Thin Film Transistor), the main pixel unit 1 is also connected to a power line 300.
  • the main pixel unit 1 includes a first transistor T1, a second transistor T2, a third transistor T3, and a first capacitor C1; a first end of the first transistor T1 is connected to the data line 100, and the first transistor The second end of T1 is connected to the scan line 200, and the third end of the first transistor T1 is connected to the first end of the second transistor T2 and one end of the first capacitor C1.
  • the second end is connected to the other end of the first capacitor C1, the first positive electrode layer 101 and the first end of the third transistor T3, and the second end of the third transistor T3 is connected to the scan line 200.
  • the third terminal of the third transistor T3 is connected to the power line 300.
  • the third terminal of the second transistor T2 is connected to the first voltage terminal VDD1.
  • the sub-pixel unit 2 adopts a 2T1C architecture.
  • the sub-pixel unit 2 includes a fourth transistor T4, a fifth transistor T5, and a second capacitor C2; the first end of the fourth transistor T4 is connected to the data line 100, and the The second end of the fourth transistor T4 is connected to the scan line 200, and the third end of the fourth transistor T4 is connected to the first end of the fifth transistor T5 and one end of the second capacitor C2.
  • the second end of the fifth transistor T5 is connected to the other end of the second capacitor C2 and the second positive electrode layer 103.
  • the third terminal of the fifth transistor T5 is connected to the second voltage terminal VDD2.
  • the data voltage supplies the same data voltage to the two pixel circuits at the same time, but because the main pixel unit 1 adopts the 3T1C structure, the power supply terminal can supply a reference voltage to reset the anode point, and the charging rate of the pixel is relatively Since the sub-pixel unit 2 is high, the luminous brightness correction is relatively large.
  • the present invention also provides a method for manufacturing a pixel circuit, including steps S1-S4:
  • a first positive electrode layer 101 is provided.
  • the first pixel defining layer 102 is disposed on the first positive electrode layer 101.
  • the second pixel defining layer 104 is disposed on the second anode layer 102.
  • the manufacturing method further includes steps S5-S7:
  • the base substrate 105 is disposed under the first positive electrode layer 101.
  • the present invention also provides a display device including the above-mentioned pixel circuit.
  • the display device adopts two anode driving voltages in the same sub-pixel, so that the two parts of the light-emitting materials are driven separately, the brightness of the middle area is improved, and the light-emitting brightness of the entire pixel is uniform.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Geometry (AREA)
  • Optics & Photonics (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种像素单元、制作方法及显示装置，该像素单元包括第一正极层（101）、设置于第一正极层（101）之上的第一像素界定层（102）、设置于第一像素界定层（102）之上的第二正极层（103）及设置于第二正极层（103）之上的第二像素界定层（104），从而分别驱动第一正极层101）及第二正极层（103）。通过在同一个子像素中采用两种阳极驱动电压，使两部分的发光材料分开驱动，中间区域亮度得到提高，使整个像素发光亮度均匀。

Description

一种像素单元、制作方法及显示装置 技术领域
本发明涉及显示技术领域，更具体地说，涉及一种像素单元、制作方法及显示装置。
 背景技术
目前打印OLED（OrganicLight-Emitting Diode）发展逐渐成熟。
 技术问题
但是由于液态发光材料在升温干燥过程中，形貌会发生变化，如图1所示的OLED像素结构在升温干燥后像素界定层内材料高度会不均匀分布，像素界定层周围厚度较中间厚度大，造成发光亮度不均匀，周边亮度高，中间亮度低。
 技术解决方案
本发明提供了一种像素单元、制作方法及显示装置，解决了现有技术的OLED像素结构在升温干燥后像素界定层内材料高度会不均匀分布，像素界定层周围厚度较中间厚度大，造成发光亮度不均匀，周边亮度高，中间亮度低的问题。
一方面，本发明提供了一种像素单元，包括第一正极层、设置于所述第一正极层之上的第一像素界定层、设置于所述第一像素界定层之上的第二正极层及设置于所述第二正极层之上的第二像素界定层，从而分别驱动所述第一正极层及所述第二正极层。
在本发明所述的像素单元中，还包括衬底基板、发光单元、电子传输层及负极层；
所述衬底基板、所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层、所述电子传输层及所述负极层依次层叠设置，所述发光单元分别与所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层及所述电子传输层连接。
在本发明所述的像素单元中，所述发光单元包括空穴注入层、空穴传输层及发光层。
在本发明所述的像素单元中，还包括驱动电路；
所述驱动电路包括分别连接于扫描线及数据线的主像素单元及副像素单元，所述主像素单元连接于所述第一正极层以提供第一驱动电压，所述副像素单元连接于所述第二正极层以提供第二驱动电压，且所述第一驱动电压与所述第二驱动电压的电压数值不同。
在本发明所述的像素单元中，所述主像素单元包括第一晶体管、第二晶体管、第三晶体管及第一电容；
所述第一晶体管的第一端连接于所述数据线，所述第一晶体管的第二端连接于所述扫描线，所述第一晶体管的第三端连接于第二晶体管的第一端及所述第一电容的一端，所述第二晶体管的第二端连接于所述第一电容的另一端、所述第一正极层及所述第三晶体管的第一端，所述第三晶体管的第二端连接于所述扫描线，所述第三晶体管的第三端连接于所述电源线。
在本发明所述的像素单元中，所述副像素单元包括第四晶体管、第五晶体管及第二电容；
所述第四晶体管的第一端连接于所述数据线，所述第四晶体管的第二端连接于所述扫描线，所述第四晶体管的第三端连接于所述第五晶体管的第一端及所述第二电容的一端，所述第五晶体管的第二端连接于所述第二电容的另一端及所述第二正极层。
一方面，提供一种像素电路的制作方法，包括：
设置第一正极层；
将第一像素界定层设置于所述第一正极层之上；
将第二正极层设置于所述第一像素界定层之上；
将第二像素界定层设置于所述第二正极层之上。
在本发明所述的制作方法中，还包括：
将电子传输层设置于第二像素界定层之上；
将发光单元分别与所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层及所述电子传输层连接。
在本发明所述的制作方法中，还包括：
将衬底基板设置于所述第一正极层之下。
一方面，提供一种显示装置，包括像素电路。
 有益效果
本发明具有以下有益效果：
通过在同一个子像素中采用两种阳极驱动电压，使两部分的发光材料分开驱动，中间区域亮度得到提高，使整个像素发光亮度均匀。
 附图说明
下面将结合附图及实施例对本发明作进一步说明，附图中：
图1为现有技术的像素单元的结构示意图；
图2为本发明实施例提供的像素单元的结构示意图；
图3为本发明实施例提供的驱动电路的结构图。
 本发明的实施方式
为了对本发明的技术特征、目的和效果有更加清楚的理解，现对照附图详细说明本发明的具体实施方式。
参见图2，图2为本发明实施例提供的像素单元的结构示意图，该像素单元包括第一正极层101、设置于所述第一正极层101之上的第一像素界定层102、设置于所述第一像素界定层102之上的第二正极层102及设置于所述第二正极层102之上的第二像素界定层104，从而分别驱动所述第一正极层101及所述第二正极层102。
此外，该像素单元还包括衬底基板105、发光单元106、电子传输层107及负极层108；所述衬底基板105、所述第一正极层101、所述第一像素界定层102、所述第二正极层102、所述第二像素界定层104、所述电子传输层107及所述负极层108依次层叠设置，所述发光单元106分别与所述第一正极层101、所述第一像素界定层102、所述第二正极层102、所述第二像素界定层104及所述电子传输层107连接。其中，所述发光单元106包括空穴注入层、空穴传输层及发光层。
参见图3，图3为本发明实施例提供的驱动电路的结构图，该像素单元还包括驱动电路；所述驱动电路包括分别连接于扫描线200及数据线100的主像素单元1及副像素单元2，即在现有的垂直放置的数据线100和水平放置的扫描线200之中，主像素单元及副像素单元同时连接扫描线200及数据线100。所述主像素单元1连接于所述第一正极层101以提供第一驱动电压，所述副像素单元2连接于所述第二正极层102以提供第二驱动电压。例如：同一个像素设置两种驱动电路，其中主像素单元1连接第一正极层101，提供100%驱动电压，副像素单元2连接第二正极层102提供80%驱动电压。
其中，主像素单元1采用3T1C架构，即三个晶体管和一个电容的架构，晶体管优选为TFT（Thin Film Transistor），所述主像素单元1还连接于电源线300。所述主像素单元1包括第一晶体管T1、第二晶体管T2、第三晶体管T3及第一电容C1；所述第一晶体管T1的第一端连接于所述数据线100，所述第一晶体管T1的第二端连接于所述扫描线200，所述第一晶体管T1的第三端连接于第二晶体管T2的第一端及所述第一电容C1的一端，所述第二晶体管T2的第二端连接于所述第一电容C1的另一端、所述第一正极层101及所述第三晶体管T3的第一端，所述第三晶体管T3的第二端连接于所述扫描线200，所述第三晶体管T3的第三端连接于所述电源线300。所述第二晶体管T2的第三端连接于第一电压端VDD1。
副像素单元2采用2T1C架构，所述副像素单元2包括第四晶体管T4、第五晶体管T5及第二电容C2；所述第四晶体管T4的第一端连接于所述数据线100，所述第四晶体管T4的第二端连接于所述扫描线200，所述第四晶体管T4的第三端连接于所述第五晶体管T5的第一端及所述第二电容C2的一端，所述第五晶体管T5的第二端连接于所述第二电容C2的另一端及所述第二正极层103。所述第五晶体管T5的第三端连接于第二电压端VDD2。
当扫描线200提供高压扫描信号时，数据电压同时供给两个像素电路相同的数据电压，但是由于主像素单元1采取3T1C结构，电源端可以供入参考电压给阳极点复位，像素的充电率相对于副像素单元2高，所以发光亮度校对较大。
本发明还提供一种像素电路的制作方法，包括步骤S1-S4：
S1、设置第一正极层101。
S2、将第一像素界定层102设置于所述第一正极层101之上。
S3、将第二正极层102设置于所述第一像素界定层102之上。
S4、将第二像素界定层104设置于所述第二正极层102之上。
优选的，该制作方法还包括步骤S5-S7：
S5、将电子传输层107设置于第二像素界定层104之上。
S6、将衬底基板105设置于所述第一正极层101之下。
S7、将发光单元106分别与所述第一正极层101、所述第一像素界定层102、所述第二正极层102、所述第二像素界定层104及所述电子传输层107连接。
本发明还提供一种显示装置，包括上述的像素电路。该显示装置通过在同一个子像素中采用两种阳极驱动电压，使两部分的发光材料分开驱动，中间区域亮度得到提高，使整个像素发光亮度均匀。
上面结合附图对本发明的实施例进行了描述，但是本发明并不局限于上述的具体实施方式，上述的具体实施方式仅仅是示意性的，而不是限制性的，本领域的普通技术人员在本发明的启示下，在不脱离本发明宗旨和权利要求所保护的范围情况下，还可做出很多形式，这些均属于本发明的保护之内。

Claims (15)

  1. 一种像素单元，其中，包括第一正极层、设置于所述第一正极层之上的第一像素界定层、设置于所述第一像素界定层之上的第二正极层及设置于所述第二正极层之上的第二像素界定层，从而分别驱动所述第一正极层及所述第二正极层。
  2. 根据权利要求1所述的像素单元，其中，还包括衬底基板、发光单元、电子传输层及负极层；
    所述衬底基板、所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层、所述电子传输层及所述负极层依次层叠设置，所述发光单元分别与所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层及所述电子传输层连接。
  3. 根据权利要求2所述的像素单元，其中，所述发光单元包括空穴注入层、空穴传输层及发光层。
  4. 根据权利要求1所述的像素单元，其中，还包括驱动电路；
    所述驱动电路包括分别连接于扫描线及数据线的主像素单元及副像素单元，所述主像素单元连接于所述第一正极层以提供第一驱动电压，所述副像素单元连接于所述第二正极层以提供第二驱动电压，且所述第一驱动电压与所述第二驱动电压的电压数值不同。
  5. 根据权利要求4所述的像素单元，其中，所述主像素单元包括第一晶体管、第二晶体管、第三晶体管及第一电容；
    所述第一晶体管的第一端连接于所述数据线，所述第一晶体管的第二端连接于所述扫描线，所述第一晶体管的第三端连接于第二晶体管的第一端及所述第一电容的一端，所述第二晶体管的第二端连接于所述第一电容的另一端、所述第一正极层及所述第三晶体管的第一端，所述第三晶体管的第二端连接于所述扫描线，所述第三晶体管的第三端连接于所述电源线。
  6. 根据权利要求4所述的像素单元，其中，所述副像素单元包括第四晶体管、第五晶体管及第二电容；
    所述第四晶体管的第一端连接于所述数据线，所述第四晶体管的第二端连接于所述扫描线，所述第四晶体管的第三端连接于所述第五晶体管的第一端及所述第二电容的一端，所述第五晶体管的第二端连接于所述第二电容的另一端及所述第二正极层。
  7. 一种像素电路的制作方法，其中，包括：
    设置第一正极层；
    将第一像素界定层设置于所述第一正极层之上；
    将第二正极层设置于所述第一像素界定层之上；
    将第二像素界定层设置于所述第二正极层之上。
  8. 根据权利要求7所述的制作方法，其中，还包括：
    将电子传输层设置于第二像素界定层之上；
    将发光单元分别与所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层及所述电子传输层连接。
  9. 根据权利要求7所述的制作方法，其中，还包括：
    将衬底基板设置于所述第一正极层之下。
  10. 一种显示装置，其中，包括像素电路；所述像素电路包括第一正极层、设置于所述第一正极层之上的第一像素界定层、设置于所述第一像素界定层之上的第二正极层及设置于所述第二正极层之上的第二像素界定层，从而分别驱动所述第一正极层及所述第二正极层。
  11. 根据权利要求10所述的显示装置，其中，还包括衬底基板、发光单元、电子传输层及负极层；
    所述衬底基板、所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层、所述电子传输层及所述负极层依次层叠设置，所述发光单元分别与所述第一正极层、所述第一像素界定层、所述第二正极层、所述第二像素界定层及所述电子传输层连接。
  12. 根据权利要求11所述的显示装置，其中，所述发光单元包括空穴注入层、空穴传输层及发光层。
  13. 根据权利要求10所述的显示装置，其中，还包括驱动电路；
    所述驱动电路包括分别连接于扫描线及数据线的主像素单元及副像素单元，所述主像素单元连接于所述第一正极层以提供第一驱动电压，所述副像素单元连接于所述第二正极层以提供第二驱动电压，且所述第一驱动电压与所述第二驱动电压的电压数值不同。
  14. 根据权利要求13所述的显示装置，其中，所述主像素单元包括第一晶体管、第二晶体管、第三晶体管及第一电容；
    所述第一晶体管的第一端连接于所述数据线，所述第一晶体管的第二端连接于所述扫描线，所述第一晶体管的第三端连接于第二晶体管的第一端及所述第一电容的一端，所述第二晶体管的第二端连接于所述第一电容的另一端、所述第一正极层及所述第三晶体管的第一端，所述第三晶体管的第二端连接于所述扫描线，所述第三晶体管的第三端连接于所述电源线。
  15. 根据权利要求13所述的显示装置，其中，所述副像素单元包括第四晶体管、第五晶体管及第二电容；
    所述第四晶体管的第一端连接于所述数据线，所述第四晶体管的第二端连接于所述扫描线，所述第四晶体管的第三端连接于所述第五晶体管的第一端及所述第二电容的一端，所述第五晶体管的第二端连接于所述第二电容的另一端及所述第二正极层。
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1665353A (zh) * 2005-04-15 2005-09-07 友达光电股份有限公司 有机发光显示器
US20050218792A1 (en) * 2004-03-31 2005-10-06 Samsung Electronics Co., Ltd. Display device and method of manufacturing the same
CN107731879A (zh) * 2017-10-31 2018-02-23 京东方科技集团股份有限公司 一种阵列基板、制备方法、显示面板及显示装置
CN108400154A (zh) * 2018-04-11 2018-08-14 武汉华星光电半导体显示技术有限公司 Oled面板
CN207781652U (zh) * 2017-11-20 2018-08-28 京东方科技集团股份有限公司 双面显示面板和显示装置
CN109887962A (zh) * 2019-02-18 2019-06-14 京东方科技集团股份有限公司 有机发光显示基板及其制作方法、显示装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101707028B (zh) * 2009-11-13 2012-02-01 四川虹视显示技术有限公司 一种双面显示器
JP2011221070A (ja) * 2010-04-05 2011-11-04 Seiko Epson Corp 発光装置および電子機器、発光装置の駆動方法
JP2015115469A (ja) * 2013-12-12 2015-06-22 ソニー株式会社 薄膜トランジスタ、表示装置、電子機器、および薄膜トランジスタの製造方法
CN104318902B (zh) * 2014-11-19 2017-05-31 上海天马有机发光显示技术有限公司 有机发光显示器的像素电路及驱动方法、有机发光显示器
KR102465826B1 (ko) * 2015-10-29 2022-11-09 엘지디스플레이 주식회사 유기 발광 표시 장치 및 그 제조 방법
CN106252383B (zh) * 2016-09-30 2019-01-01 京东方科技集团股份有限公司 双面显示面板及其制作方法、显示装置
KR20180098447A (ko) * 2017-02-24 2018-09-04 삼성디스플레이 주식회사 유기 발광 표시 장치
US10608062B2 (en) * 2017-03-16 2020-03-31 Sharp Kabushiki Kaisha Display device
WO2018179134A1 (ja) * 2017-03-29 2018-10-04 シャープ株式会社 表示装置
KR102436799B1 (ko) * 2017-08-25 2022-08-25 엘지디스플레이 주식회사 유기발광 다이오드 표시장치 및 그 제조 방법
CN207303144U (zh) * 2017-09-13 2018-05-01 京东方科技集团股份有限公司 一种woled器件及显示装置
CN108172600B (zh) * 2017-12-29 2020-01-17 深圳市华星光电半导体显示技术有限公司 用于woled显示器的彩膜基板及woled显示器
CN108565350B (zh) * 2018-04-13 2019-06-28 京东方科技集团股份有限公司 Oled器件及其制造方法和显示面板
CN109507817A (zh) * 2018-12-25 2019-03-22 惠科股份有限公司 显示装置、阵列基板及其工艺方法
CN109742107B (zh) * 2019-01-03 2021-12-28 京东方科技集团股份有限公司 Oled器件及其制备方法和显示面板

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050218792A1 (en) * 2004-03-31 2005-10-06 Samsung Electronics Co., Ltd. Display device and method of manufacturing the same
CN1665353A (zh) * 2005-04-15 2005-09-07 友达光电股份有限公司 有机发光显示器
CN107731879A (zh) * 2017-10-31 2018-02-23 京东方科技集团股份有限公司 一种阵列基板、制备方法、显示面板及显示装置
CN207781652U (zh) * 2017-11-20 2018-08-28 京东方科技集团股份有限公司 双面显示面板和显示装置
CN108400154A (zh) * 2018-04-11 2018-08-14 武汉华星光电半导体显示技术有限公司 Oled面板
CN109887962A (zh) * 2019-02-18 2019-06-14 京东方科技集团股份有限公司 有机发光显示基板及其制作方法、显示装置

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