CN103199072A - 镀金铜钯合金单晶键合丝及其制造方法 - Google Patents

镀金铜钯合金单晶键合丝及其制造方法 Download PDF

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CN103199072A
CN103199072A CN2013100814306A CN201310081430A CN103199072A CN 103199072 A CN103199072 A CN 103199072A CN 2013100814306 A CN2013100814306 A CN 2013100814306A CN 201310081430 A CN201310081430 A CN 201310081430A CN 103199072 A CN103199072 A CN 103199072A
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copper
gold
bonding wire
purity
palladium
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徐云管
彭庶瑶
梁建华
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JIANGXI LAN WEI ELECTRONIC TECHNOLOGY Co Ltd
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Abstract

本发明公开了一种镀金铜钯合金单晶键合丝及其制造方法，镀金铜钯合金单晶键合丝的基体材料由下列重量百分比的原材料组成：金（Au）：4%—8%、钯（Pa）：0.03%—0.08%、钙（Ca）：0.0001%—0.0003%、混合型稀土（Re）：0.0002%—0.0008%，其余为铜。其制造方法包括：提取纯度大于99.9995%的高纯铜，制备成铜合金铸锭，再制备成铜钯合金铸态单晶母线，经粗拔和热处理后，在其表面镀金，再经精拔、热处理、表面清洗、分卷定尺。本产品可以有效提升键合丝的抗氧化性能，使其抗氧化性与键合金丝相当，大大延长键合丝产品拆封后的保质期；内部加入钯、钙、稀土等元素使得该产品比其它方式生产的同类型产品机械强度更高，有利于进一步缩小键合丝的线径、缩短焊接间距，更加适用于高密度、多引脚集成电路封装。

Description

镀金铜钯合金单晶键合丝及其制造方法
技术领域
 
本发明涉及微电子后道封装工序用金属键合丝及其制造方法，尤其涉及一种镀金铜钯合金单晶键合丝及其制造方法。
背景技术
  
微电子器件芯片的键合工序，是指在一定温度下采用超声波加压的方法将键合丝两端分别焊接在芯片盘和引线框架引脚上，实现芯片内部电路与外部电路的连接。早期的键合丝多由纯金制成，直至现今大多厂家用的键合丝也是纯金制成。随着黄金贵重金属资源的日益稀缺，价格持续攀升，微电子封装成本大幅上升，给生产厂家、用户带来难以承受的成本压力。因此，业界正在积极寻求、研发成本相对低廉、性能稳定可靠、加工方便可靠的新型键合引线材料。
目前用于替代黄金键合丝的研究应用大多集中于铜基键合丝，但这类键合丝也有它的不足之处：①铜丝在拉制过程中因加工硬化，使得难以拉制与黄金键合丝一样细的微细线径；②由于铜丝过硬，会导致第一焊点容易逃丝，使得键合操作频繁中断，给下道工序的集成电路封装造成较大的困难；③由于铜丝具有易氧化的特性，在保存及焊接过程中容易产生氧化，打开包装后必须尽快用完，而且使用时必须加氮氢混合气体加以保护，使得操作危险性增加。
由本公司研发的铜钯合金单晶键合丝（专利号：ZL201110156014.9）其成本要比键合金丝便宜得多，且钯在高温、高湿或硫化物含量高的空气中性能稳定，能耐酸的侵蚀，并具有良好 的延展性和可塑性，但又比金硬，能承受弯曲和摩擦，可长期保持良好的外观和光泽。
发明内容
本发明的目的在于提供一种镀金铜钯合金单晶键合丝及其制造方法。本发明镀金铜钯合金单晶键合丝克服了铜基键合丝的不足，既具备了铜钯合金单晶键合丝的优点，又集中了黄金键合丝的优点，采用的镀金工艺可大大降低材料成本，是一种比较经济实用的新型键合丝。
本发明是这样实现的，其方法为：
①提取高纯铜：将硝酸铜溶液按1：4比例加入高纯水进行稀释，配制成电解液；以国家标准1号纯铜作为阳极浸入电解液中，并确保有95%体积比的纯铜浸入电解液中；以高纯铜箔作为阴极浸入电解液中，同样确保有95%体积比的高纯铜箔浸入电解液中；在阳极、阴极之间输入（7—9）V、（2.5—3.5）A的直流电，以补充新鲜电解液方式维持电解液温度不超过60℃；待阴极积聚一定重量的纯度大于99.9995%的高纯铜时，及时更换高纯铜箔，再以清洗、烘干备用。
②制备成铜合金铸锭：提取纯度大于99.9995%的高纯铜，然后加入钯、钙、稀土，含量按照重量百分比分别为Pd0.03%—0.08%、Ca0.0001%—0.0003%、Re0.0002%—0.0008%、其余为铜。钯的纯度大于99.999%，钙的纯度99.0%—99.5%，Re为混合型稀土。这些金属经机械混合后放入高纯石墨坩埚中，在惰性气体保护条件下使用感应电炉熔化，为保证化学成份的稳定性和一致性，制备成铜合金铸锭。
③连铸成铸态单晶母线：将制备好的铜合金铸锭加入有氮气保护的水平连铸金属单晶连铸室，应用中频感应加热至（1150—1220）℃，待完全熔化、精炼和除气后，将熔液注入连铸室中间的储液池保温，在维持（2—5）L/min净化氮气流量的连铸室中，完成对铜合金熔液的水平单晶连铸，得到ф3mm、纵向和横向晶粒数均为1个的铜钯合金铸态单晶母线。
④粗拔：采用常规拉丝设备和工艺、工装，将ф3mm的铜钯合金铸态单晶母线经多道次过模拉拔工序，拉拔成ф0.20mm左右的铜钯合金单晶丝。
⑤热处理：将ф0.20mm左右的铜钯合金单晶丝置于退火炉中，在（420—460）℃温度下保温25min,保温期间通以氮气保护气体，然后随炉冷却。
⑥表面镀金：应用常规电镀设备和工艺，对退火后的ф0.20mm左右的铜钯合金单晶丝电镀纯金防氧化保护层，电镀用金的纯度要求大于99.99%；电流密度（4—4.5）A/d㎡，铜钯合金单晶丝的收线速度为（4—5）m/min,镀层厚度控制在10μm—20μm之间；经镀金后的镀金铜钯合金单晶键合丝，其金的质量（重量）百分比在4%—8%之间。
⑦精拔：将表面已镀金的镀金铜钯合金单晶键合丝经多道次过模拉拔工序，拉拔成不同规格 的（0.013mm—0.050mm）成品键合丝。
⑧热处理：将 镀金铜钯合金单晶键合丝置于退火炉中，在（400—420）℃温度下保温25min,保温期间通以氮气保护气体，然后随炉冷却。
⑨表面清洗：将镀金铜钯合金单晶键合丝先用酸液清洗、然后经超声波清洗，再由高纯水清洗、烘干。
⑩分卷：将成品镀金铜钯合金单晶键合丝进行复绕、分卷、包装。
备注：（参考值）①ф0.20mm的合金丝电镀层厚度为2μm时，Au的重量百分比含量为8.25%。
     ②ф0.20mm的合金丝拉拔至ф0.018mm时，镀层厚度为0.057μm。
     ③ф0.20mm的合金丝拉拔至ф0.050mm时，镀层厚度为0.159μm。
 
本发明的技术效果是：可以有效提升键合丝的抗氧化性能，使其抗氧化性与键合金丝相当，大大延长键合丝产品拆封后的保质期；内部加入钯、钙、稀土等元素使得该产品比其它方式生产的同类型产品机械强度更高，有利于进一步缩小键合丝的线径、缩短焊接间距，更加适用于高密度、多引脚集成电路封装。
具体实施方式
实施例1
本发明是这样实现的，一种镀金铜钯合金单晶键合丝，该键合丝的基体材料由下列重量百分比的原材料组成：金（Au）4%，钯（Pa）0.03%，钙（Ca）0.0001%，混合型稀土（Re）0.0002%，其余为铜，之和等于100%。要求金的纯度大于99.99%、铜的纯度大于99.9995%、钯的纯度大于99.999%、钙的纯度为99.0%—99.5%，Re为混合型稀土。
镀金铜钯合金单晶键合丝的制造方法，方法如下：
①提取高纯铜：以国家标准1号纯铜为原料，提取纯度大于99.9995%的高纯铜，经清洗、烘干备用。
②制备成铜合金铸锭：按实施例1前述相关规定要求，在高纯铜内分别加入高纯钯、钙、稀土，这些金属经机械混合后放入高纯石墨坩埚中，在惰性气体保护条件下使用感应电炉熔化，制备成铜金合铸锭。
③连铸成铸态单晶母线：将制备好的铜合金铸锭加入有氮气保护的水平连铸金属单晶连铸室，应用中频感应加热、熔化、精炼和除气后，完成对铜合金熔液的水平单晶连铸，得到ф3mm、纵向和横向晶粒数均为1个的铜钯合金铸态单晶母线。
 
④粗拔：将ф3mm的铜钯合金铸态单晶母线拉拔成直径为0.20mm的铜钯合金单晶丝。
⑤热处理：将直径为0.20mm的铜钯合金单晶丝退火。
⑥表面镀金：对铜钯合金单晶丝电镀纯金保护层，电镀用金的纯度要求大于99.99%，表面镀金层控制在1μm—2μm的厚度。
⑦精拔：将前述镀有纯金保护层的0.20mm的镀金铜钯合金单晶键合丝，精密拉拔成直径分别为ф13μm—50μm的成品键合丝。
⑧热处理：将镀金铜钯合金单晶键合丝进行退火处理。
⑨表面清洗：先用酸液清洗，然后经超声波清洗，再由高纯水清洗、烘干。
⑩分卷：将成品镀金铜钯合金单晶键合丝进行复绕、分卷、包装。
实施例2
本发明是这样实现的，一种镀金铜钯合金单晶键合丝，该键合丝的基体材料由下列重量百分比的原材料组成：金（Au）8%，钯（Pa）0.08%，钙（Ca）0.0003%，混合型稀土（Re）0.0008%，其余为铜，之和等于100%。要求金的纯度大于99.99%、铜的纯度大于99.9995%、钯的纯度大于99.999%、钙的纯度为99.0%—99.5%，Re为混合型稀土。
镀金铜钯合金单晶键合丝的制造方法，方法如下：
①提取高纯铜：以国家标准1号纯铜为原料，提取纯度大于99.9995%的高纯铜，经清洗、烘干备用。
②制备成铜合金铸锭：按实施例2前述相关规定要求，在高纯铜内分别加入高纯钯、钙、稀土，这些金属经机械混合后放入高纯石墨坩埚中，在惰性气体保护条件下使用感应电炉熔化，制备成铜金合铸锭。
③连铸成铸态单晶母线：将制备好的铜合金铸锭加入有氮气保护的水平连铸金属单晶连铸室，应用中频感应加热、熔化、精炼和除气后，完成对铜合金熔液的水平单晶连铸，得到ф3mm、纵向和横向晶粒数均为1个的铜钯合金铸态单晶母线。
 
④粗拔：将ф3mm的铜钯合金铸态单晶母线拉拔成直径为0.20mm的铜钯合金单晶丝。
⑤热处理：将直径为0.20mm的铜钯合金单晶丝退火。
⑥表面镀金：对铜钯合金单晶丝电镀纯金保护层，电镀用金的纯度要求大于99.99%，表面镀金层控制在1μm—2μm的厚度。
 
⑦精拔：将前述镀有纯金保护层的0.20mm的镀金铜钯合金单晶键合丝，精密拉拔成直径分别为ф13μm—50μm的成品键合丝。
⑧热处理：将镀金铜钯合金单晶键合丝进行退火处理。
⑨表面清洗：先用酸液清洗，然后经超声波清洗，再由高纯水清洗、烘干。
⑩分卷：将成品镀金铜钯合金单晶键合丝进行复绕、分卷、包装。
 
实施例3
本发明是这样实现的，一种镀金铜钯合金单晶键合丝，该键合丝的基体材料由下列重量百分比的原材料组成：金（Au）5%，钯（Pa）0.06%，钙（Ca）0.0002%，混合型稀土（Re）0.0005%，其余为铜，之和等于100%。要求金的纯度大于99.99%、铜的纯度大于99.9995%、钯的纯度大于99.999%、钙的纯度为99.0%—99.5%，Re为混合型稀土。
镀金铜钯合金单晶键合丝的制造方法，方法如下：
①提取高纯铜：以国家标准1号纯铜为原料，提取纯度大于99.9995%的高纯铜，经清洗、烘干备用。
②制备成铜合金铸锭：按实施例3前述相关规定要求，在高纯铜内分别加入高纯钯、钙、稀土，这些金属经机械混合后放入高纯石墨坩埚中，在惰性气体保护条件下使用感应电炉熔化，制备成铜金合铸锭。
③连铸成铸态单晶母线：将制备好的铜合金铸锭加入有氮气保护的水平连铸金属单晶连铸室，应用中频感应加热、熔化、精炼和除气后，完成对铜合金熔液的水平单晶连铸，得到ф3mm、纵向和横向晶粒数均为1个的铜钯合金铸态单晶母线。
④粗拔：将ф3mm的铜钯合金铸态单晶母线拉拔成直径为0.20mm的铜钯合金单晶丝。
⑤热处理：将直径为0.20mm的铜钯合金单晶丝退火。
⑥表面镀金：对铜钯合金单晶丝电镀纯金保护层，电镀用金的纯度要求大于99.99%，表面镀金层控制在1μm—2μm的厚度。
⑦精拔：将前述镀有纯金保护层的0.20mm的镀金铜钯合金单晶键合丝，精密拉拔成直径分别为ф13μm—50μm的成品键合丝。
⑧热处理：将镀金铜钯合金单晶键合丝进行退火处理。
⑨表面清洗：先用酸液清洗，然后经超声波清洗，再由高纯水清洗、烘干。
⑩分卷：将成品镀金铜钯合金单晶键合丝进行复绕、分卷、包装。

Claims (2)

1.一种镀金铜钯合金单晶键合丝，其特征是该键合丝的基体材料由下列重量百分比的原材料组成：金（Au）4%—8%，钯（Pa）0.03%—0.08%，钙（Ca）0.0001%—0.0003%，混合型稀土（Re）0.0002%—0.0008%，其余为铜，之和等于100%，要求金的纯度大于99.99%、铜的纯度大于99.9995%、钯的纯度大于99.999%、钙的纯度为99.0%—99.5%，Re为混合型稀土。
2.一种权利要求1所述的镀金铜钯合金单晶键合丝的制造方法，其特征是制作的工艺步骤和方法如下：
①提取高纯铜：以国家标准1号纯铜为原料，提取纯度大于99.9995%的高纯铜，经清洗、烘干备用；
②制备成铜合金铸锭：在高纯铜内分别加入高纯钯、钙、稀土，含量按照重量百分比分别为：钯占0.03%-0.08%、钙占0.0001%-0.0003%、稀土占0.0002%-0.0008%，其余为铜，之和等于100%；要求铜的纯度大于99.9995%、钯的纯度大于99.999%、钙的纯度99.0%-99.5%，Re为混合型稀土；这些金属经机械混合后放入高纯石墨坩埚中，在惰性气体保护条件下使用感应电炉熔化，制备成铜金合铸锭；
③制备成铸态单晶母线： 将制备好的铜合金铸锭加入有氮气保护的水平连铸金属单晶连铸室，应用中频感应加热、熔化、精炼和除气后，将熔液注入储液池保温，完成对铜合金熔液的水平单晶连铸，得到ф3mm、纵向和横向晶粒数均为1个的铜钯合金铸态单晶母线；
④粗拔：将ф3mm的铜钯合金铸态单晶母线拉拔成直径为0.20mm的铜钯合金单晶丝；
⑤热处理：将直径为0.20mm的铜钯合金单晶丝退火；
⑥表面镀金：对铜钯合金单晶丝电镀纯金保护层，电镀用金的纯度要求大于99.99%，表面镀金层控制在1μm—2μm的厚度；
⑦精拔：将前述镀有纯金保护层的0.20mm的镀金铜钯合金单晶键合丝，精密拉拔成直径分别为ф13μm—50μm的成品键合丝；
⑧热处理：将镀金铜钯合金单晶键合丝进行退火处理；
⑨表面清洗：先用酸液清洗，然后经超声波清洗，再由高纯水清洗、烘干；
⑩分卷：将成品镀金铜钯合金单晶键合丝进行复绕、分卷、包装。
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CN104377185A (zh) * 2014-01-17 2015-02-25 江西蓝微电子科技有限公司 镀金银钯合金单晶键合丝及其制造方法
CN104353669A (zh) * 2014-09-12 2015-02-18 北京科技大学 一种高性能金包铜键合微丝的制备方法
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CN117230415A (zh) * 2023-01-17 2023-12-15 合肥中晶新材料有限公司 一种半导体封装用键合铜钯合金丝及其制作方法和应用
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