CN101894829A - 堆叠式封装结构 - Google Patents
堆叠式封装结构 Download PDFInfo
- Publication number
- CN101894829A CN101894829A CN2009101074891A CN200910107489A CN101894829A CN 101894829 A CN101894829 A CN 101894829A CN 2009101074891 A CN2009101074891 A CN 2009101074891A CN 200910107489 A CN200910107489 A CN 200910107489A CN 101894829 A CN101894829 A CN 101894829A
- Authority
- CN
- China
- Prior art keywords
- weld pad
- substrate
- chip
- packaging body
- base plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Stackable Containers (AREA)
- Wire Bonding (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
Claims (4)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009101074891A CN101894829B (zh) | 2009-05-19 | 2009-05-19 | 堆叠式封装结构 |
US12/693,502 US20100295163A1 (en) | 2009-05-19 | 2010-01-26 | Stacked semiconductor package assembly |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009101074891A CN101894829B (zh) | 2009-05-19 | 2009-05-19 | 堆叠式封装结构 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101894829A true CN101894829A (zh) | 2010-11-24 |
CN101894829B CN101894829B (zh) | 2012-06-27 |
Family
ID=43103973
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009101074891A Active CN101894829B (zh) | 2009-05-19 | 2009-05-19 | 堆叠式封装结构 |
Country Status (2)
Country | Link |
---|---|
US (1) | US20100295163A1 (zh) |
CN (1) | CN101894829B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103369873A (zh) * | 2012-04-06 | 2013-10-23 | 南亚科技股份有限公司 | 封装结构与重布层基板以及其形成方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5585675A (en) * | 1994-05-11 | 1996-12-17 | Harris Corporation | Semiconductor die packaging tub having angularly offset pad-to-pad via structure configured to allow three-dimensional stacking and electrical interconnections among multiple identical tubs |
KR100206893B1 (ko) * | 1996-03-11 | 1999-07-01 | 구본준 | 반도체 패키지 및 그 제조방법 |
JP2870530B1 (ja) * | 1997-10-30 | 1999-03-17 | 日本電気株式会社 | スタックモジュール用インターポーザとスタックモジュール |
US7180165B2 (en) * | 2003-09-05 | 2007-02-20 | Sanmina, Sci Corporation | Stackable electronic assembly |
US7187068B2 (en) * | 2004-08-11 | 2007-03-06 | Intel Corporation | Methods and apparatuses for providing stacked-die devices |
KR101336569B1 (ko) * | 2007-05-22 | 2013-12-03 | 삼성전자주식회사 | 증가된 결합 신뢰성을 갖는 반도체 패키지 및 그 제조 방법 |
-
2009
- 2009-05-19 CN CN2009101074891A patent/CN101894829B/zh active Active
-
2010
- 2010-01-26 US US12/693,502 patent/US20100295163A1/en not_active Abandoned
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103369873A (zh) * | 2012-04-06 | 2013-10-23 | 南亚科技股份有限公司 | 封装结构与重布层基板以及其形成方法 |
CN103369873B (zh) * | 2012-04-06 | 2016-05-11 | 南亚科技股份有限公司 | 封装结构与重布层基板以及其形成方法 |
Also Published As
Publication number | Publication date |
---|---|
US20100295163A1 (en) | 2010-11-25 |
CN101894829B (zh) | 2012-06-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100652397B1 (ko) | 매개 인쇄회로기판을 사용하는 적층형 반도체 패키지 | |
CN101436584B (zh) | 层叠半导体封装 | |
KR101145041B1 (ko) | 반도체칩 패키지, 반도체 모듈 및 그 제조 방법 | |
EP2803087A1 (en) | Stackable microelectronic package structures | |
TW200737482A (en) | Stack package utilizing through vias and re-distribution lines | |
CN101359659A (zh) | 半导体封装及制造方法、半导体模块和包括该模块的装置 | |
CN104081516A (zh) | 堆叠型半导体封装及其制造方法 | |
CN102163591B (zh) | 一种球型光栅阵列ic芯片封装件及其生产方法 | |
CN107785344A (zh) | 电子封装件及其制法 | |
KR20120040039A (ko) | 적층 반도체 패키지 및 그 제조 방법 | |
CN105097759A (zh) | 封装堆栈结构及其制法暨无核心层式封装基板及其制法 | |
CN106531710A (zh) | 一种集成供电***的封装件及封装方法 | |
CN202025746U (zh) | 高集成度***级封装结构 | |
CN202394859U (zh) | 半导体封装构造 | |
TWI431755B (zh) | 堆疊式封裝構造及其基板製造方法 | |
US20100127374A1 (en) | Multi-stack semiconductor package, semiconductor module and electronic signal processing system including thereof | |
CN101894829B (zh) | 堆叠式封装结构 | |
CN115241171A (zh) | 具有双层封装结构的Micro-LED微显示芯片 | |
CN101465341B (zh) | 堆叠式芯片封装结构 | |
CN106783649A (zh) | 一种集成供电***封装件的封装方法 | |
KR101185858B1 (ko) | 반도체 칩 및 이를 갖는 적층 반도체 패키지 | |
CN206412351U (zh) | 一种集成供电***的封装件 | |
CN204958379U (zh) | 一种***级mems单载体芯片封装件 | |
US20120286426A1 (en) | Semiconductor device | |
KR20120033848A (ko) | 적층 반도체 패키지 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Free format text: FORMER OWNER: HONGFUJIN PRECISE INDUSTRY CO., LTD. Effective date: 20121220 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20121220 Address after: 528437 export processing zone of Torch Development Zone, Guangdong, Zhongshan Patentee after: Ambit Electronics (Zhongshan) Co., Ltd. Address before: 528437 export processing zone of Torch Development Zone, Guangdong, Zhongshan Patentee before: Ambit Electronics (Zhongshan) Co., Ltd. Patentee before: Hon Hai Precision Industry Co., Ltd. |
|
C56 | Change in the name or address of the patentee |
Owner name: XUNXIN ELECTRONIC TECHNOLOGY (ZHONGSHAN) CO., LTD. Free format text: FORMER NAME: AMBIT MICROSYSTEMS (ZHONGSHAN) CORPORATION |
|
CP03 | Change of name, title or address |
Address after: 528437 No. 9 Jianye East Road, Torch Development Zone, Guangdong, Zhongshan Patentee after: - the core of Electronic Science and Technology (Zhongshan) Co., Ltd. Address before: 528437 export processing zone of Torch Development Zone, Guangdong, Zhongshan Patentee before: Ambit Electronics (Zhongshan) Co., Ltd. |