CN202394859U - 半导体封装构造 - Google Patents
半导体封装构造 Download PDFInfo
- Publication number
- CN202394859U CN202394859U CN2011204862216U CN201120486221U CN202394859U CN 202394859 U CN202394859 U CN 202394859U CN 2011204862216 U CN2011204862216 U CN 2011204862216U CN 201120486221 U CN201120486221 U CN 201120486221U CN 202394859 U CN202394859 U CN 202394859U
- Authority
- CN
- China
- Prior art keywords
- chip
- packaging structure
- semiconductor packaging
- substrate
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 47
- 239000000084 colloidal system Substances 0.000 claims abstract description 40
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 238000004806 packaging method and process Methods 0.000 claims description 69
- 238000012856 packing Methods 0.000 claims description 35
- 239000010949 copper Substances 0.000 claims description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 6
- 238000005553 drilling Methods 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 description 10
- 238000013459 approach Methods 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 7
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 6
- 238000006073 displacement reaction Methods 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 4
- 238000007789 sealing Methods 0.000 description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 241000218202 Coptis Species 0.000 description 2
- 235000002991 Coptis groenlandica Nutrition 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 239000010959 steel Substances 0.000 description 2
- 241000196324 Embryophyta Species 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000011265 semifinished product Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011204862216U CN202394859U (zh) | 2011-11-29 | 2011-11-29 | 半导体封装构造 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011204862216U CN202394859U (zh) | 2011-11-29 | 2011-11-29 | 半导体封装构造 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN202394859U true CN202394859U (zh) | 2012-08-22 |
Family
ID=46669764
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2011204862216U Expired - Fee Related CN202394859U (zh) | 2011-11-29 | 2011-11-29 | 半导体封装构造 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN202394859U (zh) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI548012B (zh) * | 2013-10-08 | 2016-09-01 | 庫利克和索夫工業公司 | 接合半導體元件的系統及方法 |
CN106206331A (zh) * | 2015-05-08 | 2016-12-07 | 华邦电子股份有限公司 | 堆叠封装装置及其制造方法 |
US9779965B2 (en) | 2013-10-08 | 2017-10-03 | Kulicke And Soffa Industries, Inc. | Systems and methods for bonding semiconductor elements |
US9780065B2 (en) | 2013-10-08 | 2017-10-03 | Kulicke And Soffa Industries, Inc. | Systems and methods for bonding semiconductor elements |
CN111261607A (zh) * | 2020-03-23 | 2020-06-09 | 上海艾为电子技术股份有限公司 | 一种芯片的制造方法 |
-
2011
- 2011-11-29 CN CN2011204862216U patent/CN202394859U/zh not_active Expired - Fee Related
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI548012B (zh) * | 2013-10-08 | 2016-09-01 | 庫利克和索夫工業公司 | 接合半導體元件的系統及方法 |
US9633981B2 (en) | 2013-10-08 | 2017-04-25 | Kulicke And Soffa Industries, Inc. | Systems and methods for bonding semiconductor elements |
US9779965B2 (en) | 2013-10-08 | 2017-10-03 | Kulicke And Soffa Industries, Inc. | Systems and methods for bonding semiconductor elements |
US9780065B2 (en) | 2013-10-08 | 2017-10-03 | Kulicke And Soffa Industries, Inc. | Systems and methods for bonding semiconductor elements |
US9905530B2 (en) | 2013-10-08 | 2018-02-27 | Kulicke And Soffa Industries, Inc. | Systems and methods for bonding semiconductor elements |
US10297568B2 (en) | 2013-10-08 | 2019-05-21 | Kulicke And Soffa Industries, Inc. | Systems and methods for bonding semiconductor elements |
US10312216B2 (en) | 2013-10-08 | 2019-06-04 | Kulicke And Soffa Industries, Inc. | Systems and methods for bonding semiconductor elements |
CN106206331A (zh) * | 2015-05-08 | 2016-12-07 | 华邦电子股份有限公司 | 堆叠封装装置及其制造方法 |
CN106206331B (zh) * | 2015-05-08 | 2019-02-01 | 华邦电子股份有限公司 | 堆叠封装装置及其制造方法 |
CN111261607A (zh) * | 2020-03-23 | 2020-06-09 | 上海艾为电子技术股份有限公司 | 一种芯片的制造方法 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee |
Owner name: ADVANCED SEMICONDUCTOR (SHANGHAI) CO., LTD. Free format text: FORMER NAME: ADVANCED SEMICONDUCTOR ENGINEERING (SHANGHAI) INC. |
|
CP01 | Change in the name or title of a patent holder |
Address after: 201203 Shanghai Jinke Road, Pudong New Area Zhangjiang hi tech Park No. 2300 Patentee after: Advanced Semiconductor (Shanghai) Co., Ltd. Address before: 201203 Shanghai Jinke Road, Pudong New Area Zhangjiang hi tech Park No. 2300 Patentee before: Advanced Semiconductor (Shanghai), Inc. |
|
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120822 Termination date: 20201129 |