CN101627439B - 通过移除对字线数据的预充电相依性而以减少的编程干扰对非易失性存储器进行编程 - Google Patents
通过移除对字线数据的预充电相依性而以减少的编程干扰对非易失性存储器进行编程 Download PDFInfo
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- CN101627439B CN101627439B CN2007800509170A CN200780050917A CN101627439B CN 101627439 B CN101627439 B CN 101627439B CN 2007800509170 A CN2007800509170 A CN 2007800509170A CN 200780050917 A CN200780050917 A CN 200780050917A CN 101627439 B CN101627439 B CN 101627439B
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- volatile memory
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
- G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Abstract
Description
Claims (22)
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/618,580 | 2006-12-29 | ||
US11/618,594 US7468918B2 (en) | 2006-12-29 | 2006-12-29 | Systems for programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data |
US11/618,580 US7433241B2 (en) | 2006-12-29 | 2006-12-29 | Programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data |
US11/618,594 | 2006-12-29 | ||
PCT/US2007/088931 WO2008083214A1 (en) | 2006-12-29 | 2007-12-27 | Programming non-volatile memory with reduced program disturb by removing pre-charg dependency on word line data |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101627439A CN101627439A (zh) | 2010-01-13 |
CN101627439B true CN101627439B (zh) | 2013-11-13 |
Family
ID=39583720
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2007800509170A Active CN101627439B (zh) | 2006-12-29 | 2007-12-27 | 通过移除对字线数据的预充电相依性而以减少的编程干扰对非易失性存储器进行编程 |
Country Status (2)
Country | Link |
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US (1) | US7468918B2 (zh) |
CN (1) | CN101627439B (zh) |
Families Citing this family (25)
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US20080046641A1 (en) * | 2006-08-21 | 2008-02-21 | Sandisk Il Ltd. | NAND flash memory controller exporting a logical sector-based interface |
US7616500B2 (en) | 2007-02-20 | 2009-11-10 | Sandisk Corporation | Non-volatile storage apparatus with multiple pass write sequence |
KR100885785B1 (ko) * | 2007-09-10 | 2009-02-26 | 주식회사 하이닉스반도체 | 플래시 메모리 소자의 프로그램 방법 |
US7751245B2 (en) * | 2007-10-10 | 2010-07-06 | Micron Technology, Inc. | Programming sequence in NAND memory |
JP4640658B2 (ja) * | 2008-02-15 | 2011-03-02 | マイクロン テクノロジー, インク. | マルチレベル抑制スキーム |
US7719902B2 (en) * | 2008-05-23 | 2010-05-18 | Sandisk Corporation | Enhanced bit-line pre-charge scheme for increasing channel boosting in non-volatile storage |
US8316201B2 (en) | 2008-12-18 | 2012-11-20 | Sandisk Il Ltd. | Methods for executing a command to write data from a source location to a destination location in a memory device |
US7848146B2 (en) * | 2009-03-19 | 2010-12-07 | Spansion Llc | Partial local self-boosting of a memory cell channel |
US8169822B2 (en) | 2009-11-11 | 2012-05-01 | Sandisk Technologies Inc. | Data state-dependent channel boosting to reduce channel-to-floating gate coupling in memory |
US8595411B2 (en) | 2009-12-30 | 2013-11-26 | Sandisk Technologies Inc. | Method and controller for performing a sequence of commands |
US8443263B2 (en) | 2009-12-30 | 2013-05-14 | Sandisk Technologies Inc. | Method and controller for performing a copy-back operation |
JP2012027966A (ja) * | 2010-07-20 | 2012-02-09 | Toshiba Corp | 不揮発性半導体記憶装置 |
US8478494B2 (en) | 2010-09-14 | 2013-07-02 | GM Global Technology Operations LLC | Manual transmission and engine speed match using a transmission input shaft speed sensor |
US20140198576A1 (en) * | 2013-01-16 | 2014-07-17 | Macronix International Co, Ltd. | Programming technique for reducing program disturb in stacked memory structures |
JP6179206B2 (ja) * | 2013-06-11 | 2017-08-16 | 株式会社リコー | メモリ制御装置 |
JP6240044B2 (ja) * | 2014-08-12 | 2017-11-29 | 東芝メモリ株式会社 | 不揮発性半導体記憶装置及びその動作方法 |
KR102272238B1 (ko) | 2014-09-02 | 2021-07-06 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그것의 프로그램 방법 |
US9536614B2 (en) | 2015-04-24 | 2017-01-03 | Nxp Usa, Inc. | Common source architecture for split gate memory |
KR102295528B1 (ko) * | 2015-08-25 | 2021-08-30 | 삼성전자 주식회사 | 메모리 장치, 메모리 시스템, 상기 메모리 장치의 동작 방법 및 상기 메모리 시스템의 동작 방법 |
US10381094B2 (en) | 2016-10-11 | 2019-08-13 | Macronix International Co., Ltd. | 3D memory with staged-level multibit programming |
KR102307063B1 (ko) * | 2017-06-26 | 2021-10-01 | 삼성전자주식회사 | 메모리 장치 |
KR20210083480A (ko) | 2019-12-26 | 2021-07-07 | 삼성전자주식회사 | 메모리 장치 및 그 동작 방법 |
CN112614533B (zh) * | 2021-01-06 | 2021-11-02 | 长江存储科技有限责任公司 | 用于半导体器件的编程方法及半导体器件 |
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US20050237829A1 (en) * | 2004-04-15 | 2005-10-27 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device |
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2006
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2007
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Also Published As
Publication number | Publication date |
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US7468918B2 (en) | 2008-12-23 |
CN101627439A (zh) | 2010-01-13 |
US20080159003A1 (en) | 2008-07-03 |
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