CN101154942B - 缓冲电路及其控制方法 - Google Patents
缓冲电路及其控制方法 Download PDFInfo
- Publication number
- CN101154942B CN101154942B CN2007101517392A CN200710151739A CN101154942B CN 101154942 B CN101154942 B CN 101154942B CN 2007101517392 A CN2007101517392 A CN 2007101517392A CN 200710151739 A CN200710151739 A CN 200710151739A CN 101154942 B CN101154942 B CN 101154942B
- Authority
- CN
- China
- Prior art keywords
- channel transistor
- type channel
- switching device
- output
- state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims description 26
- GOLXNESZZPUPJE-UHFFFAOYSA-N spiromesifen Chemical compound CC1=CC(C)=CC(C)=C1C(C(O1)=O)=C(OC(=O)CC(C)(C)C)C11CCCC1 GOLXNESZZPUPJE-UHFFFAOYSA-N 0.000 claims description 6
- 108090000699 N-Type Calcium Channels Proteins 0.000 description 208
- 102000004129 N-Type Calcium Channels Human genes 0.000 description 208
- 108010075750 P-Type Calcium Channels Proteins 0.000 description 197
- 108091006146 Channels Proteins 0.000 description 6
- 230000010355 oscillation Effects 0.000 description 4
- 230000002265 prevention Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000005764 inhibitory process Effects 0.000 description 3
- 230000009466 transformation Effects 0.000 description 3
- 230000033228 biological regulation Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000001939 inductive effect Effects 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
- H03K17/6872—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor using complementary field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
- H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/09425—Multistate logic
- H03K19/09429—Multistate logic one of the states being the high impedance or floating state
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
Abstract
Description
Claims (6)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006-266312 | 2006-09-29 | ||
JP2006266312 | 2006-09-29 | ||
JP2006266312A JP4859610B2 (ja) | 2006-09-29 | 2006-09-29 | バッファ回路及びその制御方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101154942A CN101154942A (zh) | 2008-04-02 |
CN101154942B true CN101154942B (zh) | 2010-06-16 |
Family
ID=39256429
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2007101517392A Expired - Fee Related CN101154942B (zh) | 2006-09-29 | 2007-09-27 | 缓冲电路及其控制方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7646221B2 (zh) |
JP (1) | JP4859610B2 (zh) |
KR (1) | KR100958152B1 (zh) |
CN (1) | CN101154942B (zh) |
TW (1) | TWI345376B (zh) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9154119B2 (en) | 2012-02-17 | 2015-10-06 | Power Integrations, Inc. | Latching comparator |
CN103716033B (zh) * | 2013-12-18 | 2017-08-11 | 上海仪电科学仪器股份有限公司 | 一种自动匹配多量程切换点的方法 |
CN110708056B (zh) * | 2019-10-11 | 2023-01-17 | 湖南国科微电子股份有限公司 | 一种输入缓冲电路和输入缓冲方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5760606A (en) * | 1995-04-17 | 1998-06-02 | Matsushita Electric Industrial, Co. | High voltage withstanding circuit and voltage level shifter |
CN1293488A (zh) * | 1999-10-15 | 2001-05-02 | 威盛电子股份有限公司 | 使用栅极电压控制的单端输入电压电平转换器 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6220423A (ja) * | 1985-07-19 | 1987-01-29 | Hitachi Ltd | 半導体集積回路装置 |
US4857770A (en) * | 1988-02-29 | 1989-08-15 | Advanced Micro Devices, Inc. | Output buffer arrangement for reducing chip noise without speed penalty |
US5081374A (en) * | 1990-02-22 | 1992-01-14 | National Semiconductor Corporation | Output buffer circuit with signal feed forward for reducing switching induced noise |
JP3093380B2 (ja) * | 1991-11-15 | 2000-10-03 | 株式会社東芝 | 半導体集積回路における信号出力回路 |
US5466614A (en) | 1993-09-20 | 1995-11-14 | At&T Global Information Solutions Company | Structure and method for remotely measuring process data |
JP3073402B2 (ja) * | 1994-08-25 | 2000-08-07 | シャープ株式会社 | 出力バッファ回路 |
US5548237A (en) * | 1995-03-10 | 1996-08-20 | International Business Machines Corporation | Process tolerant delay circuit |
JPH09148909A (ja) * | 1995-11-17 | 1997-06-06 | Hitachi Ltd | 半導体集積回路装置 |
US5894239A (en) * | 1997-04-18 | 1999-04-13 | International Business Machines Corporation | Single shot with pulse width controlled by reference oscillator |
KR20000041373A (ko) * | 1998-12-22 | 2000-07-15 | 김영환 | 출력 버퍼 |
JP3719868B2 (ja) | 1999-02-09 | 2005-11-24 | ローム株式会社 | 半導体集積回路装置 |
KR100622762B1 (ko) * | 1999-06-29 | 2006-09-12 | 주식회사 하이닉스반도체 | 데이타 출력버퍼 |
US6169438B1 (en) * | 1999-09-20 | 2001-01-02 | Oak Technology, Inc. | Circuit and method for selectively delaying electrical signals |
JP2001285050A (ja) | 2000-03-30 | 2001-10-12 | Mitsubishi Electric Corp | 出力バッファ回路 |
US6680636B1 (en) * | 2000-03-31 | 2004-01-20 | Silicon Graphics, Inc. | Method and system for clock cycle measurement and delay offset |
US6741106B2 (en) * | 2002-09-26 | 2004-05-25 | Agilent Technologies, Inc. | Programmable driver method and apparatus for high and low voltage operation |
JP3701942B2 (ja) * | 2003-01-21 | 2005-10-05 | 沖電気工業株式会社 | レベル変換回路 |
US20070085577A1 (en) * | 2005-10-18 | 2007-04-19 | Texas Instruments Incorporated | High frequency transmission gate buffer |
-
2006
- 2006-09-29 JP JP2006266312A patent/JP4859610B2/ja not_active Expired - Fee Related
-
2007
- 2007-09-13 TW TW096134202A patent/TWI345376B/zh not_active IP Right Cessation
- 2007-09-24 US US11/902,567 patent/US7646221B2/en not_active Expired - Fee Related
- 2007-09-27 CN CN2007101517392A patent/CN101154942B/zh not_active Expired - Fee Related
- 2007-09-28 KR KR1020070097915A patent/KR100958152B1/ko active IP Right Grant
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5760606A (en) * | 1995-04-17 | 1998-06-02 | Matsushita Electric Industrial, Co. | High voltage withstanding circuit and voltage level shifter |
CN1293488A (zh) * | 1999-10-15 | 2001-05-02 | 威盛电子股份有限公司 | 使用栅极电压控制的单端输入电压电平转换器 |
Also Published As
Publication number | Publication date |
---|---|
KR100958152B1 (ko) | 2010-05-18 |
JP2008085931A (ja) | 2008-04-10 |
TW200820616A (en) | 2008-05-01 |
TWI345376B (en) | 2011-07-11 |
CN101154942A (zh) | 2008-04-02 |
US20080079475A1 (en) | 2008-04-03 |
JP4859610B2 (ja) | 2012-01-25 |
US7646221B2 (en) | 2010-01-12 |
KR20080029890A (ko) | 2008-04-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: FUJITSU MICROELECTRONICS CO., LTD. Free format text: FORMER OWNER: FUJITSU LIMITED Effective date: 20081024 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20081024 Address after: Tokyo, Japan, Japan Applicant after: Fujitsu Microelectronics Ltd. Address before: Kanagawa Applicant before: Fujitsu Ltd. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee |
Owner name: FUJITSU SEMICONDUCTORS CO., LTD Free format text: FORMER NAME: FUJITSU MICROELECTRON CO., LTD. |
|
CP03 | Change of name, title or address |
Address after: Kanagawa Patentee after: Fujitsu Semiconductor Co., Ltd. Address before: Tokyo, Japan, Japan Patentee before: Fujitsu Microelectronics Ltd. |
|
ASS | Succession or assignment of patent right |
Owner name: SUOSI FUTURE CO., LTD. Free format text: FORMER OWNER: FUJITSU SEMICONDUCTOR CO., LTD. Effective date: 20150514 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20150514 Address after: Kanagawa Patentee after: Co., Ltd. Suo Si future Address before: Kanagawa Patentee before: Fujitsu Semiconductor Co., Ltd. |
|
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100616 Termination date: 20200927 |