ATE378692T1 - Halbleiterbauelement mit zweifachem gate und dessen herstellungsverfahren - Google Patents
Halbleiterbauelement mit zweifachem gate und dessen herstellungsverfahrenInfo
- Publication number
- ATE378692T1 ATE378692T1 AT01911561T AT01911561T ATE378692T1 AT E378692 T1 ATE378692 T1 AT E378692T1 AT 01911561 T AT01911561 T AT 01911561T AT 01911561 T AT01911561 T AT 01911561T AT E378692 T1 ATE378692 T1 AT E378692T1
- Authority
- AT
- Austria
- Prior art keywords
- gate
- silicon oxide
- semiconductor body
- production method
- oxide layer
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 7
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 5
- 229910052814 silicon oxide Inorganic materials 0.000 abstract 5
- 230000005669 field effect Effects 0.000 abstract 2
- 238000002513 implantation Methods 0.000 abstract 2
- 239000002019 doping agent Substances 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
- H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Semiconductor Memories (AREA)
- Junction Field-Effect Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP00200717 | 2000-02-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE378692T1 true ATE378692T1 (de) | 2007-11-15 |
Family
ID=8171125
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT01911561T ATE378692T1 (de) | 2000-02-29 | 2001-01-31 | Halbleiterbauelement mit zweifachem gate und dessen herstellungsverfahren |
Country Status (10)
Country | Link |
---|---|
US (1) | US6621124B2 (de) |
EP (1) | EP1179218B1 (de) |
JP (1) | JP2003526210A (de) |
KR (1) | KR100694331B1 (de) |
CN (1) | CN1208841C (de) |
AT (1) | ATE378692T1 (de) |
DE (1) | DE60131334T2 (de) |
MY (1) | MY124533A (de) |
TW (1) | TW478116B (de) |
WO (1) | WO2001065609A1 (de) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007504660A (ja) * | 2003-09-03 | 2007-03-01 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | ダブルゲート電界効果トランジスタ装置を製造する方法、及びそのようなダブルゲート電界効果トランジスタ装置 |
TWI248681B (en) * | 2004-03-29 | 2006-02-01 | Imec Inter Uni Micro Electr | Method for fabricating self-aligned source and drain contacts in a double gate FET with controlled manufacturing of a thin Si or non-Si channel |
CN100397597C (zh) * | 2004-06-11 | 2008-06-25 | 旺宏电子股份有限公司 | 金属氧化物半导体晶体管的制造方法以及存储器元件的制造方法 |
US7659169B2 (en) | 2004-09-02 | 2010-02-09 | Nxp B.V. | Semiconductor device and method of manufacturing thereof |
WO2006070310A1 (en) * | 2004-12-28 | 2006-07-06 | Koninklijke Philips Electronics N.V. | Method for the manufacture of a semiconductor device and a semiconductor device obtained through it |
US7709313B2 (en) * | 2005-07-19 | 2010-05-04 | International Business Machines Corporation | High performance capacitors in planar back gates CMOS |
US8017933B2 (en) * | 2008-06-30 | 2011-09-13 | Intel Corporation | Compositionally-graded quantum-well channels for semiconductor devices |
EP2190022B1 (de) * | 2008-11-20 | 2013-01-02 | Hitachi Ltd. | Spinpolarisierte Ladungsträgervorrichtung |
US9466729B1 (en) * | 2015-05-08 | 2016-10-11 | Qualcomm Incorporated | Etch stop region based fabrication of bonded semiconductor structures |
JP7395273B2 (ja) * | 2019-07-02 | 2023-12-11 | ローム株式会社 | 窒化物半導体装置およびその製造方法 |
US11424262B2 (en) * | 2020-03-17 | 2022-08-23 | Micron Technology, Inc. | Microelectronic devices including staircase structures, and related memory devices and electronic systems |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04307972A (ja) * | 1991-04-05 | 1992-10-30 | Fujitsu Ltd | 半導体装置の製造方法 |
JP2603886B2 (ja) * | 1991-05-09 | 1997-04-23 | 日本電信電話株式会社 | 薄層soi型絶縁ゲート型電界効果トランジスタの製造方法 |
US5302842A (en) * | 1992-07-20 | 1994-04-12 | Bell Communications Research, Inc. | Field-effect transistor formed over gate electrode |
US5461250A (en) * | 1992-08-10 | 1995-10-24 | International Business Machines Corporation | SiGe thin film or SOI MOSFET and method for making the same |
JPH07211916A (ja) * | 1994-01-19 | 1995-08-11 | Sony Corp | トランジスタ素子及びその作製方法 |
US5705405A (en) * | 1994-09-30 | 1998-01-06 | Sgs-Thomson Microelectronics, Inc. | Method of making the film transistor with all-around gate electrode |
US5736435A (en) * | 1995-07-03 | 1998-04-07 | Motorola, Inc. | Process for fabricating a fully self-aligned soi mosfet |
JP3409542B2 (ja) * | 1995-11-21 | 2003-05-26 | ソニー株式会社 | 半導体装置の製造方法 |
JP4332925B2 (ja) * | 1999-02-25 | 2009-09-16 | ソニー株式会社 | 半導体装置およびその製造方法 |
JP3086906B1 (ja) * | 1999-05-28 | 2000-09-11 | 工業技術院長 | 電界効果トランジスタ及びその製造方法 |
-
2001
- 2001-01-31 AT AT01911561T patent/ATE378692T1/de not_active IP Right Cessation
- 2001-01-31 DE DE60131334T patent/DE60131334T2/de not_active Expired - Lifetime
- 2001-01-31 JP JP2001564399A patent/JP2003526210A/ja not_active Withdrawn
- 2001-01-31 CN CNB018010571A patent/CN1208841C/zh not_active Expired - Lifetime
- 2001-01-31 EP EP01911561A patent/EP1179218B1/de not_active Expired - Lifetime
- 2001-01-31 WO PCT/EP2001/001023 patent/WO2001065609A1/en active IP Right Grant
- 2001-01-31 KR KR1020017013705A patent/KR100694331B1/ko not_active IP Right Cessation
- 2001-02-05 TW TW090102347A patent/TW478116B/zh not_active IP Right Cessation
- 2001-02-26 MY MYPI20010841A patent/MY124533A/en unknown
- 2001-02-28 US US09/795,002 patent/US6621124B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
CN1366713A (zh) | 2002-08-28 |
US6621124B2 (en) | 2003-09-16 |
US20010017388A1 (en) | 2001-08-30 |
DE60131334D1 (de) | 2007-12-27 |
KR20010112468A (ko) | 2001-12-20 |
MY124533A (en) | 2006-06-30 |
JP2003526210A (ja) | 2003-09-02 |
KR100694331B1 (ko) | 2007-03-12 |
EP1179218A1 (de) | 2002-02-13 |
CN1208841C (zh) | 2005-06-29 |
DE60131334T2 (de) | 2008-09-11 |
TW478116B (en) | 2002-03-01 |
WO2001065609A1 (en) | 2001-09-07 |
EP1179218B1 (de) | 2007-11-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW200721491A (en) | Semiconductor structures integrating damascene-body finfet's and planar devices on a common substrate and methods for forming such semiconductor structures | |
EP2214198A3 (de) | Isolierte komplementär-mos-bauelemente in epi-losem substrat | |
WO2004040655A3 (en) | Semiconductor component and method of manufacture | |
KR950034842A (ko) | 저 접합 누설 금속산화물 반도체 전계효과 트랜지스터 | |
ATE378692T1 (de) | Halbleiterbauelement mit zweifachem gate und dessen herstellungsverfahren | |
TW292428B (en) | Method for fabricating metal oxide semiconductor | |
TW200520145A (en) | Substrate isolation in integrated circuits | |
TW200623415A (en) | Semiconductor device and method for making same | |
CN100477275C (zh) | 体接触soi晶体管及其制备方法 | |
TW200504930A (en) | Method for fabricating merged logic CMOS device | |
WO1998053491A3 (en) | Manufacture of a semiconductor device with a mos transistor having an ldd structure | |
CN109103107A (zh) | 具有锗硅源漏的mos晶体管的制造方法 | |
JPS6249667A (ja) | Nチヤンネルmosトランジスタおよびその製造方法 | |
ATE510300T1 (de) | Verfahren zur herstellung einer vertikalen mos- transistoranordnung | |
KR940016609A (ko) | 불소이온이 주입된 n형 트랜지스터 제조방법 | |
JP2003142606A5 (de) | ||
KR970018259A (ko) | 반도체 소자의 트랜지스터 제조방법 | |
KR960043050A (ko) | 반도체 소자의 트랜지스터 제조방법 | |
WO2003038904A3 (en) | Field effect transistor on insulating layer and manufacturing method | |
KR100379512B1 (ko) | 반도체 소자의 제조방법 | |
KR910017645A (ko) | 반도체불휘발성메모리 및 그 제조방법 | |
JPH01296670A (ja) | 半導体装置 | |
KR940016927A (ko) | 트렌치(Trench) 구조를 이용한 수직 채널을 갖는 모스트랜지스터(MOS-FET) 제조방법 | |
KR20000065949A (ko) | 극소 채널 소자의 제조방법 | |
KR970054446A (ko) | 반도체소자 및 제조방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |