ATE283549T1 - Kontrolle der verspannungsdichte durch verwendung von gradientenschichten und durch planarisierung - Google Patents
Kontrolle der verspannungsdichte durch verwendung von gradientenschichten und durch planarisierungInfo
- Publication number
- ATE283549T1 ATE283549T1 AT98931529T AT98931529T ATE283549T1 AT E283549 T1 ATE283549 T1 AT E283549T1 AT 98931529 T AT98931529 T AT 98931529T AT 98931529 T AT98931529 T AT 98931529T AT E283549 T1 ATE283549 T1 AT E283549T1
- Authority
- AT
- Austria
- Prior art keywords
- layer
- substrate
- structure including
- semiconductor structure
- graded region
- Prior art date
Links
- 239000000758 substrate Substances 0.000 abstract 8
- 239000004065 semiconductor Substances 0.000 abstract 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052710 silicon Inorganic materials 0.000 abstract 2
- 239000010703 silicon Substances 0.000 abstract 2
- 238000004519 manufacturing process Methods 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02433—Crystal orientation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/0245—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02502—Layer structure consisting of two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/0251—Graded layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/933—Germanium or silicon or Ge-Si on III-V
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Recrystallisation Techniques (AREA)
- Magnetic Record Carriers (AREA)
- Gears, Cams (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US5060297P | 1997-06-24 | 1997-06-24 | |
US5976597P | 1997-09-16 | 1997-09-16 | |
PCT/US1998/013076 WO1998059365A1 (en) | 1997-06-24 | 1998-06-23 | CONTROLLING THREADING DISLOCATION DENSITIES IN Ge ON Si USING GRADED GeSi LAYERS AND PLANARIZATION |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE283549T1 true ATE283549T1 (de) | 2004-12-15 |
Family
ID=26728449
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT98931529T ATE283549T1 (de) | 1997-06-24 | 1998-06-23 | Kontrolle der verspannungsdichte durch verwendung von gradientenschichten und durch planarisierung |
Country Status (8)
Country | Link |
---|---|
US (5) | US6107653A (de) |
EP (1) | EP1016129B2 (de) |
JP (1) | JP3535527B2 (de) |
KR (1) | KR100400808B1 (de) |
AT (1) | ATE283549T1 (de) |
CA (1) | CA2295069A1 (de) |
DE (1) | DE69827824T3 (de) |
WO (1) | WO1998059365A1 (de) |
Families Citing this family (235)
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1998
- 1998-06-23 US US09/103,672 patent/US6107653A/en not_active Expired - Lifetime
- 1998-06-23 AT AT98931529T patent/ATE283549T1/de not_active IP Right Cessation
- 1998-06-23 KR KR10-1999-7012279A patent/KR100400808B1/ko not_active IP Right Cessation
- 1998-06-23 EP EP98931529A patent/EP1016129B2/de not_active Expired - Lifetime
- 1998-06-23 CA CA002295069A patent/CA2295069A1/en not_active Abandoned
- 1998-06-23 WO PCT/US1998/013076 patent/WO1998059365A1/en active IP Right Grant
- 1998-06-23 JP JP50500499A patent/JP3535527B2/ja not_active Expired - Fee Related
- 1998-06-23 DE DE69827824T patent/DE69827824T3/de not_active Expired - Fee Related
-
1999
- 1999-03-09 US US09/265,016 patent/US6291321B1/en not_active Expired - Lifetime
-
2000
- 2000-07-06 US US09/611,024 patent/US6876010B1/en not_active Expired - Fee Related
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2001
- 2001-12-17 US US10/022,689 patent/US7250359B2/en not_active Expired - Fee Related
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Also Published As
Publication number | Publication date |
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US6291321B1 (en) | 2001-09-18 |
KR100400808B1 (ko) | 2003-10-08 |
US20040262631A1 (en) | 2004-12-30 |
KR20010014201A (ko) | 2001-02-26 |
DE69827824D1 (de) | 2004-12-30 |
EP1016129B2 (de) | 2009-06-10 |
JP2000513507A (ja) | 2000-10-10 |
US7081410B2 (en) | 2006-07-25 |
EP1016129A1 (de) | 2000-07-05 |
US6876010B1 (en) | 2005-04-05 |
DE69827824T2 (de) | 2005-11-24 |
US6107653A (en) | 2000-08-22 |
US20020084000A1 (en) | 2002-07-04 |
CA2295069A1 (en) | 1998-12-30 |
WO1998059365A1 (en) | 1998-12-30 |
DE69827824T3 (de) | 2009-09-03 |
JP3535527B2 (ja) | 2004-06-07 |
EP1016129B1 (de) | 2004-11-24 |
US7250359B2 (en) | 2007-07-31 |
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