CN100442476C - 用于cmos技术的应变感应迁移率增强纳米器件及工艺 - Google Patents
用于cmos技术的应变感应迁移率增强纳米器件及工艺 Download PDFInfo
- Publication number
- CN100442476C CN100442476C CNB2005100303113A CN200510030311A CN100442476C CN 100442476 C CN100442476 C CN 100442476C CN B2005100303113 A CNB2005100303113 A CN B2005100303113A CN 200510030311 A CN200510030311 A CN 200510030311A CN 100442476 C CN100442476 C CN 100442476C
- Authority
- CN
- China
- Prior art keywords
- drain region
- pmos
- grid structure
- source area
- semiconductor substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims description 103
- 238000005516 engineering process Methods 0.000 title claims description 26
- 230000008569 process Effects 0.000 title description 8
- 230000001939 inductive effect Effects 0.000 title description 2
- 239000000463 material Substances 0.000 claims abstract description 83
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims abstract description 53
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims abstract description 44
- 239000010410 layer Substances 0.000 claims description 88
- 239000004065 semiconductor Substances 0.000 claims description 52
- 239000000758 substrate Substances 0.000 claims description 46
- 238000005530 etching Methods 0.000 claims description 25
- 125000006850 spacer group Chemical group 0.000 claims description 18
- 230000006835 compression Effects 0.000 claims description 13
- 238000007906 compression Methods 0.000 claims description 13
- 238000000059 patterning Methods 0.000 claims description 11
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 9
- 229910052796 boron Inorganic materials 0.000 claims description 9
- 239000011241 protective layer Substances 0.000 claims description 9
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 5
- 238000011065 in-situ storage Methods 0.000 claims description 5
- 229910052698 phosphorus Inorganic materials 0.000 claims description 5
- 239000011574 phosphorus Substances 0.000 claims description 5
- 238000011049 filling Methods 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 3
- 239000002210 silicon-based material Substances 0.000 claims description 3
- 239000000428 dust Substances 0.000 claims 2
- 238000005192 partition Methods 0.000 claims 2
- 239000003870 refractory metal Substances 0.000 claims 1
- 229910010271 silicon carbide Inorganic materials 0.000 abstract description 6
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 abstract description 3
- 230000004048 modification Effects 0.000 description 18
- 238000012986 modification Methods 0.000 description 18
- 239000012535 impurity Substances 0.000 description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 13
- 229910021332 silicide Inorganic materials 0.000 description 12
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 12
- 229910052581 Si3N4 Inorganic materials 0.000 description 10
- 229910052710 silicon Inorganic materials 0.000 description 10
- 239000010703 silicon Substances 0.000 description 10
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 8
- 238000002955 isolation Methods 0.000 description 8
- 238000004519 manufacturing process Methods 0.000 description 8
- 230000004888 barrier function Effects 0.000 description 6
- 239000012212 insulator Substances 0.000 description 6
- 238000006467 substitution reaction Methods 0.000 description 6
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 5
- 238000012856 packing Methods 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229910052785 arsenic Inorganic materials 0.000 description 3
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000011066 ex-situ storage Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
- PICXIOQBANWBIZ-UHFFFAOYSA-N zinc;1-oxidopyridine-2-thione Chemical class [Zn+2].[O-]N1C=CC=CC1=S.[O-]N1C=CC=CC1=S PICXIOQBANWBIZ-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66628—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation recessing the gate by forming single crystalline semiconductor material at the source or drain location
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66636—Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7843—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being an applied insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7848—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being located in the source/drain region, e.g. SiGe source and drain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/161—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys
- H01L29/165—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys in different semiconductor regions, e.g. heterojunctions
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
参数 | HT SiN | HC SiN |
最大时间/s | 100 | 67 |
Servo/Torr | 6 | 6 |
HF RF Pwr/W | 40 | 450 |
SiH<sub>4</sub>-Lo/sccm | 30 | 30 |
NH<sub>3</sub>/sccm | 80 | 80 |
N<sub>2</sub>/sccm | 9000 | 9000 |
Htr 1/2(晶圆)/T | 400 | 400 |
Lift Pos/mils | 480 | 480 |
应力/THK=2K | 948 | -1483 |
Claims (33)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB2005100303113A CN100442476C (zh) | 2005-09-29 | 2005-09-29 | 用于cmos技术的应变感应迁移率增强纳米器件及工艺 |
US11/244,955 US20070072376A1 (en) | 2005-09-29 | 2005-10-05 | Strained-induced mobility enhancement nano-device structure and integrated process architecture for CMOS technologies |
US13/413,122 US20120164803A1 (en) | 2005-09-29 | 2012-03-06 | Strained-induced mobility enhancement nano-device structure and integrated process architecture for cmos technologies |
US13/716,533 US9048300B2 (en) | 2005-09-29 | 2012-12-17 | Strained-induced mobility enhancement nano-device structure and integrated process architecture for CMOS technologies |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB2005100303113A CN100442476C (zh) | 2005-09-29 | 2005-09-29 | 用于cmos技术的应变感应迁移率增强纳米器件及工艺 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1941329A CN1941329A (zh) | 2007-04-04 |
CN100442476C true CN100442476C (zh) | 2008-12-10 |
Family
ID=37894627
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005100303113A Active CN100442476C (zh) | 2005-09-29 | 2005-09-29 | 用于cmos技术的应变感应迁移率增强纳米器件及工艺 |
Country Status (2)
Country | Link |
---|---|
US (3) | US20070072376A1 (zh) |
CN (1) | CN100442476C (zh) |
Families Citing this family (79)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1808268B (zh) * | 2005-01-18 | 2010-10-06 | 中芯国际集成电路制造(上海)有限公司 | 用于应变硅mos晶体管的金属硬掩模方法和结构 |
CN100442476C (zh) | 2005-09-29 | 2008-12-10 | 中芯国际集成电路制造(上海)有限公司 | 用于cmos技术的应变感应迁移率增强纳米器件及工艺 |
CN101226899A (zh) * | 2007-01-19 | 2008-07-23 | 中芯国际集成电路制造(上海)有限公司 | 在硅凹陷中后续外延生长应变硅mos晶片管的方法和结构 |
CN101364545B (zh) * | 2007-08-10 | 2010-12-22 | 中芯国际集成电路制造(上海)有限公司 | 应变硅晶体管的锗硅和多晶硅栅极结构 |
CN101593701B (zh) * | 2008-05-30 | 2011-05-04 | 中芯国际集成电路制造(北京)有限公司 | 应变nmos器件以及应变cmos器件的制造方法 |
DE102008035816B4 (de) * | 2008-07-31 | 2011-08-25 | GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG, 01109 | Leistungssteigerung in PMOS- und NMOS-Transistoren durch Verwendung eines eingebetteten verformten Halbleitermaterials |
US9349655B2 (en) | 2008-08-29 | 2016-05-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for mechanical stress enhancement in semiconductor devices |
DE102009035409B4 (de) * | 2009-07-31 | 2013-06-06 | Globalfoundries Dresden Module One Llc & Co. Kg | Leckstromsteuerung in Feldeffekttransistoren auf der Grundlage einer Implantationssorte, die lokal an der STI-Kante eingeführt wird |
CN102024761A (zh) * | 2009-09-18 | 2011-04-20 | 中芯国际集成电路制造(上海)有限公司 | 用于形成半导体集成电路器件的方法 |
JP5012886B2 (ja) * | 2009-12-25 | 2012-08-29 | 株式会社デンソー | 半導体装置およびその製造方法 |
US8466502B2 (en) | 2011-03-24 | 2013-06-18 | United Microelectronics Corp. | Metal-gate CMOS device |
US8445363B2 (en) | 2011-04-21 | 2013-05-21 | United Microelectronics Corp. | Method of fabricating an epitaxial layer |
US8710596B2 (en) | 2011-05-13 | 2014-04-29 | United Microelectronics Corp. | Semiconductor device |
US8481391B2 (en) | 2011-05-18 | 2013-07-09 | United Microelectronics Corp. | Process for manufacturing stress-providing structure and semiconductor device with such stress-providing structure |
US8597860B2 (en) | 2011-05-20 | 2013-12-03 | United Microelectronics Corp. | Dummy patterns and method for generating dummy patterns |
US8716750B2 (en) | 2011-07-25 | 2014-05-06 | United Microelectronics Corp. | Semiconductor device having epitaxial structures |
US8575043B2 (en) | 2011-07-26 | 2013-11-05 | United Microelectronics Corp. | Semiconductor device and manufacturing method thereof |
US8647941B2 (en) | 2011-08-17 | 2014-02-11 | United Microelectronics Corp. | Method of forming semiconductor device |
US8853013B2 (en) | 2011-08-19 | 2014-10-07 | United Microelectronics Corp. | Method for fabricating field effect transistor with fin structure |
US8674433B2 (en) | 2011-08-24 | 2014-03-18 | United Microelectronics Corp. | Semiconductor process |
US8477006B2 (en) | 2011-08-30 | 2013-07-02 | United Microelectronics Corp. | Resistor and manufacturing method thereof |
US8507350B2 (en) | 2011-09-21 | 2013-08-13 | United Microelectronics Corporation | Fabricating method of semiconductor elements |
US8497198B2 (en) | 2011-09-23 | 2013-07-30 | United Microelectronics Corp. | Semiconductor process |
US8476169B2 (en) | 2011-10-17 | 2013-07-02 | United Microelectronics Corp. | Method of making strained silicon channel semiconductor structure |
US8722501B2 (en) | 2011-10-18 | 2014-05-13 | United Microelectronics Corp. | Method for manufacturing multi-gate transistor device |
US8691659B2 (en) | 2011-10-26 | 2014-04-08 | United Microelectronics Corp. | Method for forming void-free dielectric layer |
US8871575B2 (en) | 2011-10-31 | 2014-10-28 | United Microelectronics Corp. | Method of fabricating field effect transistor with fin structure |
US8754448B2 (en) | 2011-11-01 | 2014-06-17 | United Microelectronics Corp. | Semiconductor device having epitaxial layer |
US9006092B2 (en) | 2011-11-03 | 2015-04-14 | United Microelectronics Corp. | Semiconductor structure having fluoride metal layer and process thereof |
US8975672B2 (en) | 2011-11-09 | 2015-03-10 | United Microelectronics Corp. | Metal oxide semiconductor transistor and manufacturing method thereof |
US8647953B2 (en) | 2011-11-17 | 2014-02-11 | United Microelectronics Corp. | Method for fabricating first and second epitaxial cap layers |
US8709930B2 (en) | 2011-11-25 | 2014-04-29 | United Microelectronics Corp. | Semiconductor process |
US8921206B2 (en) | 2011-11-30 | 2014-12-30 | United Microelectronics Corp. | Semiconductor process |
US9698229B2 (en) | 2012-01-17 | 2017-07-04 | United Microelectronics Corp. | Semiconductor structure and process thereof |
US8536072B2 (en) | 2012-02-07 | 2013-09-17 | United Microelectronics Corp. | Semiconductor process |
US8987096B2 (en) | 2012-02-07 | 2015-03-24 | United Microelectronics Corp. | Semiconductor process |
US9006107B2 (en) | 2012-03-11 | 2015-04-14 | United Microelectronics Corp. | Patterned structure of semiconductor device and fabricating method thereof |
US9136348B2 (en) | 2012-03-12 | 2015-09-15 | United Microelectronics Corp. | Semiconductor structure and fabrication method thereof |
US9202914B2 (en) | 2012-03-14 | 2015-12-01 | United Microelectronics Corporation | Semiconductor device and method for fabricating the same |
US8664069B2 (en) | 2012-04-05 | 2014-03-04 | United Microelectronics Corp. | Semiconductor structure and process thereof |
US9142649B2 (en) | 2012-04-23 | 2015-09-22 | United Microelectronics Corp. | Semiconductor structure with metal gate and method of fabricating the same |
US8866230B2 (en) | 2012-04-26 | 2014-10-21 | United Microelectronics Corp. | Semiconductor devices |
CN103377941B (zh) * | 2012-04-28 | 2016-08-10 | 中芯国际集成电路制造(上海)有限公司 | Pmos晶体管及形成方法 |
US8835243B2 (en) | 2012-05-04 | 2014-09-16 | United Microelectronics Corp. | Semiconductor process |
US8962433B2 (en) | 2012-06-12 | 2015-02-24 | United Microelectronics Corp. | MOS transistor process |
US8951876B2 (en) | 2012-06-20 | 2015-02-10 | United Microelectronics Corp. | Semiconductor device and manufacturing method thereof |
US8796695B2 (en) | 2012-06-22 | 2014-08-05 | United Microelectronics Corp. | Multi-gate field-effect transistor and process thereof |
US8501636B1 (en) | 2012-07-24 | 2013-08-06 | United Microelectronics Corp. | Method for fabricating silicon dioxide layer |
US8710632B2 (en) | 2012-09-07 | 2014-04-29 | United Microelectronics Corp. | Compound semiconductor epitaxial structure and method for fabricating the same |
CN103681846B (zh) | 2012-09-20 | 2017-02-08 | 中芯国际集成电路制造(上海)有限公司 | 半导体装置及其制造方法 |
CN103730417B (zh) * | 2012-10-10 | 2016-08-31 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制造方法 |
US9064931B2 (en) | 2012-10-11 | 2015-06-23 | United Microelectronics Corp. | Semiconductor structure having contact plug and metal gate transistor and method of making the same |
CN103730421A (zh) * | 2012-10-16 | 2014-04-16 | 中芯国际集成电路制造(上海)有限公司 | Cmos的形成方法 |
US8927388B2 (en) | 2012-11-15 | 2015-01-06 | United Microelectronics Corp. | Method of fabricating dielectric layer and shallow trench isolation |
US8883621B2 (en) | 2012-12-27 | 2014-11-11 | United Microelectronics Corp. | Semiconductor structure and method of fabricating MOS device |
US9117925B2 (en) | 2013-01-31 | 2015-08-25 | United Microelectronics Corp. | Epitaxial process |
US20140210012A1 (en) | 2013-01-31 | 2014-07-31 | Spansion Llc | Manufacturing of FET Devices Having Lightly Doped Drain and Source Regions |
US9076870B2 (en) | 2013-02-21 | 2015-07-07 | United Microelectronics Corp. | Method for forming fin-shaped structure |
US9196352B2 (en) | 2013-02-25 | 2015-11-24 | United Microelectronics Corp. | Static random access memory unit cell structure and static random access memory unit cell layout structure |
US9214395B2 (en) | 2013-03-13 | 2015-12-15 | United Microelectronics Corp. | Method of manufacturing semiconductor devices |
US8753902B1 (en) | 2013-03-13 | 2014-06-17 | United Microelectronics Corp. | Method of controlling etching process for forming epitaxial structure |
US9093285B2 (en) | 2013-03-22 | 2015-07-28 | United Microelectronics Corp. | Semiconductor structure and process thereof |
US9034705B2 (en) | 2013-03-26 | 2015-05-19 | United Microelectronics Corp. | Method of forming semiconductor device |
US9147747B2 (en) | 2013-05-02 | 2015-09-29 | United Microelectronics Corp. | Semiconductor structure with hard mask disposed on the gate structure |
US9064893B2 (en) | 2013-05-13 | 2015-06-23 | United Microelectronics Corp. | Gradient dopant of strained substrate manufacturing method of semiconductor device |
CN104183491B (zh) * | 2013-05-21 | 2018-05-01 | 中芯国际集成电路制造(上海)有限公司 | 晶体管的形成方法 |
US9230812B2 (en) | 2013-05-22 | 2016-01-05 | United Microelectronics Corp. | Method for forming semiconductor structure having opening |
US9076652B2 (en) | 2013-05-27 | 2015-07-07 | United Microelectronics Corp. | Semiconductor process for modifying shape of recess |
US8853060B1 (en) | 2013-05-27 | 2014-10-07 | United Microelectronics Corp. | Epitaxial process |
US8993433B2 (en) | 2013-05-27 | 2015-03-31 | United Microelectronics Corp. | Manufacturing method for forming a self aligned contact |
US9349812B2 (en) | 2013-05-27 | 2016-05-24 | United Microelectronics Corp. | Semiconductor device with self-aligned contact and method of manufacturing the same |
US9064814B2 (en) | 2013-06-19 | 2015-06-23 | United Microelectronics Corp. | Semiconductor structure having metal gate and manufacturing method thereof |
US8765546B1 (en) | 2013-06-24 | 2014-07-01 | United Microelectronics Corp. | Method for fabricating fin-shaped field-effect transistor |
US8895396B1 (en) | 2013-07-11 | 2014-11-25 | United Microelectronics Corp. | Epitaxial Process of forming stress inducing epitaxial layers in source and drain regions of PMOS and NMOS structures |
US8981487B2 (en) | 2013-07-31 | 2015-03-17 | United Microelectronics Corp. | Fin-shaped field-effect transistor (FinFET) |
CN104392929A (zh) * | 2014-11-26 | 2015-03-04 | 上海华力微电子有限公司 | 嵌入式碳化硅的制备方法 |
CN104409354A (zh) * | 2014-11-26 | 2015-03-11 | 上海华力微电子有限公司 | 嵌入式碳化硅的制备方法 |
CN109346528B (zh) * | 2018-09-27 | 2022-03-29 | 上海华力微电子有限公司 | 闪存结构及对应的编程、擦除和读取方法 |
US10957798B2 (en) | 2019-02-06 | 2021-03-23 | International Business Machines Corporation | Nanosheet transistors with transverse strained channel regions |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1218994A (zh) * | 1997-12-03 | 1999-06-09 | 松下电器产业株式会社 | 半导体装置 |
US6043545A (en) * | 1998-02-07 | 2000-03-28 | United Microelectronics Corp. | MOSFET device with two spacers |
US20050142768A1 (en) * | 2003-12-31 | 2005-06-30 | Nick Lindert | Controlled faceting of source/drain regions |
US20050158931A1 (en) * | 2003-08-04 | 2005-07-21 | Huajie Chen | Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions |
US20050179066A1 (en) * | 2004-02-17 | 2005-08-18 | Anand Murthy | Fabricating strained channel epitaxial source/drain transistors |
Family Cites Families (64)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5168072A (en) * | 1990-10-12 | 1992-12-01 | Texas Instruments Incorporated | Method of fabricating an high-performance insulated-gate field-effect transistor |
US6107653A (en) * | 1997-06-24 | 2000-08-22 | Massachusetts Institute Of Technology | Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization |
US6121100A (en) * | 1997-12-31 | 2000-09-19 | Intel Corporation | Method of fabricating a MOS transistor with a raised source/drain extension |
US6179973B1 (en) * | 1999-01-05 | 2001-01-30 | Novellus Systems, Inc. | Apparatus and method for controlling plasma uniformity across a substrate |
US6376868B1 (en) * | 1999-06-15 | 2002-04-23 | Micron Technology, Inc. | Multi-layered gate for a CMOS imager |
KR100332108B1 (ko) * | 1999-06-29 | 2002-04-10 | 박종섭 | 반도체 소자의 트랜지스터 및 그 제조 방법 |
US6274894B1 (en) * | 1999-08-17 | 2001-08-14 | Advanced Micro Devices, Inc. | Low-bandgap source and drain formation for short-channel MOS transistors |
US6599842B2 (en) * | 1999-11-29 | 2003-07-29 | Applied Materials, Inc. | Method for rounding corners and removing damaged outer surfaces of a trench |
US7391087B2 (en) * | 1999-12-30 | 2008-06-24 | Intel Corporation | MOS transistor structure and method of fabrication |
US6372569B1 (en) * | 2000-01-18 | 2002-04-16 | Chartered Semiconductor Manufacturing Ltd. | Selective formation of hydrogen rich PECVD silicon nitride for improved NMOS transistor performance |
WO2001054175A1 (en) | 2000-01-20 | 2001-07-26 | Amberwave Systems Corporation | Low threading dislocation density relaxed mismatched epilayers without high temperature growth |
US6277249B1 (en) * | 2000-01-21 | 2001-08-21 | Applied Materials Inc. | Integrated process for copper via filling using a magnetron and target producing highly energetic ions |
JP3613113B2 (ja) * | 2000-01-21 | 2005-01-26 | 日本電気株式会社 | 半導体装置およびその製造方法 |
US6251242B1 (en) * | 2000-01-21 | 2001-06-26 | Applied Materials, Inc. | Magnetron and target producing an extended plasma region in a sputter reactor |
JP2004512672A (ja) * | 2000-06-06 | 2004-04-22 | イーケーシー テクノロジー,インコーポレイティド | 電子材料製造法 |
US6352629B1 (en) * | 2000-07-10 | 2002-03-05 | Applied Materials, Inc. | Coaxial electromagnet in a magnetron sputtering reactor |
US6406599B1 (en) * | 2000-11-01 | 2002-06-18 | Applied Materials, Inc. | Magnetron with a rotating center magnet for a vault shaped sputtering target |
US6563152B2 (en) * | 2000-12-29 | 2003-05-13 | Intel Corporation | Technique to obtain high mobility channels in MOS transistors by forming a strain layer on an underside of a channel |
US6514836B2 (en) * | 2001-06-04 | 2003-02-04 | Rona Elizabeth Belford | Methods of producing strained microelectronic and/or optical integrated and discrete devices |
US6621131B2 (en) * | 2001-11-01 | 2003-09-16 | Intel Corporation | Semiconductor transistor having a stressed channel |
US6713357B1 (en) * | 2001-12-20 | 2004-03-30 | Advanced Micro Devices, Inc. | Method to reduce parasitic capacitance of MOS transistors |
JP2005516389A (ja) * | 2002-01-23 | 2005-06-02 | スピネカ セミコンダクター, インコーポレイテッド | 歪み半導体基板を用いてショットキまたはショットキのような接触を形成するソースおよび/またはドレインを有する電界効果トランジスタ |
US6730196B2 (en) * | 2002-08-01 | 2004-05-04 | Applied Materials, Inc. | Auxiliary electromagnets in a magnetron sputter reactor |
US6828211B2 (en) * | 2002-10-01 | 2004-12-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Shallow trench filled with two or more dielectrics for isolation and coupling or for stress control |
KR100467023B1 (ko) | 2002-10-31 | 2005-01-24 | 삼성전자주식회사 | 자기 정렬 접촉 구조 및 그 형성 방법 |
US7112495B2 (en) * | 2003-08-15 | 2006-09-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit |
US7166528B2 (en) | 2003-10-10 | 2007-01-23 | Applied Materials, Inc. | Methods of selective deposition of heavily doped epitaxial SiGe |
US7176522B2 (en) * | 2003-11-25 | 2007-02-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device having high drive current and method of manufacturing thereof |
US20050145956A1 (en) * | 2004-01-05 | 2005-07-07 | Taiwan Semiconductor Manufacturing Co. | Devices with high-k gate dielectric |
US7052946B2 (en) * | 2004-03-10 | 2006-05-30 | Taiwan Semiconductor Manufacturing Co. Ltd. | Method for selectively stressing MOSFETs to improve charge carrier mobility |
US6881635B1 (en) * | 2004-03-23 | 2005-04-19 | International Business Machines Corporation | Strained silicon NMOS devices with embedded source/drain |
CA2567156A1 (en) * | 2004-05-17 | 2006-07-20 | Cambrios Technology Corp. | Biofabrication of transistors including field effect transistors |
US7078722B2 (en) * | 2004-09-20 | 2006-07-18 | International Business Machines Corporation | NFET and PFET devices and methods of fabricating same |
US7883979B2 (en) * | 2004-10-26 | 2011-02-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for manufacturing a semiconductor device with reduced floating body effect |
US20060115949A1 (en) * | 2004-12-01 | 2006-06-01 | Freescale Semiconductor, Inc. | Semiconductor fabrication process including source/drain recessing and filling |
JP4369359B2 (ja) | 2004-12-28 | 2009-11-18 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置 |
US7195985B2 (en) * | 2005-01-04 | 2007-03-27 | Intel Corporation | CMOS transistor junction regions formed by a CVD etching and deposition sequence |
US7335959B2 (en) * | 2005-01-06 | 2008-02-26 | Intel Corporation | Device with stepped source/drain region profile |
CN1808268B (zh) * | 2005-01-18 | 2010-10-06 | 中芯国际集成电路制造(上海)有限公司 | 用于应变硅mos晶体管的金属硬掩模方法和结构 |
WO2006112496A1 (ja) * | 2005-04-15 | 2006-10-26 | Toyo Shinyaku Co., Ltd. | プロアントシアニジン含有物の製造方法 |
US7221006B2 (en) * | 2005-04-20 | 2007-05-22 | Freescale Semiconductor, Inc. | GeSOI transistor with low junction current and low junction capacitance and method for making the same |
US7405131B2 (en) * | 2005-07-16 | 2008-07-29 | Chartered Semiconductor Manufacturing, Ltd. | Method and structure to prevent silicide strapping of source/drain to body in semiconductor devices with source/drain stressor |
CN1937183A (zh) * | 2005-09-19 | 2007-03-28 | 中芯国际集成电路制造(上海)有限公司 | 使用应变硅晶体管栅极图案化用硬掩模的方法和结构 |
CN100536090C (zh) * | 2005-09-19 | 2009-09-02 | 中芯国际集成电路制造(上海)有限公司 | 形成cmos半导体器件的方法 |
US7491615B2 (en) * | 2005-09-23 | 2009-02-17 | United Microelectronics Corp. | Method of fabricating strained-silicon transistors and strained-silicon CMOS transistors |
CN1941296A (zh) * | 2005-09-28 | 2007-04-04 | 中芯国际集成电路制造(上海)有限公司 | 应变硅cmos晶体管的原位掺杂硅锗与碳化硅源漏极区 |
CN100442476C (zh) | 2005-09-29 | 2008-12-10 | 中芯国际集成电路制造(上海)有限公司 | 用于cmos技术的应变感应迁移率增强纳米器件及工艺 |
CN1959959B (zh) * | 2005-10-31 | 2010-04-21 | 中芯国际集成电路制造(上海)有限公司 | 使用应变硅用于集成pmos和nmos晶体管的单掩模设计方法和结构 |
CN1959958B (zh) * | 2005-10-31 | 2010-05-05 | 中芯国际集成电路制造(上海)有限公司 | 用于应变硅mos晶体管的多晶硅栅极掺杂方法和结构 |
CN1959957B (zh) * | 2005-10-31 | 2010-05-05 | 中芯国际集成电路制造(上海)有限公司 | 使用应变硅用于晶体管的集成设计方法和结构 |
US7718500B2 (en) * | 2005-12-16 | 2010-05-18 | Chartered Semiconductor Manufacturing, Ltd | Formation of raised source/drain structures in NFET with embedded SiGe in PFET |
US7446026B2 (en) * | 2006-02-08 | 2008-11-04 | Freescale Semiconductor, Inc. | Method of forming a CMOS device with stressor source/drain regions |
US20080124874A1 (en) * | 2006-11-03 | 2008-05-29 | Samsung Electronics Co., Ltd. | Methods of Forming Field Effect Transistors Having Silicon-Germanium Source and Drain Regions |
US7800182B2 (en) * | 2006-11-20 | 2010-09-21 | Infineon Technologies Ag | Semiconductor devices having pFET with SiGe gate electrode and embedded SiGe source/drain regions and methods of making the same |
US7557000B2 (en) * | 2006-11-20 | 2009-07-07 | Semiconductor Manufacturing International (Shanghai) Corporation | Etching method and structure using a hard mask for strained silicon MOS transistors |
US7381623B1 (en) * | 2007-01-17 | 2008-06-03 | International Business Machines Corporation | Pre-epitaxial disposable spacer integration scheme with very low temperature selective epitaxy for enhanced device performance |
KR100855977B1 (ko) * | 2007-02-12 | 2008-09-02 | 삼성전자주식회사 | 반도체 소자 및 그 제조방법 |
US8124473B2 (en) * | 2007-04-12 | 2012-02-28 | Advanced Micro Devices, Inc. | Strain enhanced semiconductor devices and methods for their fabrication |
US8574979B2 (en) * | 2007-05-18 | 2013-11-05 | Texas Instruments Incorporated | Method for integrating silicon germanium and carbon doped silicon with source/drain regions in a strained CMOS process flow |
US20080283926A1 (en) * | 2007-05-18 | 2008-11-20 | Texas Instruments Incorporated | Method for integrating silicon germanium and carbon doped silicon within a strained cmos flow |
US7622344B2 (en) * | 2007-07-17 | 2009-11-24 | United Microelectronics Corp. | Method of manufacturing complementary metal oxide semiconductor transistors |
KR20090032843A (ko) * | 2007-09-28 | 2009-04-01 | 삼성전자주식회사 | 변형된 채널 에피층을 갖는 mos 트랜지스터, cmos트랜지스터 및 상기 트랜지스터들의 제조방법들 |
US7838372B2 (en) * | 2008-05-22 | 2010-11-23 | Infineon Technologies Ag | Methods of manufacturing semiconductor devices and structures thereof |
US8222132B2 (en) * | 2008-11-14 | 2012-07-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fabricating high-K/metal gate devices in a gate last process |
-
2005
- 2005-09-29 CN CNB2005100303113A patent/CN100442476C/zh active Active
- 2005-10-05 US US11/244,955 patent/US20070072376A1/en not_active Abandoned
-
2012
- 2012-03-06 US US13/413,122 patent/US20120164803A1/en not_active Abandoned
- 2012-12-17 US US13/716,533 patent/US9048300B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1218994A (zh) * | 1997-12-03 | 1999-06-09 | 松下电器产业株式会社 | 半导体装置 |
US6043545A (en) * | 1998-02-07 | 2000-03-28 | United Microelectronics Corp. | MOSFET device with two spacers |
US20050158931A1 (en) * | 2003-08-04 | 2005-07-21 | Huajie Chen | Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions |
US20050142768A1 (en) * | 2003-12-31 | 2005-06-30 | Nick Lindert | Controlled faceting of source/drain regions |
US20050179066A1 (en) * | 2004-02-17 | 2005-08-18 | Anand Murthy | Fabricating strained channel epitaxial source/drain transistors |
Also Published As
Publication number | Publication date |
---|---|
CN1941329A (zh) | 2007-04-04 |
US20070072376A1 (en) | 2007-03-29 |
US20120164803A1 (en) | 2012-06-28 |
US20130109142A1 (en) | 2013-05-02 |
US9048300B2 (en) | 2015-06-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN100442476C (zh) | 用于cmos技术的应变感应迁移率增强纳米器件及工艺 | |
US9698057B2 (en) | Method of manufacturing strained source/drain structures | |
US7208362B2 (en) | Transistor device containing carbon doped silicon in a recess next to MDD to create strain in channel | |
US9349831B2 (en) | Integrated circuit device with well controlled surface proximity and method of manufacturing same | |
US7892931B2 (en) | Use of a single mask during the formation of a transistor's drain extension and recessed strained epi regions | |
CN102292800B (zh) | 具有SiGe沟道的双高k氧化物 | |
US8482079B2 (en) | Semiconductor device and method of manufacturing the same | |
US7786518B2 (en) | Growth of unfaceted SiGe in MOS transistor fabrication | |
US8058120B2 (en) | Integration scheme for strained source/drain CMOS using oxide hard mask | |
US20070196992A1 (en) | In-situ doped silicon germanium and silicon carbide source drain region for strained silicon CMOS transistors | |
US20060024876A1 (en) | Methods, systems and structures for forming improved transistors | |
US7591659B2 (en) | Method and structure for second spacer formation for strained silicon MOS transistors | |
CN101364545B (zh) | 应变硅晶体管的锗硅和多晶硅栅极结构 | |
KR20060026447A (ko) | 회로 디바이스를 포함하는 장치 및 그 장치의 제조 방법 | |
CN102292811A (zh) | 具有外延成长的应力引发源极与漏极区的金氧半导体装置的制造方法 | |
US20090170270A1 (en) | Integration schemes to avoid faceted sige | |
US7557000B2 (en) | Etching method and structure using a hard mask for strained silicon MOS transistors | |
CN101226899A (zh) | 在硅凹陷中后续外延生长应变硅mos晶片管的方法和结构 | |
CN1937183A (zh) | 使用应变硅晶体管栅极图案化用硬掩模的方法和结构 | |
CN107919368A (zh) | 一种半导体器件及其制造方法、电子装置 | |
US20080283936A1 (en) | Silicon germanium flow with raised source/drain regions in the nmos | |
CN101192538A (zh) | 用于应变硅mos晶体管的使用硬掩模的刻蚀方法和结构 | |
CN102664164A (zh) | 用于应变硅mos晶体管的使用硬掩模的刻蚀方法和结构 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING Effective date: 20111129 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20111129 Address after: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Co-patentee after: Semiconductor Manufacturing International (Beijing) Corporation Patentee after: Semiconductor Manufacturing International (Shanghai) Corporation Address before: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Patentee before: Semiconductor Manufacturing International (Shanghai) Corporation |