WO2022172328A1 - 半導体装置 - Google Patents
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- WO2022172328A1 WO2022172328A1 PCT/JP2021/004782 JP2021004782W WO2022172328A1 WO 2022172328 A1 WO2022172328 A1 WO 2022172328A1 JP 2021004782 W JP2021004782 W JP 2021004782W WO 2022172328 A1 WO2022172328 A1 WO 2022172328A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 58
- 239000000758 substrate Substances 0.000 claims abstract description 30
- 238000001514 detection method Methods 0.000 claims description 13
- 239000010410 layer Substances 0.000 description 50
- 238000009792 diffusion process Methods 0.000 description 5
- 230000035945 sensitivity Effects 0.000 description 4
- 230000004043 responsiveness Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
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- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
- H01L29/7804—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode
- H01L29/7805—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode in antiparallel, e.g. freewheel diode
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7815—Vertical DMOS transistors, i.e. VDMOS transistors with voltage or current sensing structure, e.g. emulator section, overcurrent sensing cell
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8613—Mesa PN junction diodes
Definitions
- the present disclosure relates to semiconductor devices.
- RC-IGBTs reverse-conducting IGBTs
- a generally used RC-IGBT has a main region and a sense region having a smaller operating area than the main region (see, for example, Patent Document 1).
- a current and voltage in the main region are monitored by a sense element formed in the sense region to detect whether an abnormality has occurred in the main region.
- a p-type collector layer was formed on the back surface of the substrate in the sense region.
- the built-in voltage at which the backside pn junction consisting of the p-type collector layer and the n-type drift layer turns on cannot be exceeded, resulting in an increase in the on-voltage.
- the conductivity is modulated, and snapback occurs in which the ON voltage drops suddenly. Therefore, there is a problem that control is difficult.
- the present disclosure has been made to solve the problems described above, and its object is to obtain a semiconductor device that can prevent snapback and improve detection sensitivity.
- a semiconductor device includes: a semiconductor substrate having a main region; a sense region having an operation area smaller than that of the main region; an IGBT formed in the main region; and a sense element formed in the sense region.
- a MOSFET having a gate electrode connected to the gate electrode of the IGBT; a surface electrode formed on the surface of the semiconductor substrate in the main region; and formed on the back surface of the semiconductor substrate in the main region and the sense region. and a current detection electrode formed on the surface in the sense region and separated from the surface electrode.
- the present disclosure since there is no pn junction on the back surface of the substrate in the sense region, snapback due to conductivity modulation does not occur.
- the IGBT is formed in the main region and the MOSFET is formed in the sense region, the on-voltage is lower in the sense region in the low current region. Therefore, it is possible to improve the detection sensitivity of the sense element by increasing the turn-on responsiveness in the low current region.
- FIG. 1 is a plan view showing a semiconductor device according to a first embodiment
- FIG. 2 is a cross-sectional view showing the main region of the semiconductor device according to Embodiment 1
- FIG. 2 is a cross-sectional view showing a sense region of the semiconductor device according to Embodiment 1
- FIG. 11 is a cross-sectional view showing a main region of a semiconductor device according to a second embodiment
- FIG. 10 is a cross-sectional view showing a sense region of a semiconductor device according to a second embodiment
- FIG. 1 is a plan view showing a semiconductor device according to Embodiment 1.
- FIG. A semiconductor substrate 1 has a main region 2 and a sense region 3 having a smaller operating area than the main region 2 .
- a gate pad 4 , a surface electrode 5 and a current detection electrode 6 are formed on the surface of the semiconductor substrate 1 .
- a surface electrode 5 is formed in the main region 2 .
- a current detection electrode 6 is formed in the sense region 3 and separated from the surface electrode 5 .
- FIG. 2 is a cross-sectional view showing the main region of the semiconductor device according to Embodiment 1.
- FIG. An IGBT and a diode are formed in the main region 2 . Therefore, the semiconductor device according to this embodiment is an RC-IGBT.
- p-type base layer 10 is formed on n ⁇ -type drift layer 9 of semiconductor substrate 1 .
- An n + -type emitter layer 11 and a p + -type diffusion layer 12 are formed on the surface layer of the p-type base layer 10 .
- a trench 13 penetrating through the n + -type emitter layer 11 and the p-type base layer 10 is formed on the surface side of the semiconductor substrate 1 .
- a gate electrode 15 made of polysilicon or the like is formed inside the trench 13 with a gate oxide film 14 interposed therebetween.
- An interlayer insulating film 16 is formed on the gate electrode 15 .
- a p-type collector layer 17 is formed under the n ⁇ -type drift layer 9 .
- a p-type anode layer 18 is formed on the n ⁇ -type drift layer 9 in the diode.
- An n + -type cathode layer 19 is formed under the n ⁇ -type drift layer 9 .
- a surface electrode 5 is connected to the p-type base layer 10 , the n + -type emitter layer 11 , the p + -type diffusion layer 12 and the p-type anode layer 18 .
- a backside electrode 20 is formed on the backside of the semiconductor substrate 1 in the main region 2 and the sense region 3 and is connected to the p-type collector layer 17 and the n + -type cathode layer 19 .
- FIG. 3 is a cross-sectional view showing the sense region of the semiconductor device according to the first embodiment.
- a MOSFET is formed in the sense region 3 as a sense element.
- the MOSFET has a structure in which the p-type collector layer 17 of the IGBT in the main region 2 is replaced with an n + -type cathode layer 19 . That is, the IGBT has the p-type collector layer 17 on the back side of the semiconductor substrate 1 , but the MOSFET does not have the p-type collector layer 17 on the back side of the semiconductor substrate 1 . Therefore, the p-type collector layer 17 is not formed on the back side of the semiconductor substrate 1 in the sense region 3 .
- the n + -type emitter layer 11 serves as the source
- the n + -type cathode layer 19 serves as the drain.
- a gate electrode 15 of the MOSFET is connected to a gate electrode 15 of the IGBT.
- a current detection electrode 6 is connected to a p-type base layer 10, an n + -type emitter layer 11 and a p + -type diffusion layer 12 of the MOSFET.
- a backside electrode 20 is connected to the n + -type cathode layer 19 of the MOSFET.
- the configuration of the present disclosure can be applied to IGBTs that do not include diodes, but is particularly effective in RC-IGBTs.
- an n-type cathode layer is formed using a photomechanical technique. Therefore, when forming the n-type cathode layer of the diode in the main region, the n-type layer of the MOSFET in the sense region is formed. Thereby, the structure of this embodiment can be formed without adding a manufacturing process.
- the cross-sectional views disclosed in the present embodiment are merely examples, and the present disclosure is not limited to the illustrated structures.
- a diode with dummy trenches is illustrated, a diode without dummy trenches may be used.
- FIG. 4 is a cross-sectional view showing the main region of the semiconductor device according to the second embodiment.
- semiconductor substrate 1 has main region 2 and sense region 3 having a smaller operating area than main region 2 .
- a MOSFET is formed in the main region 2 .
- This MOSFET has a structure in which the p-type collector layer 17 of the IGBT in the main region 2 of the first embodiment is replaced with an n + -type cathode layer 19 .
- a surface electrode 5 is connected to a p-type base layer 10, an n + -type emitter layer 11 and a p + -type diffusion layer 12 of the MOSFET.
- a backside electrode 20 is connected to the n + -type cathode layer 19 of the MOSFET.
- FIG. 5 is a cross-sectional view showing the sense region of the semiconductor device according to the second embodiment.
- An IGBT is formed as a sense element in sense region 3 .
- This IGBT has the same structure as the IGBT of the main region 2 of the first embodiment.
- a gate electrode 15 of the IGBT in the sense region 3 is connected to a gate electrode 15 of the MOSFET in the main region 2 .
- a current detection electrode 6 is connected to a p-type base layer 10, an n + -type emitter layer 11 and a p + -type diffusion layer 12 of the IGBT.
- a current detection electrode 6 is formed in the sense region 3 and separated from the surface electrode 5 .
- a back electrode 20 is connected to the p-type collector layer 17 of the IGBT.
- the MOSFET is formed in the main region and the IGBT is formed in the sense region, the on-voltage is lower in the sense region than in the large current region. Therefore, it is possible to improve the detection sensitivity of the sense element by increasing the turn-on responsiveness in the large current region.
- the semiconductor substrate 1 is not limited to being made of silicon, and may be made of a wide bandgap semiconductor having a larger bandgap than silicon.
- Wide bandgap semiconductors are, for example, silicon carbide, gallium nitride-based materials, or diamond.
- a semiconductor device formed of such a wide bandgap semiconductor can be miniaturized because of its high withstand voltage and allowable current density.
- a semiconductor module incorporating this semiconductor device can also be miniaturized and highly integrated.
- the heat resistance of the semiconductor device is high, the radiation fins of the heat sink can be made smaller, and the water-cooled portion can be air-cooled, so that the semiconductor module can be further made smaller.
- the power loss of the semiconductor device is low and the efficiency is high, the efficiency of the semiconductor module can be improved.
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Abstract
Description
図1は、実施の形態1に係る半導体装置を示す平面図である。半導体基板1は、メイン領域2と、メイン領域2よりも動作領域面積が小さいセンス領域3とを有する。ゲートパッド4、表面電極5及び電流検出用電極6が半導体基板1の表面に形成されている。表面電極5はメイン領域2に形成されている。電流検出用電極6はセンス領域3に形成され、表面電極5から分離されている。
図4は、実施の形態2に係る半導体装置のメイン領域を示す断面図である。実施の形態1と同様に、半導体基板1は、メイン領域2と、メイン領域2よりも動作領域面積が小さいセンス領域3とを有する。
Claims (5)
- メイン領域と、前記メイン領域よりも動作領域面積が小さいセンス領域とを有する半導体基板と、
前記メイン領域に形成されたIGBTと、
前記センス領域にセンス素子として形成され、前記IGBTのゲート電極と接続されたゲート電極を持つMOSFETと、
前記メイン領域において前記半導体基板の表面に形成された表面電極と、
前記メイン領域及び前記センス領域において前記半導体基板の裏面に形成された裏面電極と、
前記センス領域において前記表面に形成され、前記表面電極から分離された電流検出用電極とを備えることを特徴とする半導体装置。 - 前記メイン領域に形成されたダイオードを更に備えることを特徴とする請求項1に記載の半導体装置。
- メイン領域と、前記メイン領域よりも動作領域面積が小さいセンス領域とを有する半導体基板と、
前記メイン領域に形成されたMOSFETと、
前記センス領域にセンス素子として形成され、前記MOSFETのゲートと接続されたゲートを持つIGBTと、
前記メイン領域において前記半導体基板の表面に形成された表面電極と、
前記メイン領域及び前記センス領域において前記半導体基板の裏面に形成された裏面電極と、
前記センス領域において前記表面に形成され、前記表面電極から分離された電流検出用電極とを備えることを特徴とする半導体装置。 - 前記IGBTは前記半導体基板の裏面側にp型コレクタ層を有し、
前記MOSFETは前記半導体基板の裏面側にp型コレクタ層を有しないことを特徴とする請求項1~3の何れか1項に記載の半導体装置。 - 前記半導体基板はワイドバンドギャップ半導体によって形成されていることを特徴とする請求項1~4の何れか1項に記載の半導体装置。
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JP2022581050A JPWO2022172328A1 (ja) | 2021-02-09 | 2021-02-09 | |
US18/040,953 US20230268429A1 (en) | 2021-02-09 | 2021-02-09 | Semiconductor device |
CN202180093025.9A CN116830275A (zh) | 2021-02-09 | 2021-02-09 | 半导体装置 |
PCT/JP2021/004782 WO2022172328A1 (ja) | 2021-02-09 | 2021-02-09 | 半導体装置 |
DE112021007052.5T DE112021007052T5 (de) | 2021-02-09 | 2021-02-09 | Halbleitervorrichtung |
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Citations (3)
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JP2012199385A (ja) * | 2011-03-22 | 2012-10-18 | Toyota Motor Corp | 半導体装置と制御手段とを備えるシステム、及び、半導体装置を流れる電流の制御方法 |
JP2015164159A (ja) * | 2014-02-28 | 2015-09-10 | トヨタ自動車株式会社 | 半導体装置 |
JP2020170827A (ja) * | 2019-04-05 | 2020-10-15 | 株式会社デンソー | 半導体装置 |
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- 2021-02-09 US US18/040,953 patent/US20230268429A1/en active Pending
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- 2021-02-09 WO PCT/JP2021/004782 patent/WO2022172328A1/ja active Application Filing
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Patent Citations (3)
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JP2012199385A (ja) * | 2011-03-22 | 2012-10-18 | Toyota Motor Corp | 半導体装置と制御手段とを備えるシステム、及び、半導体装置を流れる電流の制御方法 |
JP2015164159A (ja) * | 2014-02-28 | 2015-09-10 | トヨタ自動車株式会社 | 半導体装置 |
JP2020170827A (ja) * | 2019-04-05 | 2020-10-15 | 株式会社デンソー | 半導体装置 |
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