CN116830275A - 半导体装置 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 66
- 239000000758 substrate Substances 0.000 claims abstract description 30
- 238000001514 detection method Methods 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 50
- 238000009792 diffusion process Methods 0.000 description 5
- 230000035945 sensitivity Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
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- 238000000034 method Methods 0.000 description 1
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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Abstract
半导体基板(1)具有主区域(2)和与主区域(2)相比工作区域面积小的感测区域(3)。IGBT形成于主区域(2)。MOSFET是在感测区域(3)作为感测元件而形成的,具有与IGBT的栅极电极(15)连接的栅极电极(15)。表面电极(5)在主区域(2)形成于半导体基板(1)的表面。背面电极(20)在主区域(2)及感测区域(3)形成于半导体基板(1)的背面。电流检测用电极(6)在感测区域(3)形成于表面,与表面电极(5)分离。
Description
技术领域
本发明涉及半导体装置。
背景技术
逆变器装置中使用反向导通型IGBT(RC-IGBT:ReverseConducting IGBT)等半导体装置。通常所使用的RC-IGBT具有主区域和与主区域相比工作区域面积小的感测区域(例如,参照专利文献1)。通过在感测区域形成的感测元件对主区域的电流及电压进行监视,由此对是否在主区域产生了异常进行检测。
专利文献1:日本特开2009-99690号公报
发明内容
就以往的RC-IGBT而言,在感测区域,在基板背面形成有p型集电极层。在低电流区域,无法超过由p型集电极层和n型漂移层构成的背面pn结接通的内建电压,接通电压变高。在电流变大而超过内建电压的瞬间,从p型集电极层注入空穴,对导电率进行调制,产生接通电压迅速地降低的骤回。因此,存在难以进行控制的问题。
本发明就是为了解决上述这样的课题而提出的,其目的在于得到能够防止骤回且提高检测灵敏度的半导体装置。
本发明涉及的半导体装置的特征在于,具有:半导体基板,其具有主区域和与所述主区域相比工作区域面积小的感测区域;IGBT,其形成于所述主区域;MOSFET,其是在所述感测区域作为感测元件而形成的,具有与所述IGBT的栅极电极连接的栅极电极;表面电极,其在所述主区域形成于所述半导体基板的表面;背面电极,其在所述主区域及所述感测区域形成于所述半导体基板的背面;以及电流检测用电极,其在所述感测区域形成于所述表面,与所述表面电极分离。
发明的效果
在本发明中,在感测区域,在基板背面不存在pn结,因此不会产生由导电率调制引起的骤回。另外,在主区域形成有IGBT,在感测区域形成有MOSFET,因此,在低电流区域,感测区域成为低接通电压。因此,能够提高低电流区域中的导通时的响应性,提高感测元件的检测灵敏度。
附图说明
图1是表示实施方式1涉及的半导体装置的俯视图。
图2是表示实施方式1涉及的半导体装置的主区域的剖视图。
图3是表示实施方式1涉及的半导体装置的感测区域的剖视图。
图4是表示实施方式2涉及的半导体装置的主区域的剖视图。
图5是表示实施方式2涉及的半导体装置的感测区域的剖视图。
具体实施方式
参照附图对实施方式涉及的半导体装置进行说明。对相同或相应的结构要素标注相同的标号,有时省略重复说明。
实施方式1
图1是表示实施方式1涉及的半导体装置的俯视图。半导体基板1具有主区域2和与主区域2相比工作区域面积小的感测区域3。栅极焊盘4、表面电极5及电流检测用电极6形成于半导体基板1的表面。表面电极5形成于主区域2。电流检测用电极6形成于感测区域3,与表面电极5分离。
图2是表示实施方式1涉及的半导体装置的主区域的剖视图。在主区域2形成有IGBT和二极管。因此,本实施方式涉及的半导体装置是RC-IGBT。
在IGBT,在半导体基板1的n-型漂移层9之上形成有p型基极层10。在p型基极层10的表层形成有n+型发射极层11和p+型扩散层12。将n+型发射极层11和p型基极层10贯通的沟槽13形成于半导体基板1的表面侧。在沟槽13的内部隔着栅极氧化膜14而形成有多晶硅等的栅极电极15。在栅极电极15之上形成有层间绝缘膜16。在n-型漂移层9之下形成有p型集电极层17。
在二极管处,在n-型漂移层9之上形成有p型阳极层18。在n-型漂移层9之下形成有n+型阴极层19。
表面电极5与p型基极层10、n+型发射极层11、p+型扩散层12及p型阳极层18连接。背面电极20在主区域2及感测区域3形成于半导体基板1的背面,与p型集电极层17及n+型阴极层19连接。
图3是表示实施方式1涉及的半导体装置的感测区域的剖视图。在感测区域3作为感测元件而形成有MOSFET。MOSFET具有将主区域2的IGBT的p型集电极层17置换为n+型阴极层19的构造。即,IGBT在半导体基板1的背面侧具有p型集电极层17,但MOSFET在半导体基板1的背面侧不具有p型集电极层17。因此,在感测区域3,在半导体基板1的背面侧未形成p型集电极层17。在MOSFET,n+型发射极层11成为源极,n+型阴极层19成为漏极。
MOSFET的栅极电极15与IGBT的栅极电极15连接。电流检测用电极6与MOSFET的p型基极层10、n+型发射极层11及p+型扩散层12连接。背面电极20与MOSFET的n+型阴极层19连接。
在本实施方式中,在感测区域3,在基板背面不存在pn结,因此不会产生由导电率调制引起的骤回。另外,在主区域形成有IGBT,在感测区域形成有MOSFET,因此在低电流区域,感测区域成为低接通电压。因此,能够提高低电流区域中的导通时的响应性,提高感测元件的检测灵敏度。
另外,以往,在主区域在基板背面形成有n型阴极层的RC-IGBT容易产生骤回。因此,本发明的结构也能够应用于不包含二极管的IGBT,但对RC-IGBT特别有效。另外,在制作RC-IGBT时,通常在整个背面形成了p型集电极层之后使用照相制版技术形成n型阴极层。因此,在形成主区域的二极管的n型阴极层时形成感测区域的MOSFET的n型层。由此,不追加制造工序就能够形成本实施方式的构造。
此外,在本实施方式中公开的剖视图只是一个例子,本发明不限于图示的构造。例如,图示了具有哑沟槽的二极管,但也可以使用不具有哑沟槽的二极管。
实施方式2
图4是表示实施方式2涉及的半导体装置的主区域的剖视图。与实施方式1同样地,半导体基板1具有主区域2和与主区域2相比工作区域面积小的感测区域3。
在主区域2形成有MOSFET。该MOSFET具有将实施方式1的主区域2的IGBT的p型集电极层17置换为n+型阴极层19的构造。表面电极5与MOSFET的p型基极层10、n+型发射极层11及p+型扩散层12连接。背面电极20与MOSFET的n+型阴极层19连接。
图5是表示实施方式2涉及的半导体装置的感测区域的剖视图。在感测区域3作为感测元件而形成有IGBT。该IGBT具有与实施方式1的主区域2的IGBT相同的构造。感测区域3的IGBT的栅极电极15与主区域2的MOSFET的栅极电极15连接。电流检测用电极6与IGBT的p型基极层10、n+型发射极层11及p+型扩散层12连接。电流检测用电极6形成于感测区域3,与表面电极5分离。背面电极20与IGBT的p型集电极层17连接。
在本实施方式中,在主区域形成有MOSFET,在感测区域形成有IGBT,因此,在大电流区域,感测区域成为低接通电压。因此,能够提高大电流区域中的导通时的响应性,提高感测元件的检测灵敏度。
此外,半导体基板1不限于由硅形成,也可以由与硅相比带隙大的宽带隙半导体形成。宽带隙半导体例如是碳化硅、氮化镓类材料或金刚石。由这样的宽带隙半导体形成的半导体装置由于耐电压性及容许电流密度高,因此能够小型化。通过使用该小型化的半导体装置,从而组装了该半导体装置的半导体模块也能够小型化、高集成化。另外,由于半导体装置的耐热性高,因此能够使散热器的散热鳍片小型化,能够使水冷部空冷化,因而能够使半导体模块进一步小型化。另外,由于半导体装置的电力损耗低且高效,因此能够使半导体模块高效化。
标号的说明
1半导体基板,2主区域,3感测区域,5表面电极,6电流检测用电极,15栅极电极,17p型集电极层,20背面电极
Claims (5)
1.一种半导体装置,其特征在于,具有:
半导体基板,其具有主区域和与所述主区域相比工作区域面积小的感测区域;
IGBT,其形成于所述主区域;
MOSFET,其是在所述感测区域作为感测元件而形成的,具有与所述IGBT的栅极电极连接的栅极电极;
表面电极,其在所述主区域形成于所述半导体基板的表面;
背面电极,其在所述主区域及所述感测区域形成于所述半导体基板的背面;以及
电流检测用电极,其在所述感测区域形成于所述表面,与所述表面电极分离。
2.根据权利要求1所述的半导体装置,其特征在于,
还具有在所述主区域形成的二极管。
3.一种半导体装置,其特征在于,具有:
半导体基板,其具有主区域和与所述主区域相比工作区域面积小的感测区域;
MOSFET,其形成于所述主区域;
IGBT,其是在所述感测区域作为感测元件而形成的,具有与所述MOSFET的栅极连接的栅极;
表面电极,其在所述主区域形成于所述半导体基板的表面;
背面电极,其在所述主区域及所述感测区域形成于所述半导体基板的背面;以及
电流检测用电极,其在所述感测区域形成于所述表面,与所述表面电极分离。
4.根据权利要求1至3中任一项所述的半导体装置,其特征在于,
所述IGBT在所述半导体基板的背面侧具有p型集电极层,
所述MOSFET在所述半导体基板的背面侧具有p型集电极层。
5.根据权利要求1至4中任一项所述的半导体装置,其特征在于,
所述半导体基板由宽带隙半导体形成。
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