WO2013190765A1 - ハードマスク及びハードマスクの製造方法 - Google Patents
ハードマスク及びハードマスクの製造方法 Download PDFInfo
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- WO2013190765A1 WO2013190765A1 PCT/JP2013/003012 JP2013003012W WO2013190765A1 WO 2013190765 A1 WO2013190765 A1 WO 2013190765A1 JP 2013003012 W JP2013003012 W JP 2013003012W WO 2013190765 A1 WO2013190765 A1 WO 2013190765A1
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- film
- hard mask
- target
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- processing chamber
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- 238000000034 method Methods 0.000 title description 11
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims abstract description 35
- 238000004544 sputter deposition Methods 0.000 claims description 31
- 239000007789 gas Substances 0.000 claims description 27
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 23
- 229910001873 dinitrogen Inorganic materials 0.000 claims description 17
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 15
- 239000010936 titanium Substances 0.000 claims description 15
- 229910052719 titanium Inorganic materials 0.000 claims description 14
- 238000004519 manufacturing process Methods 0.000 claims description 13
- 238000005546 reactive sputtering Methods 0.000 claims description 12
- 238000005530 etching Methods 0.000 abstract description 15
- 239000010410 layer Substances 0.000 description 63
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 22
- 239000000758 substrate Substances 0.000 description 14
- 229910052786 argon Inorganic materials 0.000 description 11
- 230000015572 biosynthetic process Effects 0.000 description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- 239000011229 interlayer Substances 0.000 description 5
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 238000000560 X-ray reflectometry Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 125000004433 nitrogen atom Chemical group N* 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000007733 ion plating Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/0021—Reactive sputtering or evaporation
- C23C14/0036—Reactive sputtering
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/0641—Nitrides
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/3492—Variation of parameters during sputtering
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/54—Controlling or regulating the coating process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0335—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
Definitions
- the present invention relates to a hard mask and a method of manufacturing a hard mask, and more particularly to a method used to limit a processing range of a processing target in a manufacturing process of a semiconductor device.
- This type of hard mask is used, for example, to limit the etching range when an interlayer insulating film as a processing object is dry-etched in order to obtain a predetermined wiring pattern in a manufacturing process of a semiconductor device.
- a hard mask one composed of a single layer of a titanium nitride film, a titanium film, a tantalum film or a tantalum nitride film is generally known (for example, see Patent Document 1). Since the hard mask for such use requires etching resistance, it is desirable that the film density is high. On the other hand, when the film stress is high, when the interlayer insulating film is dry-etched, the etching shape changes entirely or locally, and consequently the wiring pattern is deformed. Therefore, the film stress is as low as possible. Is desirable.
- the film constituting the hard mask is formed by sputtering (or reactive sputtering) in which nitrogen gas is introduced as necessary using a target made of titanium or tantalum in consideration of, for example, mass productivity.
- sputtering or reactive sputtering
- nitrogen gas is introduced as necessary using a target made of titanium or tantalum in consideration of, for example, mass productivity.
- a titanium nitride film is formed by reactive sputtering will be described as an example.
- Sputtering conditions input power, nitrogen, etc.
- the film stress becomes about 1000 MPa.
- the sputtering conditions input power, nitrogen gas introduction amount, exhaust speed, etc.
- the titanium nitride film has low stress, for example, ⁇ 100 MPa or more
- a film density that exhibits etching resistance can be obtained. Absent.
- a titanium nitride film with low film stress can be obtained while having a film density that exhibits etching resistance if it has a two-layer structure with an upper layer of titanium nitride that also has high film stress. .
- an object of the present invention is to provide a hard mask having a low film stress and a manufacturing method of the hard mask while having a film density that exhibits etching resistance.
- the hard mask of the present invention provided to limit the processing range on the surface of the processing object when performing a predetermined processing on the processing object is composed of a titanium nitride film.
- the titanium nitride film has a two-layer structure, and the lower layer has a thickness in the range of 5 to 50% of the total thickness of the hard mask, and in the range of 3.5 g / cm 3 to 4.7 g / cm 3 .
- the upper layer has a film density in the range of 4.8 g / cm 3 to 5.3 g / cm 3 .
- the lower layer made of titanium nitride having a film density in the range of 3.5 g / cm 3 to 4.7 g / cm 3 is first provided on the object to be treated.
- the presence of titanium and nitrogen atoms in the distance makes the film stress close to zero.
- An upper layer having a film density in the range of 4.8 g / cm 3 to 5.3 g / cm 3 is provided on the surface of the lower layer.
- the upper layer has a narrow interatomic distance between titanium and nitrogen and high film stress, but because the upper layer is formed on the surface of the lower layer, when the upper layer has an appropriate interatomic distance, the lower layer Absorbs the upper layer. As a result, the film stress is reduced and does not affect the object to be processed.
- the object to be processed is a silicon wafer or an interlayer insulating film, these do not warp.
- the film density of the lower layer is out of the above range, the stress is not sufficiently relaxed.
- the film density of the upper layer is out of the above range, a film density sufficient as a mask cannot be obtained. There is a problem that.
- the method of manufacturing a hard mask according to the present invention evacuates a vacuum processing chamber in which a titanium target and an object to be processed are arranged, and the vacuum processing chamber has a pressure of 0.5 to 30 Pa.
- a rare gas and a nitrogen gas are introduced so that the pressure is within a range, the target is powered on, a plasma atmosphere is formed in the vacuum processing chamber, the target is sputtered, and the lower layer is formed on the surface of the object to be processed by reactive sputtering.
- the vacuum processing chamber in which the first step of forming a film and the target made of titanium and the processing target on which the lower layer is formed is evacuated, and the vacuum processing chamber is 0.02 to A rare gas and a nitrogen gas are introduced so that the pressure becomes 0.9 times, and a plasma atmosphere is formed in the vacuum processing chamber by applying a power equal to or higher than the power input in the first process to the target.
- the input power per unit area to the target in the first step is set to 0.5 to 5.0 W / cm 2, and the rare gas and the pressure so that the pressure in the second step is equal to or lower than the pressure in the first step.
- Nitrogen gas may be introduced and the power input to the target may be 1.1 to 4.0 times that of the first step. Note that if the input power in the first step is lower than 0.5 W / cm 2 , productivity cannot be obtained, while if it exceeds 5.0 W / cm 2 , the stress is not sufficiently relieved. There is a bug.
- it is preferable that the first step and the second step are continuously performed in the same vacuum processing chamber.
- the typical sectional view of the hard mask of the present invention The schematic diagram explaining the structural example of the apparatus of sputtering used for manufacture of the hard mask of this invention.
- the graph which shows the relationship between the film stress and film density of a titanium nitride film.
- substrate W a silicon wafer
- a hard mask is formed on the silicon substrate.
- HD is a hard mask formed on the surface of the substrate W.
- the hard mask HD has a two-layer structure in which titanium nitride films L1 and L2 formed by reactive sputtering are continuously stacked in the same vacuum processing chamber.
- the lower layer L1 has a film thickness h1 in the range of 5 to 50% of the total film thickness ht of the hard mask HD, and has a film density in the range of 3.5 g / cm 3 to 4.7 g / cm 3. .
- the cathode unit C is composed of a target 2 and a magnet unit 3 arranged above the target 2.
- the target 2 is made of titanium (for example, containing titanium and inevitable elements), and is formed in a circular shape in plan view by a known method according to the contour of the substrate W.
- a backing plate 21 that cools the target 2 during film formation by sputtering is attached to the upper surface of the target 2 (the surface opposite to the sputtering surface 2a), and an insulator (not shown) is placed with the sputtering surface 2a facing down. And is attached to the vacuum chamber 1.
- the target 2 is also connected to an output from a sputtering power source E such as a DC power source, and direct current power (30 kW or less) having a negative potential is applied to the target 2 during film formation.
- a sputtering power source E such as a DC power source
- direct current power (30 kW or less) having a negative potential is applied to the target 2 during film formation.
- the magnet unit 3 disposed above the target 2 generates a magnetic field in the space below the sputtering surface 2a of the target 2, captures electrons etc. ionized below the sputtering surface 2a during sputtering, and sputters from the target 2 It has a known structure for efficiently ionizing particles, and detailed description thereof is omitted here.
- the stage 4 is disposed at the bottom of the vacuum chamber 1 so as to face the sputtering surface 2a of the target 2, and the substrate W is positioned and held with its film-forming surface facing upward.
- the distance between the target 2 and the substrate W is set in a range of 45 to 100 mm in consideration of productivity, the number of scattering times, and the like.
- a first gas pipe 5 a for introducing a sputtering gas which is a rare gas such as argon and a second gas pipe 5 b for introducing a reactive gas which is a nitrogen gas are connected to the side wall of the vacuum chamber 1.
- Mass flow controllers 51 and 51 are provided in the first and second gas pipes 5a and 5b, respectively, and communicate with a gas source (not shown). Thereby, the sputter gas and the reaction gas whose flow rates are controlled can be introduced into the vacuum processing chamber 1a which is evacuated at a constant exhaust speed by a vacuum exhaust means described later, and the pressure ( The total pressure) is kept substantially constant.
- an exhaust pipe 6 is connected to a vacuum exhaust device (not shown) such as a turbo molecular pump or a rotary pump.
- a vacuum exhaust device such as a turbo molecular pump or a rotary pump.
- the sputtering apparatus SM has known control means including a microcomputer, a sequencer, and the like, and the control means operates the power source E, the mass flow controllers 51 and 51, and the vacuum exhaust apparatus. It is supposed to manage and manage.
- a method for manufacturing the hard mask HD using the sputtering apparatus SM will be specifically described.
- the vacuum evacuation means is operated to cause the inside of the vacuum processing chamber 1a to have a predetermined degree of vacuum (for example, 10 ⁇ 5 Pa).
- a predetermined degree of vacuum for example, 10 ⁇ 5 Pa.
- the mass flow controllers 51 and 51 are respectively controlled to introduce argon gas and nitrogen gas at a predetermined flow rate.
- the flow rates of argon gas and nitrogen gas are controlled so that the vacuum processing chamber 1a has a pressure (total pressure) in the range of 0.5 to 30.0 Pa. If the pressure in the vacuum processing chamber 1a is out of the above range, there is a problem that the stress is not sufficiently relieved.
- the flow rate ratio of argon gas to nitrogen gas is equal or the flow rate of argon gas is in the range of 1.1 to 1.5 times. To increase the number.
- the flow rate of the argon gas is increased in the above range, a large amount of titanium element is contained per unit volume, and the film stress can be further reduced.
- the sputtering time is set so that the film thickness h1 is in the range of 5 to 50% of the total film thickness ht of the hard mask HD. If the film thickness h1 is out of the range of 5 to 50% of the total film thickness ht of the hard mask HD, the film stress cannot be reduced effectively. Further, the input power per unit area to the target 2 is set to 0.5 to 5.0 W / cm 2 .
- the mass flow controllers 51 and 51 are controlled to reduce the flow rates of the argon gas and the nitrogen gas, respectively, and the pressure (total pressure) in the vacuum processing chamber 1a is increased.
- the total pressure is 0.02 to 0.9 times that in one process.
- This operation is continuously performed from the end of the film formation of the lower layer L1, but after the power supply to the target 2 is stopped and the gas introduction is stopped, the vacuum processing chamber 1a is evacuated to a predetermined pressure. You may do it.
- the pressure in the second step is out of the above range, there is a problem that a film density sufficient as a mask cannot be obtained.
- the output of the power source E is adjusted so that the input power per unit area to the target 2 is higher than or equal to the input power set in the first step.
- the titanium nitride film of the upper layer L2 is formed on the surface of the lower layer L1 by reactive sputtering (second step).
- the sputtering time is set so that the film thickness h2 reaches the entire film thickness ht of the hard mask HD.
- the titanium nitride film having a two-layer structure is formed as described above, the titanium nitride film is locally etched and patterned in accordance with the range to be limited. Since a known process such as a lithography process can be used for this, a detailed description is omitted here.
- the hard mask HD may be manufactured as follows. That is, as described above, the flow rates of the argon gas and the nitrogen gas are controlled so that the vacuum processing chamber 1a has a pressure (total pressure) in the range of 0.5 to 30.0 Pa. A plasma atmosphere is formed in the vacuum chamber 2 by applying electric power so as to be 5 to 5.0 W / cm 2 . Thereby, the titanium nitride film of the lower layer L1 is formed on the surface of the substrate W by reactive sputtering (first step). In this case, the sputtering time is set so that the film thickness h1 is in the range of 5 to 50% of the total film thickness ht of the hard mask HD. If the film thickness h1 is out of the range of 5 to 50% of the total film thickness ht of the hard mask HD, the film stress cannot be reduced effectively.
- the mass flow controllers 51 and 51 are controlled to adjust the flow rates of argon gas and nitrogen gas, respectively, and the pressure (total pressure) in the vacuum processing chamber 1a is The total pressure should be equal to or lower than that in the first step.
- This operation is continuously performed from the end of the film formation of the lower layer L1, but after the power supply to the target 2 is stopped and the gas introduction is stopped, the vacuum processing chamber 1a is evacuated to a predetermined pressure. You may do it.
- the output of the sputtering power source E is changed so that the input power per unit area to the target 2 is 1.1 to 4.0 times that of the first step.
- the titanium nitride film of the upper layer L2 is formed on the surface of the lower layer L1 by reactive sputtering (second step).
- the sputtering time is set so that the film thickness h2 reaches the entire film thickness ht of the hard mask HD.
- the hard mask HD composed of the two-layered titanium nitride films L1 and L2 having low film stress while having a film density that exhibits etching resistance can be formed with high productivity.
- the substrate W is first provided with the lower layer L1 made of titanium nitride having a film density in the range of 3.5 g / cm 3 to 4.7 g / cm 3
- the lower layer L1 is relatively The presence of titanium and nitrogen atoms at a stable interatomic distance makes the film stress close to zero.
- An upper layer L2 having a film density in the range of 4.8 g / cm 3 to 5.3 g / cm 3 is provided on the surface of the lower layer L1.
- the upper layer L2 has a narrow interatomic distance between titanium and nitrogen and a high film stress. However, when the upper layer L2 is formed on the surface of the lower layer L1, the upper layer L2 has a lower interatomic distance.
- the side layer L1 absorbs the extension of the upper layer L2. In this case, film stress is reduced and the substrate W is not affected. As a result, the film stress can be greatly reduced (or the film stress direction is reversed from the tensile stress or the compressive stress to the other), and the lower layer L1 having a relatively low film density is formed on the hard mask HD. Since the upper layer L2 having a relatively high film density is formed by the remaining film thickness, the total thickness of the titanium nitride films L1 and L2 is limited. As the film density, the etching resistance can be exhibited. Note that the film density may be obtained using XRR (X-ray reflectivity method) or the like. The film stress is measured using a known measuring device.
- the following experiment was performed using the sputtering apparatus SM having the above configuration.
- a silicon wafer was used as the substrate W, and a titanium nitride film having a two-layer structure was formed on the surface of the substrate W.
- the target 2 made of titanium was used, and the distance between the target 2 and the substrate W was set to 60 mm.
- the flow rates of argon gas and nitrogen gas were 200 sccm, respectively, and the pressure (total pressure) in the vacuum processing chamber 1a was maintained at about 1.4 Pa.
- the input power to the target 2 was set to 7 kW, and the film formation time was set to 9 seconds (the film thickness of the lower layer L1 was about 5 nm).
- the flow rates of argon gas and nitrogen gas were set to 60 sccm, respectively, and the pressure (total pressure) in the vacuum processing chamber 1a was maintained at about 0.4 Pa.
- the input power to the target 2 was set to 7 kW, and the film formation time was set to 30 seconds (the film thickness of the lower layer L1 was about 28 nm). According to this, it was confirmed that a titanium nitride film having a film stress of +10 MPa (tensile stress) and a film density of 4.85 g / cm 3 was formed.
- the present invention is not limited to the above.
- the lower layer L1 and the upper layer L2 are continuously formed in the same vacuum processing chamber 1a as an example, but the lower layer L1 and the upper layer L2 are different sputtering apparatuses. You may make it form into a film separately using.
- the case where the hard mask HD is formed by the sputtering apparatus SM has been described as an example.
- the titanium nitride layer having the predetermined film density can be formed, for example, ion plating is used.
- An apparatus or a vapor deposition apparatus can be used.
- a silicon wafer is taken as an example of a processing object, but the present invention can be applied to a case where it is formed on the surface of an interlayer insulating film, for example.
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- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Inorganic Chemistry (AREA)
- Physical Vapour Deposition (AREA)
- Drying Of Semiconductors (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (4)
- 処理対象物に対して所定の処理を施す際に、処理対象物表面への処理範囲を制限するために設けられるハードマスクであって、窒化チタン膜で構成されるものにおいて、
窒化チタン膜を二層構造とし、下側層が、ハードマスクの全膜厚の5~50%の範囲内の膜厚を有すると共に3.5g/cm3~4.7g/cm3の範囲内の膜密度を有し、上側層が4.8g/cm3~5.3g/cm3の範囲内の膜密度を有することを特徴とするハードマスク。 - 請求項1記載のハードマスクの製造方法であって、
チタン製のターゲットと処理対象物とを配置した真空処理室を真空引きし、真空処理室内が0.5~30Paの範囲の圧力となるように希ガスと窒素ガスとを導入し、ターゲットに電力投入して真空処理室内にプラズマ雰囲気を形成し、ターゲットをスパッタリングして反応性スパッタリングにより処理対象物表面に下側層を成膜する第1工程と、
チタン製のターゲットと下側層が成膜された処理対象物とを配置した真空処理室を真空引きし、真空処理室内が第1工程時より0.02~0.9倍の圧力となるように希ガスと窒素ガスとを導入し、ターゲットに、第1工程時の投入電力と同等以上の電力を投入して真空処理室内にプラズマ雰囲気を形成し、ターゲットをスパッタリングして反応性スパッタリングにより下側層表面に上側層を成膜する第2工程と、を含むことを特徴とするハードマスクの製造方法。 - 第1工程でのターゲットへの単位面積当たりの投入電力を0.5~5.0W/cm2とし、第2工程で、第1工程時の圧力と同等以下の圧力となるように希ガスと窒素ガスとを導入し、ターゲットへの投入電力を、第1工程の1.1~4.0倍としたことを特徴とする請求項2記載のハードマスクの製造方法。
- 第1工程と第2工程とを同一の真空処理室内で連続して行うことを特徴とする請求項2または請求項3記載のハードマスクの製造方法。
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JP2014520883A JP5901762B2 (ja) | 2012-06-22 | 2013-05-10 | ハードマスクの製造方法 |
KR1020147034769A KR101599038B1 (ko) | 2012-06-22 | 2013-05-10 | 하드마스크 및 하드마스크의 제조방법 |
US14/397,975 US20150107769A1 (en) | 2012-06-22 | 2013-05-10 | Hard mask and method of manufacturing the same |
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JP2012141440 | 2012-06-22 | ||
JP2012-141440 | 2012-06-22 |
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WO2013190765A1 true WO2013190765A1 (ja) | 2013-12-27 |
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PCT/JP2013/003012 WO2013190765A1 (ja) | 2012-06-22 | 2013-05-10 | ハードマスク及びハードマスクの製造方法 |
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US (1) | US20150107769A1 (ja) |
JP (1) | JP5901762B2 (ja) |
KR (1) | KR101599038B1 (ja) |
TW (1) | TWI575327B (ja) |
WO (1) | WO2013190765A1 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2018055878A1 (ja) * | 2016-09-26 | 2018-03-29 | 株式会社Screenホールディングス | 成膜方法および成膜装置 |
KR20180086238A (ko) | 2016-05-16 | 2018-07-30 | 가부시키가이샤 아루박 | 내부 응력 제어막의 형성 방법 |
KR20210060404A (ko) * | 2014-02-13 | 2021-05-26 | 가부시키가이샤 알박 | 하드 마스크 형성 방법 및 하드 마스크 형성 장치 |
JP7523553B2 (ja) | 2021-10-21 | 2024-07-26 | 株式会社日立ハイテク | エッチング方法およびエッチング装置 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104810228B (zh) * | 2014-01-23 | 2017-10-13 | 北京北方华创微电子装备有限公司 | 螺旋形磁控管及磁控溅射设备 |
US9257298B2 (en) | 2014-03-28 | 2016-02-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Systems and methods for in situ maintenance of a thin hardmask during an etch process |
KR102402639B1 (ko) | 2017-11-24 | 2022-05-26 | 삼성전자주식회사 | 전자 장치 및 그의 통신 방법 |
US20240222138A1 (en) * | 2021-10-21 | 2024-07-04 | Hitachi High-Tech Corporation | Etching method and etching apparatus |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04286112A (ja) * | 1991-03-15 | 1992-10-12 | Fujitsu Ltd | スパッタリングに関わる半導体装置の製造方法 |
JPH05121358A (ja) * | 1991-10-28 | 1993-05-18 | Matsushita Electron Corp | 高融点金属膜の製造方法 |
JPH06240450A (ja) * | 1993-02-16 | 1994-08-30 | Kobe Steel Ltd | 耐食性及び密着性に優れた窒化チタン皮膜並びにその形成方法 |
JPH08162531A (ja) * | 1994-12-05 | 1996-06-21 | Sony Corp | 配線形成方法 |
JPH10230558A (ja) * | 1996-12-17 | 1998-09-02 | Asahi Glass Co Ltd | 光吸収性反射防止膜付き有機基体とその製造方法 |
JPH1131669A (ja) * | 1997-07-10 | 1999-02-02 | Fujitsu Ltd | 半導体装置の製造方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW413884B (en) * | 1999-04-07 | 2000-12-01 | United Microelectronics Corp | Metal plug or metal via structure and manufacturing method thereof |
JP2011061041A (ja) | 2009-09-10 | 2011-03-24 | Panasonic Corp | 半導体装置の製造方法 |
US8614144B2 (en) * | 2011-06-10 | 2013-12-24 | Kabushiki Kaisha Toshiba | Method for fabrication of interconnect structure with improved alignment for semiconductor devices |
-
2013
- 2013-05-10 WO PCT/JP2013/003012 patent/WO2013190765A1/ja active Application Filing
- 2013-05-10 JP JP2014520883A patent/JP5901762B2/ja active Active
- 2013-05-10 US US14/397,975 patent/US20150107769A1/en not_active Abandoned
- 2013-05-10 KR KR1020147034769A patent/KR101599038B1/ko active IP Right Grant
- 2013-05-24 TW TW102118400A patent/TWI575327B/zh active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04286112A (ja) * | 1991-03-15 | 1992-10-12 | Fujitsu Ltd | スパッタリングに関わる半導体装置の製造方法 |
JPH05121358A (ja) * | 1991-10-28 | 1993-05-18 | Matsushita Electron Corp | 高融点金属膜の製造方法 |
JPH06240450A (ja) * | 1993-02-16 | 1994-08-30 | Kobe Steel Ltd | 耐食性及び密着性に優れた窒化チタン皮膜並びにその形成方法 |
JPH08162531A (ja) * | 1994-12-05 | 1996-06-21 | Sony Corp | 配線形成方法 |
JPH10230558A (ja) * | 1996-12-17 | 1998-09-02 | Asahi Glass Co Ltd | 光吸収性反射防止膜付き有機基体とその製造方法 |
JPH1131669A (ja) * | 1997-07-10 | 1999-02-02 | Fujitsu Ltd | 半導体装置の製造方法 |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20210060404A (ko) * | 2014-02-13 | 2021-05-26 | 가부시키가이샤 알박 | 하드 마스크 형성 방법 및 하드 마스크 형성 장치 |
KR102293539B1 (ko) * | 2014-02-13 | 2021-08-25 | 가부시키가이샤 알박 | 하드 마스크 형성 방법 및 하드 마스크 형성 장치 |
KR20180086238A (ko) | 2016-05-16 | 2018-07-30 | 가부시키가이샤 아루박 | 내부 응력 제어막의 형성 방법 |
US10975465B2 (en) | 2016-05-16 | 2021-04-13 | Ulvac, Inc. | Method of forming internal stress control film |
WO2018055878A1 (ja) * | 2016-09-26 | 2018-03-29 | 株式会社Screenホールディングス | 成膜方法および成膜装置 |
JP7523553B2 (ja) | 2021-10-21 | 2024-07-26 | 株式会社日立ハイテク | エッチング方法およびエッチング装置 |
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TWI575327B (zh) | 2017-03-21 |
JPWO2013190765A1 (ja) | 2016-02-08 |
KR101599038B1 (ko) | 2016-03-02 |
US20150107769A1 (en) | 2015-04-23 |
JP5901762B2 (ja) | 2016-04-13 |
TW201409180A (zh) | 2014-03-01 |
KR20150013749A (ko) | 2015-02-05 |
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