WO2010058094A1 - Dispositif de protection d'un boitier de circuit intégré électronique contre les intrusions par voie physique ou chimique - Google Patents
Dispositif de protection d'un boitier de circuit intégré électronique contre les intrusions par voie physique ou chimique Download PDFInfo
- Publication number
- WO2010058094A1 WO2010058094A1 PCT/FR2009/001307 FR2009001307W WO2010058094A1 WO 2010058094 A1 WO2010058094 A1 WO 2010058094A1 FR 2009001307 W FR2009001307 W FR 2009001307W WO 2010058094 A1 WO2010058094 A1 WO 2010058094A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- integrated circuit
- circuit
- substrate
- detection
- sensitive areas
- Prior art date
Links
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
- G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
- G06K19/07372—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/57—Protection from inspection, reverse engineering or tampering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01087—Francium [Fr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Definitions
- the invention relates to the realization of an integrated circuit package for detecting the physical intrusion in said housing.
- the invention is particularly applicable to the protection of secrets possibly contained in said integrated circuit, in case of physical attack, for example by destroying the secrets contained in an integrated circuit in case of intrusion into its housing.
- the chip designates the integrated circuit itself, derived from the cutting of a silicon wafer, called "wafer" in English terminology.
- the substrate designates a mini PCB ("Printed Circuit Board” in English terminology, or printed circuit), allowing the connection between the external connections or pads and the "chip” itself.
- PCB printed Circuit Board
- the component refers to the entire substrate, the chip and the housing covering the whole.
- the PCB printed circuit designates the electronic card on which the component comes to rest.
- the chip is usually deposited on the substrate (except for the so-called “flip-chip” technology), during the so-called “die attach” operation in English terminology, and bonded using a conductive epoxy adhesive.
- connection specifically between the substrate and the "chip” is done in many ways, depending on the technologies chosen.
- a wire-based interconnection is made consisting of connecting the substrate to the chip by conducting wires, the conductive wires resting on pads on the substrate side and on pads on the chip side.
- the electrical connection between the chip and the substrate is by conductive balls welded under the component and on the substrate.
- the electrical connection between the component and the PCB is done in multiple ways according to the technologies chosen, for example via conductive beads on a so-called BGA packaging, which is an acronym for "Bail Grid Array” in English terminology. Saxon.
- any signal, in particular a sensitive signal, coming from the PCB printed circuit will pass through the balls, then through the substrate, via the pads, on the interconnection wires, then the skates, to finally be conveyed in the chip.
- integrated circuits for smart cards have only one input / output pin. It is therefore easy to encrypt the data flowing on this pin, so that it is not useful to secure the housing as such.
- TPM Transactional Platform Module
- Case protection can be relatively simple in some cases, for example by depositing a resin coating over the integrated circuit, for "Chip on Board” type packaging or when the secure components are micro-cards of smart cards.
- the enclosure protection against physical intrusions is more complex on other implementations, if the integrator has provided additional protections during the final assembly of the integrated circuit on its support.
- cover the circuit with a deposit, a cover or a cover of variable type (resin deposit, metal cover).
- the latter can be very simple, thus providing minimal mechanical protection as only passive.
- external protections more elaborate, in the form of conductive circuits in which passes an electrical signal for detecting any intrusion into the cover by a control of this signal by the safety mechanisms, the conductive circuits being arranged generally in a material preventing their access (resin, gel, ).
- the integration of the protected component is by definition more complicated to achieve because it requires additional elements, such as a hood, additional tooling for installing the cover, additional time for mounting the cover and the drying the resin;
- a general object of the invention is to provide a device and a method for protecting an integrated circuit package, which is able to overcome the disadvantages of the protection systems known in the state of the art.
- Another more specific object of the invention is to provide a simple and effective protection device integrated circuit boxes, for detecting any possible opening of the housing to access a sensitive area of the integrated circuit.
- Another object of the invention is to provide a protection device that is inexpensive to produce.
- the principle of the invention consists in arranging, in a certain pattern, a fragile element containing a conductive material, the fragile element being introduced in the continuity of an intrusion detection circuit.
- the detection circuit conducts a signal that makes it possible to check the electrical continuity of the detection circuit.
- the signal used can have multiple forms, static or dynamic (i.e. constantly changing shapes).
- the verification of the electrical continuity of the detection circuit is done for example by comparing the input of said detection circuit and the output.
- the security policy decides the follow-up to be given to this verification and to the potential detection of an intrusion attempt, a possible sequence being for example the erasure of the keys stored in the integrated circuit.
- the subject of the invention is an electronic integrated circuit comprising an electronic chip fixed on a substrate, the assembly being protected by a box, the electronic chip being provided with input / output pads connected to connecting pads disposed on the substrate, this circuit being further provided with at least one intrusion detection means able to detect a mechanical and / or chemical intrusion inside the box and / or an attempt to access a sensitive zone of the integrated circuit, characterized in that said intrusion detection means comprises a detection circuit buried in and / or deposited on the substrate and arranged so as to pass in the immediate vicinity of certain sensitive areas of the integrated circuit, so that any attempt to access any of said sensitive areas causes a change in the electrical state (closed / open) of said detection circuit.
- the detection circuit comprises weakened zones, arranged in the immediate vicinity of said sensitive zones in such a way that a physical or chemical access in the vicinity of a sensitive zone causes the destruction of the adjacent weakened zone and the detection of the intrusion into the circuit.
- the weakened zones are made in the form of conductive resin droplets, arranged in the vicinity of said sensitive areas.
- the conductive resin droplets have a size of less than about 1000 micrometers, and are spaced from the sensitive areas to be protected by a space of the order of 50 microns.
- the weakened zones of the detection circuit are distributed randomly in or on the substrate of the integrated circuit.
- the weakened zones of the diffusion circuit are distributed in a conductive diffusion pattern of the substrate, in particular in the form of a grid. Some junction points of the diffusion pattern that are close to the sensitive areas are then raised to the surface of the substrate via conductive vias and provided with a weakened zone.
- the intrusion detection circuit is arranged directly on the chip instead of the substrate or in addition to the substrate, the connection of the intrusion detection circuit being performed on the input pads / output of the chip.
- the detection circuit is made in the form of an electrically open circuit in the vicinity of the sensitive zones, so that a chemical attack by a conductive liquid causes the circuit to close in the vicinity of the sensitive zones and consequently the detection of the chemical attack.
- the detection circuit is made in the form of an electrically closed circuit in the vicinity of the sensitive zones, so that a chemical attack by a conductive liquid causes the circuit to open in the vicinity of the sensitive zones and consequently the detection of chemical attack.
- FIG. 2 represents a more detailed view in elevation and in section of a chip mounted on a substrate with wire connection between the chip and the substrate by means of interconnections and connecting pads;
- Figure 3 shows the device of Figure 2 in plan view
- FIG. 4 represents an elevation view in section similar to that of FIG. 2, but including an intrusion detection circuit according to the invention
- Figure 5 shows the device of Figure 4, in plan view.
- a unitary chip 1 resulting from the cutting of a silicon wafer, and comprising electrical pads or terminals 2 for the electrical connection to the environment of the chip.
- the chip is fixed on a substrate 3 (any type of insulating material) itself soldered to a printed circuit board 4 by means of a matrix of BGA beads 5.
- the printed circuit board 4 has reception areas of a suitable diameter. (not shown)
- the pitch between the balls is generally of the order of mm.
- the brazing balls 5 provide the electrical connection between the pads 2 of the chip 1, and the conductive tracks of the printed circuit 4.
- the pads 2 of the chip 1 are connected to pads 6 of the substrate 3 via conductive son 7, typically gold or aluminum.
- the pads 6 are each connected to a ball 5 via a circuit 8 integrated in the substrate 3.
- a signal leads to the bonding pad 6 is then routed to the corresponding ball 5 of the BGA by the circuit 8 present in the substrate.
- FIG 4 which shows an elevational view in section similar to that of Figure 2, but including an intrusion detection circuit 9 provided according to the invention of fragile areas.
- the detection circuit 9 is buried in the substrate 3 or deposited on it, or partially buried and partly deposited on the substrate.
- This detection circuit 9, and in particular the part corresponding to the fragile element, has the purpose of guaranteeing the integrity and the protection of sensitive elements on the component.
- These sensitive elements include memories containing sensitive data, or other chips or circuits carrying sensitive signals.
- the detection circuit 9 goes back to fragile elements, especially made in the form of detection droplets 10, but of course other embodiments of fragile elements are within the reach of the skilled person.
- the droplets are deposited on the surface of the substrate 3, close to those of the connecting pads 6 which are considered sensitive, so that any physical or chemical attack on a sensitive area would result in the destruction of the fragile element. closer, which would activate an alarm connected to the detection circuit.
- the detection circuit 9 connects the detection droplets with each other, so that any damage to the circuit or to one of the detection droplets interrupts the circuit 9, which generates a readable alert for, for example, destroy the secrets stored in the memory of chip 1.
- the detection circuit 9 is buried in the inner layers of the substrate 3 and is therefore considered inaccessible.
- This circuit "rises” then to the surface of the substrate 3 through conductive vias (not shown).
- a droplet thus ensures the connection between 2 bushings and all the droplets thus closes the detection circuit. It is clear that to ensure a good efficiency of detection of intrusions to sensitive areas, the droplets 10 and the connecting pads 6, and their interconnections, must be of the smallest possible size, taking into account the cost requirements. Manufacturing.
- the easily attainable dimensions are of the order of 500 ⁇ m diameter for the droplets 10, 200 ⁇ m for the bond pads 6, and 35 ⁇ m for the interconnections of the wire-based detection circuit 9.
- the droplet deposition accuracy is about 25 ⁇ m
- the distance between a droplet 10 and the closest bond pad 6 that it protects is of the order of 50 .mu.m.
- the product used for bonding the chip 1 to the substrate 3 is generally deposited on the surface of the substrate by means of a syringe by droplets or patterns.
- This product is for example a conductive resin known under the commercial reference: "ablestik ablebond ® epoxy 8290".
- This droplet deposition method and this tooling can therefore be used also for the deposition of the conductive resin droplets 10 on the substrate 3.
- etching the housing will have consequences on the fragile element, destroying or degrading it at the same time or even before the dissolution of the housing. This will result in a reaction of the detection circuit and detection of the attack.
- Another solution in the case where the chemical composition of the housing is not close to that of the fragile element, consists in mixing a conductive version of the fragile element with an insulating version.
- An example of this kind of implementation will be to use a conductive epoxy resin and an insulating epoxy resin.
- a conductive epoxy resin and an insulating epoxy resin.
- trying to eliminate the insulating epoxy resin will also eliminate the conductive epoxy resin.
- epoxy resin is a very interesting solution because resin deposition tools (by needles) are tools already present and available on integrated circuit encapsulation chains.
- a last means to make a chemical attack difficult is to force the aggressor on the choice of the product attacking the fragile element and / or the housing. Indeed, when the chemical composition of the housing includes a lot of silica, the organic solvents are ineffective.
- the deposition of fragile elements is done on an electrically insulated surface, except at the connection points reserved for fragile elements.
- the location and / or diffusion law of the fragile element are highly variable, depending on the security levels to be defined on a case-by-case basis, and the technological choices best suited to each case.
- each fragile element 10 can be located near a sensitive area to protect it by proximity.
- the fragile element is in contact with the bonding pad. Trying to approach the skids without detection to attack them is very difficult for a potential attacker.
- a diffusion pattern of the fragile elements can therefore be a pattern usually called "mesh" in English terminology. It is a sort of network more or less tight, scattered on all or part of the substrate. This protects the signals routed into the substrate.
- the circuit thus formed makes it possible to detect any intrusion by a modification of the signal led in said circuit.
- Another reason for scattering fragile elements is to diffuse small points of fragile elements distributed on the substrate. For example, the distribution can be made over the entire substrate, randomly, or only a part, if it is particularly sensitive and protect. For this reason, the majority of the detection circuit will be buried in the substrate and only a few points will be external, consisting of the deposition points of the fragile elements such as conductive droplets. The circuit thus formed detects any intrusion by a modification of the signal conducted in the detection circuit.
- a third embodiment is to protect not the substrate but directly the chip.
- the latter is usually covered with an insulating passivation layer. This makes it possible to deposit the fragile conductive element on its surface.
- the connection of the detection circuit is then on the pads 2 of the chip.
- a very simple implementation consists of the link between two consecutive blocks. Thus, such a detection circuit is able to protect a third sensitive pad, located near these two pads.
- the advantage of this method of manufacture is that the connection of the two pads by depositing the fragile element is easy to achieve. It is also possible to make passivation openings at any location on the surface of the chip, allowing droplet deposition.
- a fourth embodiment of the detection circuit consists in directly protecting the chip by exploiting the conductivity of the attacking liquid (for example, fuming nitric acid) by analogy with the solution described previously on the presence of an open circuit a priori and which would be closed by fluidity and conductivity of the attacking liquid.
- the embodiment is in the form of scattered pads on the surface of the chip, constituting one or more open circuits. These open circuits will close by spreading the attacking liquid, thanks to its fluidity and conductivity.
- the density of pads on the surface is variable, can reach a high value, thus totally preventing a liquid chemical attack.
- the first interest is that the chip being higher than the substrate in the housing, an attack of the case would therefore a priori detected earlier by the sensors located on the surface of the chip.
- the second advantage is that this mechanism also provides protection against physical intrusion into the chip. It can ideally come in addition to other mechanisms, such as trellises, nowadays commonly used.
- the method of protection of integrated circuits and the integrated circuits obtained according to the invention meet the objectives set.
- the proposed solution using fragile elements near sensitive areas makes it possible to counter virtually all invasive attacks on integrated circuits, regardless of the technologies used for these integrated circuits.
- the resin deposition tools are already available and well controlled, so that their use for another function, namely the deposition of conductive droplets for creating and closing an intrusion detection circuit can be envisaged with lower cost and high manufacturing efficiency.
- the described solution can be applied to integrated circuits for a wide variety of applications, such as sensitive components for applications such as voice over IP telephony, the transmission of confidential data over the Internet.
- networks VPN techniques, authentication), secure authentication tokens ("secure USB key”), security-related components, components for cryptographic calculation.
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Storage Device Security (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011536917A JP5933266B2 (ja) | 2008-11-21 | 2009-11-14 | 物理的または化学的な侵入に対して電子集積回路ハウジングを保護する装置 |
US13/130,534 US8581251B2 (en) | 2008-11-21 | 2009-11-14 | Device for protecting an electronic integrated circuit housing against physical or chemical ingression |
CN200980146866.0A CN102257516B (zh) | 2008-11-21 | 2009-11-14 | 用于使电子集成电路外壳免受物理或化学侵入的设备 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0806563A FR2938953B1 (fr) | 2008-11-21 | 2008-11-21 | Dispositif de protection d'un boitier de circuit integre electronique contre les intrusions par voie physique ou chimique. |
FR0806563 | 2008-11-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2010058094A1 true WO2010058094A1 (fr) | 2010-05-27 |
Family
ID=40752530
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/FR2009/001307 WO2010058094A1 (fr) | 2008-11-21 | 2009-11-14 | Dispositif de protection d'un boitier de circuit intégré électronique contre les intrusions par voie physique ou chimique |
Country Status (5)
Country | Link |
---|---|
US (1) | US8581251B2 (fr) |
JP (1) | JP5933266B2 (fr) |
CN (1) | CN102257516B (fr) |
FR (1) | FR2938953B1 (fr) |
WO (1) | WO2010058094A1 (fr) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103814527B (zh) * | 2012-08-31 | 2015-10-07 | 蓝鸟株式会社 | 移动终端 |
CN102858082B (zh) * | 2012-09-26 | 2015-06-10 | 深圳市九思泰达技术有限公司 | 核心模块安全区防护结构 |
US10651135B2 (en) | 2016-06-28 | 2020-05-12 | Marvell Asia Pte, Ltd. | Tamper detection for a chip package |
EP3340114B1 (fr) * | 2016-12-22 | 2020-09-30 | EM Microelectronic-Marin SA | Circuit rfid a deux frequences de communication muni d'une boucle d'inviolabilite |
US11454010B2 (en) | 2017-03-09 | 2022-09-27 | Charles James SPOFFORD | Appliance with shim compatible geometry |
CN107133535A (zh) * | 2017-04-13 | 2017-09-05 | 上海汇尔通信息技术有限公司 | 数据保护结构及移动终端设备 |
US11289443B2 (en) * | 2017-04-20 | 2022-03-29 | Palo Alto Research Center Incorporated | Microspring structure for hardware trusted platform module |
FR3084521B1 (fr) | 2018-07-25 | 2020-08-14 | Stmicroelectronics Rousset | Procede de protection d'un module de circuit integre et dispositif correspondant |
FR3084520B1 (fr) | 2018-07-25 | 2020-08-14 | Stmicroelectronics Rousset | Procede de protection d'un circuit integre, et dispositif correspondant |
FR3084492A1 (fr) | 2018-07-30 | 2020-01-31 | Stmicroelectronics (Rousset) Sas | Procede de detection d'une attaque par un faisceau de particules electriquement chargees sur un circuit integre, et circuit integre correspondant |
FR3099259B1 (fr) * | 2019-07-24 | 2021-08-13 | St Microelectronics Rousset | Procédé de protection de données stockées dans une mémoire, et circuit intégré correspondant |
WO2022027535A1 (fr) * | 2020-08-07 | 2022-02-10 | 深圳市汇顶科技股份有限公司 | Puce de sécurité et dispositif électronique |
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FR2864667A1 (fr) * | 2003-12-29 | 2005-07-01 | Commissariat Energie Atomique | Protection d'une puce de circuit integre contenant des donnees confidentielles |
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- 2009-11-14 CN CN200980146866.0A patent/CN102257516B/zh active Active
- 2009-11-14 US US13/130,534 patent/US8581251B2/en active Active
- 2009-11-14 WO PCT/FR2009/001307 patent/WO2010058094A1/fr active Application Filing
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Also Published As
Publication number | Publication date |
---|---|
FR2938953A1 (fr) | 2010-05-28 |
CN102257516B (zh) | 2015-10-07 |
CN102257516A (zh) | 2011-11-23 |
FR2938953B1 (fr) | 2011-03-11 |
JP5933266B2 (ja) | 2016-06-08 |
JP2012509585A (ja) | 2012-04-19 |
US8581251B2 (en) | 2013-11-12 |
US20110260162A1 (en) | 2011-10-27 |
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