FR3084521B1 - Procede de protection d'un module de circuit integre et dispositif correspondant - Google Patents
Procede de protection d'un module de circuit integre et dispositif correspondant Download PDFInfo
- Publication number
- FR3084521B1 FR3084521B1 FR1856887A FR1856887A FR3084521B1 FR 3084521 B1 FR3084521 B1 FR 3084521B1 FR 1856887 A FR1856887 A FR 1856887A FR 1856887 A FR1856887 A FR 1856887A FR 3084521 B1 FR3084521 B1 FR 3084521B1
- Authority
- FR
- France
- Prior art keywords
- integrated circuit
- circuit module
- corresponding device
- protection process
- electric charges
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0292—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using a specific configuration of the conducting means connecting the protective devices, e.g. ESD buses
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
- G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
- G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
- G06K19/07372—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
- G06K19/07381—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit with deactivation or otherwise incapacitation of at least a part of the circuit upon detected tampering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/57—Protection from inspection, reverse engineering or tampering
- H01L23/576—Protection from inspection, reverse engineering or tampering using active circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/18—Auxiliary circuits, e.g. for writing into memory
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/57—Protection from inspection, reverse engineering or tampering
- H01L23/573—Protection from inspection, reverse engineering or tampering using passive means
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Security & Cryptography (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Circuit intégré (CI) comprenant un module (ID), un corps électriquement conducteur à potentiel flottant (PC) situé dans le circuit intégré et ayant une quantité initiale de charges électriques, et des moyens de protection configurés pour mettre à la masse une sortie du module (ID) en présence d'une quantité de charges électriques (AC) sur ledit corps (PC) différente de la quantité initiale et supérieure à un seuil.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1856887A FR3084521B1 (fr) | 2018-07-25 | 2018-07-25 | Procede de protection d'un module de circuit integre et dispositif correspondant |
US16/518,436 US11367720B2 (en) | 2018-07-25 | 2019-07-22 | Method for protecting an integrated circuit module using an antifuse, and corresponding device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1856887 | 2018-07-25 | ||
FR1856887A FR3084521B1 (fr) | 2018-07-25 | 2018-07-25 | Procede de protection d'un module de circuit integre et dispositif correspondant |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3084521A1 FR3084521A1 (fr) | 2020-01-31 |
FR3084521B1 true FR3084521B1 (fr) | 2020-08-14 |
Family
ID=65685436
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1856887A Active FR3084521B1 (fr) | 2018-07-25 | 2018-07-25 | Procede de protection d'un module de circuit integre et dispositif correspondant |
Country Status (2)
Country | Link |
---|---|
US (1) | US11367720B2 (fr) |
FR (1) | FR3084521B1 (fr) |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6856581B1 (en) | 2000-10-31 | 2005-02-15 | International Business Machines Corporation | Batteryless, oscillatorless, binary time cell usable as an horological device with associated programming methods and devices |
US6541792B1 (en) * | 2001-09-14 | 2003-04-01 | Hewlett-Packard Development Company, Llp | Memory device having dual tunnel junction memory cells |
FR2844090A1 (fr) | 2002-08-27 | 2004-03-05 | St Microelectronics Sa | Cellule memoire pour registre non volatile a lecture rapide |
EP1400887A1 (fr) * | 2002-09-20 | 2004-03-24 | EM Microelectronic-Marin SA | Dispositif de protection pour puce électronique comportant des informations confidentielles |
EP1586016A1 (fr) * | 2003-01-10 | 2005-10-19 | Philips Intellectual Property & Standards GmbH | Agencement de circuit et procede de protection des composants electroniques contre une manipulation illicite |
JP4462903B2 (ja) * | 2003-11-18 | 2010-05-12 | パナソニック株式会社 | 半導体ウェハ |
US7202782B2 (en) | 2004-08-04 | 2007-04-10 | Agere Systems Inc. | Method and apparatus for disabling an integrated circuit (IC) when an attempt is made to bypass security on the IC |
US8304313B2 (en) | 2004-08-23 | 2012-11-06 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and its manufacturing method |
US8022460B2 (en) | 2006-03-31 | 2011-09-20 | Semiconductor Energy Laboratory Co., Ltd. | Nonvolatile semiconductor memory device |
FR2938953B1 (fr) | 2008-11-21 | 2011-03-11 | Innova Card | Dispositif de protection d'un boitier de circuit integre electronique contre les intrusions par voie physique ou chimique. |
FR2978867B1 (fr) * | 2011-08-01 | 2014-03-21 | St Microelectronics Rousset | Resistance ajustable |
US8378710B1 (en) | 2011-09-20 | 2013-02-19 | Nxp B.V. | Secure device anti-tampering circuit |
JP2013114729A (ja) | 2011-11-30 | 2013-06-10 | Toshiba Corp | 不揮発性プログラマブルスイッチ |
FR2985059B1 (fr) * | 2011-12-21 | 2014-01-10 | Oberthur Technologies | Dispositif de securisation d'un document electronique |
DE102012200168A1 (de) | 2012-01-06 | 2013-07-11 | Technische Universität Berlin | Ladungsmesseinrichtung |
FR2986356B1 (fr) | 2012-01-27 | 2014-02-28 | St Microelectronics Rousset | Dispositif de protection d'un circuit integre contre des attaques en face arriere |
FR2991083A1 (fr) | 2012-05-24 | 2013-11-29 | St Microelectronics Grenoble 2 | Procede et dispositif de protection d'un circuit integre contre des attaques par sa face arriere |
EP2680184A1 (fr) | 2012-06-27 | 2014-01-01 | EM Microelectronic-Marin SA | Circuit intégré protégé contre des intrusions d'un pirate |
JP2014022507A (ja) | 2012-07-17 | 2014-02-03 | Toshiba Corp | 不揮発プログラマブルスイッチ |
US10216965B2 (en) | 2014-01-08 | 2019-02-26 | Stc.Unm | Systems and methods for generating physically unclonable functions from non-volatile memory cells |
US9965652B2 (en) | 2014-08-06 | 2018-05-08 | Maxim Integrated Products, Inc. | Detecting and thwarting backside attacks on secured systems |
FR3084492A1 (fr) | 2018-07-30 | 2020-01-31 | Stmicroelectronics (Rousset) Sas | Procede de detection d'une attaque par un faisceau de particules electriquement chargees sur un circuit integre, et circuit integre correspondant |
-
2018
- 2018-07-25 FR FR1856887A patent/FR3084521B1/fr active Active
-
2019
- 2019-07-22 US US16/518,436 patent/US11367720B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
FR3084521A1 (fr) | 2020-01-31 |
US11367720B2 (en) | 2022-06-21 |
US20200035671A1 (en) | 2020-01-30 |
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