WO2004047068A1 - 電圧生成回路 - Google Patents
電圧生成回路 Download PDFInfo
- Publication number
- WO2004047068A1 WO2004047068A1 PCT/JP2003/014242 JP0314242W WO2004047068A1 WO 2004047068 A1 WO2004047068 A1 WO 2004047068A1 JP 0314242 W JP0314242 W JP 0314242W WO 2004047068 A1 WO2004047068 A1 WO 2004047068A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- liquid crystal
- voltage
- circuit
- voltage generation
- present
- Prior art date
Links
- 239000004973 liquid crystal related substance Substances 0.000 abstract description 110
- 238000012545 processing Methods 0.000 abstract description 49
- 230000004913 activation Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 15
- 238000000034 method Methods 0.000 description 8
- 239000013256 coordination polymer Substances 0.000 description 6
- 230000000630 rising effect Effects 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- 238000012544 monitoring process Methods 0.000 description 3
- 101001053395 Arabidopsis thaliana Acid beta-fructofuranosidase 4, vacuolar Proteins 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Definitions
- the present invention relates to a voltage generation circuit that can be used for a liquid crystal display device, for example.
- Background art
- FIG. 6 is a configuration diagram of a conventional liquid crystal display device
- a conventional liquid crystal display device for example, Japanese Patent Application Laid-Open Nos. (See Japanese Patent Publication No. 028040) will be described.
- a conventional liquid crystal display device includes a liquid crystal display panel (matrix liquid crystal display panel) 670 having a source driver 660 and a gate driver 650, and a liquid crystal driving voltage for generating a voltage necessary for performing liquid crystal display.
- the circuit includes a generation circuit 640, a controller circuit 630 having an image signal processing circuit 631, and a control signal processing circuit 632.
- the so-called main body portion of the liquid crystal display device is a portion including the above-described units, which are surrounded by broken lines in the drawing.
- Input power supply 610 is for CPU 620, controller circuit 630, LCD drive This is a means for supplying a power supply voltage for driving the dynamic voltage generation circuit 64.
- the CPU (Central Processing Unit) 62 0 is a means for managing a wait time (wait processing) described later in the liquid crystal drive voltage generation circuit 64 0.
- the CPU 62 0 is a controller circuit 63 0 This is a means for sending command of each signal processing to.
- the image signal processing circuit 631 is a means for supplying display data to the liquid crystal display panel 670.
- the control signal processing circuit 632 is a means for controlling the liquid crystal drive voltage generation circuit 640, the gate driver 650, and the source driver 660.
- the liquid crystal drive voltage generation circuit 640 is a voltage necessary for driving the liquid crystal display panel 670, such as an on / off voltage of a switching element (not shown) such as a thin film transistor (TFT), a video signal voltage, and a counter voltage. This is a means of generating. ⁇
- a switching element not shown
- TFT thin film transistor
- the gate driver 650 is means for applying the scan selection voltage generated by the liquid crystal drive voltage generation circuit 640 to the gate line according to the synchronization signal sent from the controller circuit 630.
- the source driver 660 is means for applying a video signal sent from the controller circuit 630 to a source line corresponding to pixel data.
- the liquid crystal display panel 670 is a means for performing liquid crystal display by inputting a video signal corresponding to pixel data to each pixel.
- a power supply voltage is input to the CPU 620, the controller circuit 630, and the liquid crystal drive voltage generation circuit 640 from the input power supply 610, and each unit can be driven.
- the CPU 620 that has started driving displays the LCD on the controller circuit 630 Send a signal processing instruction.
- the controller circuit 630 which has received the liquid crystal display command, sends a control signal to the liquid crystal drive voltage generation circuit 640, the gate driver 650, and the source driver 660.
- liquid crystal driving voltage generation circuit 640 necessary for driving each means are supplied to the gate driver 650, the source driver 660, and the liquid crystal display panel 670. Each sent.
- the gate driver 650 uses a scan signal applied sequentially through a plurality of gate lines to turn on and off the switching element, and the source driver 660 uses the transmitted video signal and liquid crystal.
- the liquid crystal display is driven by liquid crystal using the potential difference between the opposite voltages in the display panel 670.
- liquid crystal drive voltage generation circuit 640 As described above, various voltages necessary for driving the liquid crystal display device are generated by the liquid crystal drive voltage generation circuit 640.
- FIG. 3 is an explanatory diagram for explaining a voltage rising sequence from the start of voltage generation at the time of startup of the conventional liquid crystal display device to the start of image display processing
- FIG. 4 which is an explanatory diagram for explaining the timing at which the drive voltage generation circuit 640 generates the liquid crystal drive voltages V31 to V35 at startup, such a wait time
- the CPU 620 manages the wait time until the potential is stabilized and the next voltage is generated.
- V31 and V32 are transferred from the controller circuit 630 to the liquid crystal drive voltage generation circuit 640, and the rise of each voltage starts, and at the same time, the wait processing W1 starts with the CPU 620. .
- the CPU 62 constantly monitors until the potentials of V31 and V32 are stabilized.
- V33 After the potentials of V31 and V32 are stabilized, the voltage of V33 starts to rise, and CPU 62 finishes wait processing W1 and performs wait processing W2 related to V33.
- the wait processing by the CPU 62 ends, the image display processing settings are transferred from the CPU 620 via the controller circuit 630, and the image display processing starts. Is done.
- FIG. 8 is a more detailed explanatory diagram for explaining the timing at which the conventional liquid crystal drive voltage generation circuit 640 generates the liquid crystal drive voltage at the time of startup.
- 2 are AVDD—CP (AVDD, VC ⁇ M, VGE operational amplifier power supply), VGG—CP (VGG operational amplifier power supply), VEE—CP (VEE operational amplifier power supply), etc.
- AVDD analog power supply voltage for source driver
- VGG switching element on voltage
- VEE switching element off voltage
- the CPU 620 must spend a long time on the order of tens of ms to hundreds of ms required for wait processing when generating all voltages in the eight processing.
- the inventor has noticed that other work cannot be performed during that time.
- An object of the present invention is to provide a voltage generation circuit that can further improve the operation efficiency of a CPU at the time of starting a liquid crystal display device in consideration of the above-described conventional problems.
- voltage generation output means for generating a plurality of types of voltages each having a predetermined voltage value and outputting the generated voltage
- a voltage generation circuit comprising: a voltage generation timing management unit that manages a timing of generating the voltage based on the counting performed.
- a second aspect of the present invention is the voltage generating circuit according to the first aspect, wherein the plurality of types of voltages are drive voltages determined for each of the circuits for driving a plurality of circuits in a display device.
- control signal input from the outside is a control signal input from a controller circuit for controlling a plurality of circuits in the display device. It is a generation circuit.
- a fourth aspect of the present invention is the voltage generation circuit according to the second aspect, wherein the predetermined cycle is a frame cycle used in display on the display device. You.
- a display panel having a plurality of pixels arranged corresponding to intersections of a plurality of columns of source lines and a plurality of rows of gate lines;
- a source driver that drives the plurality of columns of source lines using a source line driving voltage for driving the plurality of columns of source lines
- a display device comprising: a gate driver that drives the plurality of columns of gate lines using a gate line driving voltage for driving the plurality of columns of gut lines.
- a voltage generation output step of generating a plurality of types of voltages each having a predetermined voltage value and outputting the generated voltage, and a control signal input from outside having a predetermined cycle.
- the voltage generating method comprising: a counting step of counting based on a control signal input from the outside having a predetermined cycle; and And a voltage generation timing management step of managing the timing of generating the voltage.
- FIG. 1 is an explanatory diagram for explaining a voltage rising sequence from the start of voltage generation at the time of startup to the start of image display processing in the liquid crystal display device according to the first embodiment of the present invention. It is.
- FIG. 2 is an explanatory diagram for explaining the timing at which the liquid crystal drive voltage generation circuit 540 of Embodiment 1 of the present invention generates the liquid crystal drive voltages V11 to V15 at the time of startup. '
- FIG. 3 is an explanatory diagram for explaining a voltage rising sequence from the start of voltage generation at the time of startup of the conventional liquid crystal display device to the start of image display processing.
- FIG. 4 is an explanatory diagram for explaining the timing at which the conventional liquid crystal driving voltage generation circuit 640 generates the liquid crystal driving voltages V31 to V35 at the time of startup.
- FIG. 5 is a configuration diagram of the liquid crystal display device according to the first embodiment of the present invention.
- FIG. 6 is a configuration diagram of a conventional liquid crystal display device.
- FIG. 7 is a more detailed explanatory diagram for explaining the timing at which the liquid crystal drive voltage generation circuit 540 according to Embodiment 1 of the present invention generates a liquid crystal drive voltage at the time of startup.
- FIG. 8 is a more detailed explanatory diagram for explaining the timing at which the conventional liquid crystal drive voltage generation circuit 640 generates a liquid crystal drive voltage at the time of startup.
- FIG. 5 is a configuration diagram of the liquid crystal display device of the first embodiment of the present invention.
- the liquid crystal display device of this embodiment includes a source driver 560, a gate driver, A liquid crystal display panel (matrix type liquid crystal display panel) 570 having a driver 550, and a liquid crystal drive voltage generation circuit (DC-DC) 540 for generating a voltage necessary for performing liquid crystal display; An image signal processing circuit 531, and a controller circuit 530 having a control signal processing circuit 532 are provided.
- the so-called main body portion of the liquid crystal display device is a portion including the above-described units surrounded by broken lines in the drawing.
- a feature of the liquid crystal display device of the present embodiment is that a control signal of a predetermined cycle supplied from the control signal processing circuit 532 to the liquid crystal drive voltage generation circuit 540 is controlled by the liquid crystal drive voltage generation circuit 540. It is counted by a counter circuit 541 provided therein, and each liquid crystal drive voltage is generated and output in accordance with the count set for each liquid crystal drive voltage.
- the wait process until the potential of the liquid crystal drive voltage stabilizes which was always performed by the CPU 620 in the monitoring operation, is changed to the counter circuit 541 in the liquid crystal display device of the present embodiment.
- This can be realized in a pseudo manner. Therefore, it is not necessary for the CPU 520 to perform wait processing or constant monitoring of voltage, and other processing such as the start-up of the image display of the liquid crystal display panel 570 can be executed at the time of voltage generation. Therefore, the operation efficiency of CPU 520 at the time of starting the liquid crystal display device of the present embodiment is considerably improved as compared with the conventional case.
- the input power supply 510 is a means for supplying a power supply voltage for driving the CPU 520, the controller circuit 530, and the liquid crystal drive voltage generation circuit 540, similarly to the input power supply 610. .
- the CPU (Central Processing Unit) 520 is a means for sending a signal processing instruction to the controller circuit 530.
- the image signal processing circuit 531 is a means for supplying display data to the liquid crystal display panel 570.
- the control signal processing circuit 532 is a means for supplying a control signal of a predetermined period to the liquid crystal drive voltage generation circuit 540.
- the control signal processing circuit 532 is means for controlling the liquid crystal drive voltage generation circuit 540, the gate driver 550, and the source driver 560.
- the liquid crystal drive voltage generating circuit 540 corresponds to a counter circuit 541 for counting a control signal of a predetermined cycle supplied by the control signal processing circuit 532, and a count set for each liquid crystal drive voltage. And a voltage generation and output circuit for generating and outputting each liquid crystal drive voltage, and a voltage generation timing management circuit for managing the timing for generating each liquid crystal drive voltage based on the set count. Means having the following. Since drive voltage generation and output stabilization control require several tens to several hundreds of ms, a control signal with a frame period that is indispensable in a liquid crystal display device from the viewpoint of minimizing the circuit configuration of the counter circuit 541 Is also used as a control signal of this predetermined cycle.
- the liquid crystal drive voltage generating circuit 540 is a means for generating a voltage required for driving the liquid crystal display panel 570 such as an on / off voltage of a switching element (not shown), a video signal voltage, and a counter voltage. It is.
- the gate dryno 550 applies the scan selection voltage generated by the liquid crystal drive voltage generation circuit 540 to the gut line according to the synchronization signal sent from the controller circuit 530, similarly to the gate driver 650. It is a means to do.
- the source dryino 560 like the source dryino 660, is a means for applying a video signal sent from the controller circuit 530 to a source line corresponding to pixel data.
- the liquid crystal display panel 570 is a means for performing liquid crystal display by inputting a video signal corresponding to pixel data to each pixel. is there.
- the voltage generation output circuit 543 corresponds to the voltage generation output means of the present invention
- the counter circuit 541 corresponds to the counter means of the present invention
- the voltage generation timing management circuit 542 corresponds to the voltage generation of the present invention.
- the liquid crystal drive voltage generation circuit 540 corresponds to the generation timing management means, and corresponds to the voltage generation circuit of the present invention.
- the liquid crystal display device of the present embodiment corresponds to the display device of the present invention.
- the means including the gate driver 550, the source driver 560, and the liquid crystal display panel 570 corresponds to a plurality of circuits of the present invention.
- FIG. 1 An explanatory diagram for explaining a voltage rising sequence from the start of voltage generation at the time of startup to the start of image display processing of the liquid crystal display device according to the first embodiment of the present invention.
- Description for explaining the timing at which the liquid crystal drive voltage generation circuit 540 of FIG. 1 and Embodiment 1 of the present invention generates the liquid crystal drive voltages V ′ 11 to V 15 at the time of startup is shown in FIG.
- the operation of the liquid crystal display device according to the present embodiment at the time of startup will be described mainly with reference to FIG.
- the driving voltages of the respective circuits are started in descending order of the voltage value.
- the order of the voltage rising sequence and the order of the voltage values may not be the same. Of course.
- C 1 is the count timing for starting generation of V 11 and V 12
- C 2 is the count timing for starting generation of V 13
- C 3 is VI 4 and V 4 15 is the count timing of the generation start
- C 4 is the count timing at which the image display processing is started
- t 1 is C 1 is the time interval between C2
- t2 is the time interval between C2 and C3
- t3 is the time interval between C3 and C4.
- the time intervals t1 to t3 are integer multiples of the control signal period.
- the number of control signal counts between C 1 and C 2, between C 2 and C 3, and between C 3 and C 4 is represented by t1 to t3, respectively, which is the conventional wait processing Wl to W3 described above. It can be set by the liquid crystal drive voltage generation circuit 4 so as to approximate the time required for the operation.
- V11 to V15 correspond to conventional V31 to V35 in this order.
- control signal sent from the controller circuit 530 to the liquid crystal drive voltage generation circuit 540 is a control signal having a fixed period, and the liquid crystal drive voltage generation circuit 54 and the internal counter circuit 54 1 Counting is performed based on the cycle.
- V I I and V I 2 are started in the liquid crystal drive voltage generation circuit 540 simultaneously with the count of C1.
- the liquid crystal drive voltage generation circuit 540 starts generating V14 and V15.
- the image display processing settings are transferred from the CPU 520 via the controller circuit 530, and the image display processing is started.
- a specific example of 3 is 00 (source driver Analog power supply voltage), VGG (switching element on voltage), VEE (switching element off voltage), etc.
- Specific examples of V 14 -V 15 are VC OM (common potential), VGE (gate compensation power supply voltage). ) And so on.
- control signal count between C1 and C2 is 5, and the specific example of the control signal count between C2 and C3 is 4 (see FIGS. 2 and 7).
- the display panel of the present invention is the liquid crystal display panel 570 in the present embodiment described above.
- the present invention is not limited to this.
- the display panel of the present invention may be another matrix type display panel such as an EL (Electro-Magnetic Luminescence) display panel.
- the voltage generation output circuit of the present invention is the voltage generation output circuit 543 in the above-described embodiment.
- the present invention is not limited to this.
- the voltage generation output means of the present invention may be any means that generates a plurality of types of voltages each having a predetermined voltage value and outputs the generated voltage.
- the counter means of the present invention is the counter circuit 541 in the above-described present embodiment.
- the present invention is not limited to this.
- the counter means of the present invention may be any means that counts based on a control signal input from the outside having a predetermined cycle.
- the counter means of the present invention is provided in the liquid crystal drive voltage generation circuit (DC-DC) 540 in the above-described embodiment.
- the present invention is not limited to this.
- the counter means of the present invention may be provided in the controller circuit 630 or may be provided in the CPU (Central Processing Unit) 62 .
- control signal of the present invention It was a control signal with a frame cycle (so-called frame control signal).
- frame control signal a control signal with a frame cycle
- the present invention is not limited to this.
- the control signal of the present invention may be any signal that can similarly control a predetermined cycle.
- the voltage generation timing management means of the present invention is the voltage generation timing management circuit 542 in the above-described embodiment.
- the present invention is not limited to this.
- the voltage generation timing management means of the present invention may be any means that manages timing for generating a voltage based on the count (count control) to be performed.
- the program of the present invention is a program for causing a computer to execute all or some of the steps (or steps, operations, actions, and the like) of the above-described voltage generation method of the present invention, It is a program that operates in cooperation with a computer.
- the recording medium of the present invention is a computer-readable recording medium for causing a computer to execute all or a part of all or a part of the above-described voltage generation method of the present invention (or a process, an operation, an operation, or the like).
- a recording medium carrying a program, the recording medium being readable by a computer and executing the operation in cooperation with the computer.
- the “partial steps (or steps, operations, actions, etc.)” of the present invention means one or several of the plurality of steps.
- step means the operation of all or part of the step.
- One use form of the program of the present invention may be a form in which the program is recorded on a computer-readable recording medium and operates in cooperation with the computer.
- One use form of the program of the present invention may be a form in which the program is transmitted through a transmission medium, read by a computer, and operates in cooperation with the computer.
- the recording medium includes: OM and the like
- the transmission medium includes a transmission medium such as the Internet, light, radio waves, and sound waves.
- the computer of the present invention described above is not limited to pure hardware such as a CPU, but may include firmware, OS, and peripheral devices.
- the configuration of the present invention may be realized by software or hardware.
- the liquid crystal drive voltage generation circuit performs the control signal for each predetermined period, and performs pseudo-time processing until the voltage stabilizes in a pseudo multiple times of the control signal period, thereby achieving C C Eliminates the need for constant monitoring of wait processing during voltage generation by the PU. Accordingly, the work efficiency of the CPU is significantly improved, and high-speed processing of calculations is possible, and other processing operations such as starting up the image display on the liquid crystal display panel can be performed simultaneously with the voltage generation.
- the voltage generation circuit of the present invention has a clock abnormality detection capability in the display control circuit, counts a clock signal supplied from the outside by an internal counter circuit, and (1) when the number of counts is zero, Turn off the power supply,
- the present invention has an advantage that the operation efficiency of the CPU at the time of starting the liquid crystal display device can be further improved.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
- Control Of Voltage And Current In General (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/504,597 US20050141155A1 (en) | 2002-11-21 | 2003-11-10 | Voltage generator circuit |
CNB2003801001251A CN100470627C (zh) | 2002-11-21 | 2003-11-10 | 电压生成电路 |
JP2004553149A JPWO2004047068A1 (ja) | 2002-11-21 | 2003-11-10 | 電圧生成回路 |
KR1020047010726A KR100661412B1 (ko) | 2002-11-21 | 2003-11-10 | 전압 생성 회로 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002338333 | 2002-11-21 | ||
JP2002-338333 | 2002-11-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2004047068A1 true WO2004047068A1 (ja) | 2004-06-03 |
Family
ID=32321889
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2003/014242 WO2004047068A1 (ja) | 2002-11-21 | 2003-11-10 | 電圧生成回路 |
Country Status (6)
Country | Link |
---|---|
US (1) | US20050141155A1 (ja) |
JP (1) | JPWO2004047068A1 (ja) |
KR (1) | KR100661412B1 (ja) |
CN (1) | CN100470627C (ja) |
TW (1) | TWI286726B (ja) |
WO (1) | WO2004047068A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JP6582435B2 (ja) * | 2015-02-24 | 2019-10-02 | セイコーエプソン株式会社 | 集積回路装置及び電子機器 |
KR102141806B1 (ko) * | 2019-04-24 | 2020-08-06 | 주식회사 엑시콘 | SoC 테스트 장치 |
Citations (6)
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JPS6296994A (ja) * | 1985-10-24 | 1987-05-06 | 東芝テック株式会社 | 液晶表示器制御装置 |
JPH07159754A (ja) * | 1993-12-08 | 1995-06-23 | Toshiba Corp | 半導体集積回路 |
JPH08272337A (ja) * | 1995-03-30 | 1996-10-18 | Seiko Epson Corp | 表示制御回路 |
JPH0968951A (ja) * | 1995-08-31 | 1997-03-11 | Sanyo Electric Co Ltd | 液晶表示装置 |
JPH09152746A (ja) * | 1995-11-30 | 1997-06-10 | Mita Ind Co Ltd | 電子写真用トナー |
JP2002108293A (ja) * | 2000-09-28 | 2002-04-10 | Toshiba Corp | 情報処理装置及び該装置における表示装置用電源電圧制御方法 |
Family Cites Families (9)
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KR910001848B1 (ko) * | 1986-02-06 | 1991-03-28 | 세이꼬 엡슨 가부시끼가이샤 | 화상 표시 장치 |
JP2951352B2 (ja) * | 1990-03-08 | 1999-09-20 | 株式会社日立製作所 | 多階調液晶表示装置 |
US6115014A (en) * | 1994-12-26 | 2000-09-05 | Casio Computer Co., Ltd. | Liquid crystal display by means of time-division color mixing and voltage driving methods using birefringence |
JP3517503B2 (ja) * | 1995-12-21 | 2004-04-12 | 株式会社日立製作所 | Tft液晶ディスプレイの駆動回路 |
US6057820A (en) * | 1996-10-21 | 2000-05-02 | Spatialight, Inc. | Apparatus and method for controlling contrast in a dot-matrix liquid crystal display |
JPH1195848A (ja) * | 1997-09-18 | 1999-04-09 | Casio Comput Co Ltd | 電源装置 |
JP2001337652A (ja) * | 2000-05-24 | 2001-12-07 | Nec Corp | 液晶表示装置およびその階調表示方法 |
TWI221595B (en) * | 2000-09-29 | 2004-10-01 | Sanyo Electric Co | Driving apparatus for display device |
US6909427B2 (en) * | 2002-06-10 | 2005-06-21 | Koninklijke Philips Electronics N.V. | Load adaptive column driver |
-
2003
- 2003-11-10 CN CNB2003801001251A patent/CN100470627C/zh not_active Expired - Lifetime
- 2003-11-10 JP JP2004553149A patent/JPWO2004047068A1/ja active Pending
- 2003-11-10 KR KR1020047010726A patent/KR100661412B1/ko not_active IP Right Cessation
- 2003-11-10 US US10/504,597 patent/US20050141155A1/en not_active Abandoned
- 2003-11-10 WO PCT/JP2003/014242 patent/WO2004047068A1/ja active IP Right Grant
- 2003-11-17 TW TW092132151A patent/TWI286726B/zh not_active IP Right Cessation
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS6296994A (ja) * | 1985-10-24 | 1987-05-06 | 東芝テック株式会社 | 液晶表示器制御装置 |
JPH07159754A (ja) * | 1993-12-08 | 1995-06-23 | Toshiba Corp | 半導体集積回路 |
JPH08272337A (ja) * | 1995-03-30 | 1996-10-18 | Seiko Epson Corp | 表示制御回路 |
JPH0968951A (ja) * | 1995-08-31 | 1997-03-11 | Sanyo Electric Co Ltd | 液晶表示装置 |
JPH09152746A (ja) * | 1995-11-30 | 1997-06-10 | Mita Ind Co Ltd | 電子写真用トナー |
JP2002108293A (ja) * | 2000-09-28 | 2002-04-10 | Toshiba Corp | 情報処理装置及び該装置における表示装置用電源電圧制御方法 |
Also Published As
Publication number | Publication date |
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TW200416646A (en) | 2004-09-01 |
KR20050034636A (ko) | 2005-04-14 |
CN100470627C (zh) | 2009-03-18 |
TWI286726B (en) | 2007-09-11 |
JPWO2004047068A1 (ja) | 2006-03-23 |
CN1685392A (zh) | 2005-10-19 |
KR100661412B1 (ko) | 2006-12-27 |
US20050141155A1 (en) | 2005-06-30 |
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