WO1998015974A1 - Procede de montage du cristal d'un instrument a semi-conducteurs - Google Patents
Procede de montage du cristal d'un instrument a semi-conducteurs Download PDFInfo
- Publication number
- WO1998015974A1 WO1998015974A1 PCT/RU1996/000292 RU9600292W WO9815974A1 WO 1998015974 A1 WO1998015974 A1 WO 1998015974A1 RU 9600292 W RU9600292 W RU 9600292W WO 9815974 A1 WO9815974 A1 WO 9815974A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- recess
- κρisτalla
- crystal
- installation
- ποveρχnοsτ
- Prior art date
Links
- 239000013078 crystal Substances 0.000 title claims abstract description 28
- 238000000034 method Methods 0.000 title claims abstract description 14
- 238000009434 installation Methods 0.000 claims description 15
- 239000011230 binding agent Substances 0.000 claims description 11
- 230000007717 exclusion Effects 0.000 claims description 5
- 239000012776 electronic material Substances 0.000 claims 1
- 239000000463 material Substances 0.000 abstract description 7
- 239000000853 adhesive Substances 0.000 abstract 1
- 230000001070 adhesive effect Effects 0.000 abstract 1
- 239000002184 metal Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 238000009412 basement excavation Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000007373 indentation Methods 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 238000007664 blowing Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000010616 electrical installation Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01032—Germanium [Ge]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
- H01L2924/15155—Shape the die mounting substrate comprising a recess for hosting the device the shape of the recess being other than a cuboid
- H01L2924/15157—Top view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
Definitions
- the invention is supplied with electronic equipment, and more specifically, the installation method of the electronic device is related to the installation.
- Izves ⁇ en s ⁇ s ⁇ b ⁇ sad ⁇ i ⁇ is ⁇ alla on ⁇ ve ⁇ n ⁇ s ⁇ ⁇ la ⁇ y or dn ⁇ ⁇ usa ⁇ . ⁇ .Dub ⁇ laz ⁇ v and d ⁇ ugie " ⁇ e ⁇ n ⁇ l ⁇ giya sb ⁇ i in ⁇ eg ⁇ alny ⁇ mi ⁇ s ⁇ em” izda ⁇ els ⁇ v ⁇ " ⁇ ischa sh ⁇ la” ( ⁇ iev), 1987, pp.
- P ⁇ s ⁇ avlennaya task ⁇ eshae ⁇ sya ⁇ em, ch ⁇ in s ⁇ s ⁇ be m ⁇ n ⁇ azha ⁇ is ⁇ alla ⁇ lu ⁇ v ⁇ dni ⁇ v ⁇ g ⁇ ⁇ ib ⁇ a, ⁇ i ⁇ m on us ⁇ an ⁇ v ⁇ chn ⁇ y ⁇ ve ⁇ n ⁇ s ⁇ i vy ⁇ lnyayu ⁇ recess with ⁇ m ⁇ schyu za ⁇ va ⁇ a as ins ⁇ umen ⁇ a with ⁇ l ⁇ s ⁇ im ⁇ tsem and ⁇ a ⁇ illya ⁇ nym ⁇ ve ⁇ s ⁇ iem in eg ⁇ tsen ⁇ aln ⁇ y chas ⁇ i, ⁇ asshi ⁇ yayuschimsya ⁇ eg ⁇ ⁇ tsu, za ⁇ va ⁇ yvayu ⁇ ⁇ is ⁇ all s ⁇ s ⁇ ny eg ⁇ litsev ⁇ y ⁇ ve ⁇
- the exclusion of coverage is carried out after the binding of the binding material.
- the deepening can be at least partially metalized, and, as a binder, electrical material can be selected.
- Occupation of the crystal may be carried out by a vacuum system, and between the connection of the instrument with the crystal and the exclusion of the vacuum, there is a pressure of 300
- the quantity of binding material below is limited by its minimum quantity, with the potential to protect the crystal, and to avoid the exclusion of the product due to the exclusion of If the binder is electrically conductive and the contamination of the crystal is not electrically inactive, it may result in a malfunction.
- the size of the recess in the bottom part is limited by the possibility of a drop in the crystal, and in the end - by the deterioration of the overall temperature. 5
- the proposed installation method for an industrial installation is optional, for example, ZP 325 ⁇ -5 with a size of 0.5x0.5x0, 15 mm, which is as follows.
- ⁇ For a fee of 1, for example, from a plate, a recess of 2 is produced, which increases the size of 3 by 0, 1 mm, for example, which is not subject to a cut-off
- Crystal 3 is located above recess 2, in which it places a quantity of available, such as 0.0005 g, binder 2 is not at all faster.
- ⁇ flower As a binder, 6 may be used with a genuine eutectic agent.
- the increase in the part of tool 4 over the dimensions of the recess 2 is equal to 0.2 mm. If you are using Crystal 3, there is a disruption to Tool 4 or Service 1. Further ⁇ susches ⁇ vlyayu ⁇ ⁇ lazhdenie ⁇ i ⁇ ya, na ⁇ ime ⁇ , s ⁇ uey ⁇ l ⁇ dn ⁇ g ⁇ v ⁇ zdu ⁇ a d ⁇ ⁇ em ⁇ e ⁇ a ⁇ u ⁇ y below ⁇ em ⁇ e ⁇ a ⁇ u ⁇ y ⁇ lavleniya, ch ⁇ ⁇ bes ⁇ echivae ⁇ za ⁇ ve ⁇ devanie ⁇ i ⁇ ya and za ⁇ e ⁇ lenie ⁇ is ⁇ alla 3.
- Deepening in fact, requires a crystal 3, may not be performed only on a free upgrade, but also on a free cable.
- the invention may be used or installed on a non-removable system, or use
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Die Bonding (AREA)
- Wire Bonding (AREA)
- Nitrogen And Oxygen Or Sulfur-Condensed Heterocyclic Ring Systems (AREA)
Description
Claims
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
RU98112604/25A RU2136078C1 (ru) | 1996-10-10 | 1996-10-10 | Способ монтажа кристалла полупроводникового прибора |
JP51743198A JP3667773B2 (ja) | 1996-10-10 | 1996-10-10 | 半導体チップの取付け方法 |
KR10-1998-0704321A KR100431031B1 (ko) | 1996-10-10 | 1996-10-10 | 반도체칩의장착방법 |
US09/091,080 US6261492B1 (en) | 1996-10-10 | 1996-10-10 | Method for fitting a semiconductor chip |
PCT/RU1996/000292 WO1998015974A1 (fr) | 1996-10-10 | 1996-10-10 | Procede de montage du cristal d'un instrument a semi-conducteurs |
SE9801965A SE522045C2 (sv) | 1996-10-10 | 1998-06-03 | Förfarande för montering av ett halvledarchips |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/RU1996/000292 WO1998015974A1 (fr) | 1996-10-10 | 1996-10-10 | Procede de montage du cristal d'un instrument a semi-conducteurs |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1998015974A1 true WO1998015974A1 (fr) | 1998-04-16 |
Family
ID=20130047
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/RU1996/000292 WO1998015974A1 (fr) | 1996-10-10 | 1996-10-10 | Procede de montage du cristal d'un instrument a semi-conducteurs |
Country Status (6)
Country | Link |
---|---|
US (1) | US6261492B1 (ru) |
JP (1) | JP3667773B2 (ru) |
KR (1) | KR100431031B1 (ru) |
RU (1) | RU2136078C1 (ru) |
SE (1) | SE522045C2 (ru) |
WO (1) | WO1998015974A1 (ru) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2819080A1 (fr) * | 2000-12-28 | 2002-07-05 | Thomson Csf | Procede d'assemblage d'un composant tel qu'un circuit integre sur un substrat |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6676778B1 (en) * | 2000-06-19 | 2004-01-13 | Hitachi Global Storage Technologies Netherlands B.V. | Method for bonding slider and suspension together and deciding conditions of laser beam irradiation |
US7534320B2 (en) * | 2005-11-15 | 2009-05-19 | Northrop Grumman Corporation | Lamination press pad |
US7790507B2 (en) * | 2007-03-24 | 2010-09-07 | Texas Instruments Incorporated | Semiconductor die collet and method |
RU2527661C1 (ru) * | 2013-02-11 | 2014-09-10 | Открытое акционерное общество "Концерн радиостроения "Вега" | Способ группового монтажа кристаллов при сборке высокоплотных электронных модулей |
US11133866B2 (en) | 2014-02-25 | 2021-09-28 | Pharmaseq, Inc. | All optical identification and sensor system with power on discovery |
JP6244060B2 (ja) * | 2016-01-06 | 2017-12-06 | 新電元工業株式会社 | 半導体デバイスの載置台及び車載装置 |
CN107408542B (zh) * | 2016-01-06 | 2019-07-26 | 新电元工业株式会社 | 半导体器件的载置台以及车载装置 |
US10882258B1 (en) * | 2016-01-22 | 2021-01-05 | Pharmaseq, Inc. | Microchip affixing probe and method of use |
DE102018208881B4 (de) * | 2018-06-06 | 2021-04-22 | Vitesco Technologies GmbH | Verfahren und Vorrichtung zur Bestückung eines Trägers mit einem Bauteil |
EP4104317A4 (en) | 2020-02-14 | 2024-03-06 | P-Chip Ip Holdings Inc. | LIGHT TRIGGERED TRANSPONDER |
US20220085992A1 (en) | 2020-09-17 | 2022-03-17 | P-Chip Ip Holdings Inc. | Devices, systems, and methods using microtransponders |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2138205A (en) * | 1983-04-13 | 1984-10-17 | Philips Electronic Associated | Methods of manufacturing a microwave circuit |
FR2599893A1 (fr) * | 1986-05-23 | 1987-12-11 | Ricoh Kk | Procede de montage d'un module electronique sur un substrat et carte a circuit integre |
RU2003207C1 (ru) * | 1990-12-26 | 1993-11-15 | Институт точной механики и вычислительной техники им.С.А.Лебедева РАН | Способ изготовлени гибридной интегральной схемы |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2264632A (en) * | 1939-02-14 | 1941-12-02 | Armstrong Cork Co | Adhesive applying device |
US3963551A (en) * | 1974-03-05 | 1976-06-15 | Stromberg-Carlson Corporation | Method for bonding semiconductor chips |
NL7905518A (nl) * | 1978-07-19 | 1980-01-22 | Matsushita Electric Ind Co Ltd | Werkwijze voor het monteren van elektronische delen. |
US4480983A (en) * | 1982-05-13 | 1984-11-06 | Motorola, Inc. | Collet and method for dispensing viscous materials |
US4749120A (en) * | 1986-12-18 | 1988-06-07 | Matsushita Electric Industrial Co., Ltd. | Method of connecting a semiconductor device to a wiring board |
US5433810A (en) * | 1992-09-16 | 1995-07-18 | Abrams; Herbert M. | Lamination of composite eyeglass lenses |
-
1996
- 1996-10-10 KR KR10-1998-0704321A patent/KR100431031B1/ko not_active IP Right Cessation
- 1996-10-10 JP JP51743198A patent/JP3667773B2/ja not_active Expired - Lifetime
- 1996-10-10 RU RU98112604/25A patent/RU2136078C1/ru not_active IP Right Cessation
- 1996-10-10 WO PCT/RU1996/000292 patent/WO1998015974A1/ru active IP Right Grant
- 1996-10-10 US US09/091,080 patent/US6261492B1/en not_active Expired - Lifetime
-
1998
- 1998-06-03 SE SE9801965A patent/SE522045C2/sv not_active IP Right Cessation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2138205A (en) * | 1983-04-13 | 1984-10-17 | Philips Electronic Associated | Methods of manufacturing a microwave circuit |
FR2599893A1 (fr) * | 1986-05-23 | 1987-12-11 | Ricoh Kk | Procede de montage d'un module electronique sur un substrat et carte a circuit integre |
RU2003207C1 (ru) * | 1990-12-26 | 1993-11-15 | Институт точной механики и вычислительной техники им.С.А.Лебедева РАН | Способ изготовлени гибридной интегральной схемы |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2819080A1 (fr) * | 2000-12-28 | 2002-07-05 | Thomson Csf | Procede d'assemblage d'un composant tel qu'un circuit integre sur un substrat |
Also Published As
Publication number | Publication date |
---|---|
RU2136078C1 (ru) | 1999-08-27 |
JP2000516042A (ja) | 2000-11-28 |
JP3667773B2 (ja) | 2005-07-06 |
KR100431031B1 (ko) | 2004-07-27 |
SE9801965D0 (sv) | 1998-06-03 |
US6261492B1 (en) | 2001-07-17 |
KR19990072027A (ko) | 1999-09-27 |
SE522045C2 (sv) | 2004-01-07 |
SE9801965L (sv) | 1998-06-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO1998015974A1 (fr) | Procede de montage du cristal d'un instrument a semi-conducteurs | |
US4567643A (en) | Method of replacing an electronic component connected to conducting tracks on a support substrate | |
KR100443484B1 (ko) | 반도체장치및그제조방법 | |
US5769989A (en) | Method and system for reworkable direct chip attach (DCA) structure with thermal enhancement | |
US6188580B1 (en) | Smart card and semiconductor chip for use in a smart card | |
US6777814B2 (en) | Semiconductor device | |
US5909633A (en) | Method of manufacturing an electronic component | |
US20060081966A1 (en) | Chip-scale packages | |
JP2800112B2 (ja) | 半導体装置 | |
JP4552783B2 (ja) | 半導体センサ | |
US5258647A (en) | Electronic systems disposed in a high force environment | |
CN114730716A (zh) | 适于组装到电线元件的功能芯片的制造方法 | |
CN101436555B (zh) | 半导体封装体的制造方法 | |
EP0951063A1 (en) | Semiconductor device and process for producing the same | |
US5482887A (en) | Method of manufacturing a semiconductor device with a passivated side | |
KR20060126636A (ko) | 구성요소들의 패키징 방법 및 패키징된 구성요소들 | |
CN112262100B (zh) | 晶片级封装件和制造方法 | |
CN1071493C (zh) | 一种tab带和使用该tab带的半导体器件 | |
US6667192B1 (en) | Device and method for making devices comprising at least a chip fixed on a support | |
CN112118526B (zh) | 微机电***麦克风封装结构与封装方法 | |
US6263563B1 (en) | Method of manufacturing and checking electronic components | |
US5661091A (en) | Method of manufacturing a semiconductor device having PN junctions separated by depressions | |
JP2894594B2 (ja) | ソルダーバンプを有するノウングッドダイの製造方法 | |
JP2002518751A (ja) | 集積回路カードの製造方法および得られたカード | |
US8330260B2 (en) | Electronic component of VQFN design and method for producing the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): JP KR RU SE US |
|
WWE | Wipo information: entry into national phase |
Ref document number: 98019656 Country of ref document: SE |
|
WWP | Wipo information: published in national office |
Ref document number: 98019656 Country of ref document: SE |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1019980704321 Country of ref document: KR |
|
WWE | Wipo information: entry into national phase |
Ref document number: 09091080 Country of ref document: US |
|
WWP | Wipo information: published in national office |
Ref document number: 1019980704321 Country of ref document: KR |
|
WWG | Wipo information: grant in national office |
Ref document number: 1019980704321 Country of ref document: KR |