SE9801965D0 - Förfarande för anpassning av ett halvledarchips - Google Patents
Förfarande för anpassning av ett halvledarchipsInfo
- Publication number
- SE9801965D0 SE9801965D0 SE9801965A SE9801965A SE9801965D0 SE 9801965 D0 SE9801965 D0 SE 9801965D0 SE 9801965 A SE9801965 A SE 9801965A SE 9801965 A SE9801965 A SE 9801965A SE 9801965 D0 SE9801965 D0 SE 9801965D0
- Authority
- SE
- Sweden
- Prior art keywords
- chip
- recess
- tool
- procedure
- fitting
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 3
- 239000004065 semiconductor Substances 0.000 title 1
- 239000011230 binding agent Substances 0.000 abstract 2
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
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- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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- H01L2924/01005—Boron [B]
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- H01L2924/01023—Vanadium [V]
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- H01L2924/01079—Gold [Au]
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- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
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- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/014—Solder alloys
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
- H01L2924/15155—Shape the die mounting substrate comprising a recess for hosting the device the shape of the recess being other than a cuboid
- H01L2924/15157—Top view
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Die Bonding (AREA)
- Wire Bonding (AREA)
- Nitrogen And Oxygen Or Sulfur-Condensed Heterocyclic Ring Systems (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/RU1996/000292 WO1998015974A1 (fr) | 1996-10-10 | 1996-10-10 | Procede de montage du cristal d'un instrument a semi-conducteurs |
Publications (3)
Publication Number | Publication Date |
---|---|
SE9801965D0 true SE9801965D0 (sv) | 1998-06-03 |
SE9801965L SE9801965L (sv) | 1998-06-03 |
SE522045C2 SE522045C2 (sv) | 2004-01-07 |
Family
ID=20130047
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE9801965A SE522045C2 (sv) | 1996-10-10 | 1998-06-03 | Förfarande för montering av ett halvledarchips |
Country Status (6)
Country | Link |
---|---|
US (1) | US6261492B1 (sv) |
JP (1) | JP3667773B2 (sv) |
KR (1) | KR100431031B1 (sv) |
RU (1) | RU2136078C1 (sv) |
SE (1) | SE522045C2 (sv) |
WO (1) | WO1998015974A1 (sv) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6676778B1 (en) * | 2000-06-19 | 2004-01-13 | Hitachi Global Storage Technologies Netherlands B.V. | Method for bonding slider and suspension together and deciding conditions of laser beam irradiation |
FR2819080B1 (fr) * | 2000-12-28 | 2004-02-06 | Thomson Csf | Procede d'assemblage d'un composant tel qu'un circuit integre sur un substrat |
US7534320B2 (en) * | 2005-11-15 | 2009-05-19 | Northrop Grumman Corporation | Lamination press pad |
US7790507B2 (en) * | 2007-03-24 | 2010-09-07 | Texas Instruments Incorporated | Semiconductor die collet and method |
RU2527661C1 (ru) * | 2013-02-11 | 2014-09-10 | Открытое акционерное общество "Концерн радиостроения "Вега" | Способ группового монтажа кристаллов при сборке высокоплотных электронных модулей |
US11133866B2 (en) | 2014-02-25 | 2021-09-28 | Pharmaseq, Inc. | All optical identification and sensor system with power on discovery |
JP6244060B2 (ja) * | 2016-01-06 | 2017-12-06 | 新電元工業株式会社 | 半導体デバイスの載置台及び車載装置 |
CN107408542B (zh) * | 2016-01-06 | 2019-07-26 | 新电元工业株式会社 | 半导体器件的载置台以及车载装置 |
US10882258B1 (en) * | 2016-01-22 | 2021-01-05 | Pharmaseq, Inc. | Microchip affixing probe and method of use |
DE102018208881B4 (de) * | 2018-06-06 | 2021-04-22 | Vitesco Technologies GmbH | Verfahren und Vorrichtung zur Bestückung eines Trägers mit einem Bauteil |
EP4104317A4 (en) | 2020-02-14 | 2024-03-06 | P-Chip Ip Holdings Inc. | LIGHT TRIGGERED TRANSPONDER |
US20220085992A1 (en) | 2020-09-17 | 2022-03-17 | P-Chip Ip Holdings Inc. | Devices, systems, and methods using microtransponders |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2264632A (en) * | 1939-02-14 | 1941-12-02 | Armstrong Cork Co | Adhesive applying device |
US3963551A (en) * | 1974-03-05 | 1976-06-15 | Stromberg-Carlson Corporation | Method for bonding semiconductor chips |
NL7905518A (nl) * | 1978-07-19 | 1980-01-22 | Matsushita Electric Ind Co Ltd | Werkwijze voor het monteren van elektronische delen. |
US4480983A (en) * | 1982-05-13 | 1984-11-06 | Motorola, Inc. | Collet and method for dispensing viscous materials |
GB2138205B (en) * | 1983-04-13 | 1986-11-05 | Philips Electronic Associated | Methods of manufacturing a microwave circuit |
FR2599893B1 (fr) * | 1986-05-23 | 1996-08-02 | Ricoh Kk | Procede de montage d'un module electronique sur un substrat et carte a circuit integre |
US4749120A (en) * | 1986-12-18 | 1988-06-07 | Matsushita Electric Industrial Co., Ltd. | Method of connecting a semiconductor device to a wiring board |
RU2003207C1 (ru) * | 1990-12-26 | 1993-11-15 | Институт точной механики и вычислительной техники им.С.А.Лебедева РАН | Способ изготовлени гибридной интегральной схемы |
US5433810A (en) * | 1992-09-16 | 1995-07-18 | Abrams; Herbert M. | Lamination of composite eyeglass lenses |
-
1996
- 1996-10-10 KR KR10-1998-0704321A patent/KR100431031B1/ko not_active IP Right Cessation
- 1996-10-10 JP JP51743198A patent/JP3667773B2/ja not_active Expired - Lifetime
- 1996-10-10 RU RU98112604/25A patent/RU2136078C1/ru not_active IP Right Cessation
- 1996-10-10 WO PCT/RU1996/000292 patent/WO1998015974A1/ru active IP Right Grant
- 1996-10-10 US US09/091,080 patent/US6261492B1/en not_active Expired - Lifetime
-
1998
- 1998-06-03 SE SE9801965A patent/SE522045C2/sv not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
RU2136078C1 (ru) | 1999-08-27 |
JP2000516042A (ja) | 2000-11-28 |
JP3667773B2 (ja) | 2005-07-06 |
KR100431031B1 (ko) | 2004-07-27 |
US6261492B1 (en) | 2001-07-17 |
WO1998015974A1 (fr) | 1998-04-16 |
KR19990072027A (ko) | 1999-09-27 |
SE522045C2 (sv) | 2004-01-07 |
SE9801965L (sv) | 1998-06-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
NUG | Patent has lapsed |