US6791405B2 - Triangular wave generating circuit used in a Class-D amplifier - Google Patents

Triangular wave generating circuit used in a Class-D amplifier Download PDF

Info

Publication number
US6791405B2
US6791405B2 US10/400,357 US40035703A US6791405B2 US 6791405 B2 US6791405 B2 US 6791405B2 US 40035703 A US40035703 A US 40035703A US 6791405 B2 US6791405 B2 US 6791405B2
Authority
US
United States
Prior art keywords
output
amplifier
current
unit
predetermined voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
US10/400,357
Other languages
English (en)
Other versions
US20040036529A1 (en
Inventor
Nobuaki Tsuji
Masao Noro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yamaha Corp
Original Assignee
Yamaha Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yamaha Corp filed Critical Yamaha Corp
Assigned to YAMAHA CORPORATION reassignment YAMAHA CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: NORO, MASAO, TSUJI, NOBUAKI
Publication of US20040036529A1 publication Critical patent/US20040036529A1/en
Application granted granted Critical
Publication of US6791405B2 publication Critical patent/US6791405B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K4/00—Generating pulses having essentially a finite slope or stepped portions
    • H03K4/06—Generating pulses having essentially a finite slope or stepped portions having triangular shape
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217—Class D power amplifiers; Switching amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/351—Pulse width modulation being used in an amplifying circuit

Definitions

  • the present invention relates to a Class-D amplifier mainly used for power amplification of an audio signal and in particular to a triangular wave generating circuit used to convert an analog audio signal to a pulse signal.
  • FIG. 6 is a block diagram showing an exemplary configuration of a Class-D amplifier.
  • a numeral 101 represents an analog signal input terminal, 102 a triangular wave generating circuit, 103 an integrator, 104 a voltage comparator for comparing the output of the integrator 103 with the output of the triangular wave generating circuit 102 , 105 a pulse amplifier, 106 , 106 ′ switching elements controlled to turn ON/OFF by the output of the pulse amplifier 105 , and 109 , 109 ′ positive and negative power sources.
  • a numeral 110 represents a resistor for feeding back a PWM signal obtained at the junction of the switching elements 106 and 106 ′ to the integrator 103 . The resistor 110 and a resistor 111 determine the feedback amount.
  • a capacitor 112 is a DC cutoff capacitor.
  • a numeral 107 represents an LPF (low-pass filter) and 108 represents a load.
  • FIG. 7 is a waveform diagram showing the waveform of each section of FIG. 6 .
  • FIG. 7A shows the waveform of the output S 1 of the triangular wave generating circuit 102
  • FIG. 7B the waveform of an analog signal S 2 input to the input terminal 101
  • FIG. 7C the waveform of a signal (PWM signal) on the non-inverted output terminal of the voltage comparator circuit 104
  • FIG. 7D the waveform of an output signal S 4 of the LPF 107 .
  • FIG. 7A shows the waveform of the output S 1 of the triangular wave generating circuit 102
  • FIG. 7B the waveform of an analog signal S 2 input to the input terminal 101
  • FIG. 7C the waveform of a signal (PWM signal) on the non-inverted output terminal of the voltage comparator circuit 104
  • FIG. 7D the waveform of an output signal S 4 of the LPF 107 .
  • FIG. 8 is a waveform diagram showing the waveforms of the output S 1 of the triangular wave generating circuit 102 , signals at the output terminals R 1 , R 2 of the voltage comparator 104 , and a signal at the junction Q of the switching elements 106 , 106 ′.
  • a sign P represents the output of the integrator 103 and a sign P′ an ideal waveform of the output of the integrator 103 .
  • the analog input signal S 2 is supplied to the voltage comparator via the integrator 103 .
  • the signal is compared with the output S 1 of the triangular wave generating circuit 101 and converted to a PWM-modulated pulse signal in the voltage comparator 104 (see FIG. 8 B and FIG. 8 C).
  • the signal is amplified by the pulse amplifier 105 and switching-amplified by the switching elements 106 , 106 ′.
  • the switching-amplified signal is turned into the analog signal S 4 by the LPF 107 and output to the load 108 .
  • FIG. 9 is a circuit diagram showing the details of the Class-D amplifier shown in FIG. 6 .
  • the integrator 103 comprises an operational amplifier 121 and a capacitor inserted between the non-inverted input terminal and the output terminal of the operational amplifier 121 .
  • the LPF 107 comprises a coil 124 and a capacitor 125 .
  • the precision of a triangular wave generated in the triangular wave generating circuit 103 has a great effect on the distortion of amplification. Thus, it is quite important to generate a high-precision triangular wave with negligible variations in the peak value and a negligible offset deviation.
  • FIG. 10 is a circuit diagram showing an exemplary configuration of a related art triangular wave generating circuit.
  • a numeral 1 represents an input terminal where a clock pulse of a duty ratio of 50 percent is input, 2 an amplifier, 3 a resistor, 4 an operational amplifier, 5 a capacitor, and 6 an output terminal.
  • a pulse input to the input terminal goes high and low alternately, recharging/discharging of the capacitor 5 takes place accordingly, and an output voltage Vout changes in a shape of a triangle.
  • FIG. 11 is a circuit diagram showing another exemplary configuration of a related art triangular wave generating circuit.
  • numerals 1 , 2 , 4 through 6 are same as those in FIG. 10 .
  • Numerals 11 , 12 represent switch elements controlled to turn ON/OFF by the output of the amplifier 2 .
  • Numerals 13 , 14 represent are respectively constant-current circuits.
  • the switch element 11 when the switch element 11 is turned ON and the switch element 12 is turned OFF, the capacitor 5 is recharged by a current I 1 .
  • the switch element 11 is turned OFF and the switch element 12 is turned ON, the capacitor 5 is recharged in a direction opposite to the above direction by a current I 2 . This operation is repeated to cause the output voltage Vout to be changed in a shape of a triangle.
  • the output voltage Vout depends on the value R of the resistor 3 , the capacitance C of the capacitor 5 and the amplitude and frequency of the input clock pulse.
  • the value R of the resistor 3 and the capacitance C of the capacitor 5 are varied so that the peak value of the output voltage Vout does not stay constant.
  • FIG. 12A shows a triangular wave free from an offset deviation.
  • the invention has been proposed under such circumstances and aims at providing a triangular wave generating circuit used in a Class-D amplifier which can generate a high-precision triangular wave free from variations in the peak value or offset deviation.
  • the invention is characterized by having the following arrangement.
  • a triangular wave generating circuit used in a Class-D amplifier comprising:
  • an integrating unit including an amplifier and a capacitor inserted between the input terminal and output terminal of the amplifier
  • a first constant-current unit which recharges the capacitor so that the output of the amplifier approaches a first predetermined voltage
  • a second constant-current unit which recharges the capacitor so that the output of the amplifier approaches a second predetermined voltage
  • a current setting unit which sets currents of the first and second constant-current units
  • a first switch unit which makes ON/OFF control of the current flowing in the first constant-current unit
  • a second switch unit which makes ON/OFF control of the current flowing in the second constant-current unit
  • a first comparing unit which compares the output of the amplifier with the first predetermined voltage and outputs a signal when the output of the amplifier coincides with the first predetermined voltage
  • a second comparing unit which compares the output of the amplifier with the second predetermined voltage and outputs a signal when the output of the amplifier coincides with the second predetermined voltage
  • a flip-flop whose output signal is inverted depending on the output of the first and second comparing unit, the flip-flop making ON/OFF control of the first and second switch units.
  • phase comparing unit which compares the phase of an externally supplied clock pulse with the phase of the output of the flip-flop
  • a low-pass filter for removing the high-frequency component of the output of the phase comparing unit
  • a current control unit which controls the currents of the first and second constant-current unit.
  • a triangular wave generating circuit used in a Class-D amplifier comprising:
  • an integrating unit including an amplifier and a capacitor inserted between the input terminal and output terminal of the amplifier
  • a first current mirror circuit which recharges the capacitor so that the output of the amplifier approaches a first predetermined voltage
  • a second current mirror circuit which recharges the capacitor so that the output of the amplifier approaches a second predetermined voltage
  • a first switch unit which makes ON/OFF control of the current flowing in the first current mirror circuit
  • a second switch unit which makes ON/OFF control of the current flowing in the current mirror circuit
  • a first comparing unit which compares the output of the amplifier with the first predetermined voltage and outputs a signal when the output of the amplifier coincides with the first predetermined voltage
  • a second comparing unit which compares the output of the amplifier with the second predetermined voltage and outputs a signal when the output of the amplifier coincides with the second predetermined voltage
  • a flip-flop whose output signal is inverted depending on the output of the first and second comparing units, the flip-flop making ON/OFF control of the first and second switch units;
  • phase comparing unit which compares the phase of an externally supplied clock pulse with the phase of the output of the flip-flop
  • a low-pass filter which removes the high-frequency component of the output of the phase comparing unit, and a current control unit which controls the currents of the first and second current mirror circuits.
  • a Class-D amplifier comprising:
  • a modulation stage which PWM-modulates an input signal by using a triangular wave output from a triangular wave generating circuit
  • a switching amplification stage which makes switching amplification of the output of the modulation stage by using a switching element
  • the triangular wave generating circuit includes,
  • a voltage divider circuit for dividing the positive source voltage and negative source voltage of the switching amplification stage at a predetermined division ratio respectively and outputting the resulting voltages as a first voltage and a second voltage
  • an integrating unit including an amplifier and a capacitor inserted between the input terminal and output terminal of the amplifier
  • a first constant-current unit which recharges the capacitor so that the output of the amplifier approaches a first predetermined voltage
  • a current setting unit which sets currents of the first and second constant-current units
  • a first switch unit which makes ON/OFF control of the current flowing in the first constant-current units
  • a first comparing unit which compares the output of the amplifier with the first predetermined voltage and outputs a signal when the output of the amplifier coincides with the first predetermined voltage
  • a second comparing unit which compares the output of the amplifier with the second predetermined voltage and outputs a signal when the output of the amplifier coincides with the second predetermined voltage
  • a flip-flop whose output signal is inverted depending on the output of the first and second comparing units, the flip-flop making ON/OFF control of the first and second switch units.
  • FIG. 1 is a block diagram showing the configuration of a triangular wave generating circuit according to one embodiment of the invention
  • FIGS. 2A to 2 G are a timing chart to describe the operation of this embodiment
  • FIG. 3 is a circuit diagram showing a specific configuration of a circuit section comprising a resistor 31 , an FET 32 , a load circuit 33 , constant-current circuits 34 , 35 , and switch elements 36 , 37 in this embodiment;
  • FIG. 4 is a block diagram showing the configuration of a triangular wave generating circuit according to another embodiment of the invention.
  • FIG. 5 is a circuit diagram showing an exemplary configuration of a Class-D amplifier using a triangular wave generating circuit shown in FIG. 4;
  • FIG. 6 is a block diagram showing the configuration of a general Class-D amplifier
  • FIGS. 7A to 7 D are waveform diagrams showing the waveform on each section of the Class-D amplifier
  • FIG. 8 is a waveform diagram showing the waveform on each section of the Class-D amplifier
  • FIG. 9 is a circuit diagram showing the detailed configuration of the Class-D amplifier.
  • FIG. 10 is a circuit diagram showing an exemplary configuration of a related art triangular wave generating circuit
  • FIG. 11 is a circuit diagram showing another exemplary configuration of a related art triangular wave generating circuit
  • FIGS. 12A and 12B are waveform diagrams illustrating the problems with the triangular wave generating circuit shown in FIG. 11 .
  • FIG. 1 is a circuit diagram showing the configuration of a triangular wave generating circuit according to a first embodiment of the invention.
  • a numeral 21 represents a terminal where a reference clock pulse CK is input.
  • a numeral 22 represent a digital phase comparator which compares the phase of the clock pulse CK input to the reference input terminal IN with the phase of a signal NFB at the comparison input terminal REF and outputs a signal at the high level from an output terminal UP or an output terminal DW in accordance with the comparison result.
  • a numeral 23 represents a loop filter which converts the output of the phase comparator circuit 22 to an analog signal PLLC and outputs the signal PLLC.
  • a numeral 24 represents a circuit formed by capacitors 25 , 26 and a resistor 27 . The capacitors 25 , 26 , the resistor 27 and the loop filter 23 constitute a low-pass filter to remove the high-frequency of the output of the loop filter 23 .
  • a numeral 30 represent an operational amplifier.
  • the output PLLC of the loop filter is input to its non-inverted input terminal, and its inverted input terminal is connected to the source of an FET (field-effect transistor) 32 .
  • the output terminal of the operational amplifier is connected to the gate of the FET 32 .
  • the source of the FET 32 is grounded via a resistor 31 .
  • the drain of the FET 32 is connected to a negative power source ( ⁇ 5 V) via a load circuit 33 .
  • the load circuit 33 works as a load on the FET 32 and comprises a single FET.
  • the operational amplifier 30 , the FET 32 and the resistor 31 constitutes a circuit for controlling a current flowing in the load circuit 33 depending on the level of the output PLLC of the loop filter 23 .
  • Numerals 34 , 35 represent constant-current circuits and their current values are controlled by a current flowing in the load circuit 33 .
  • Numerals 36 , 37 represent switch elements which are controlled to turn ON/OFF by the signal NFB. When the signal NFB is low, the switch elements 36 and 37 is ON and OFF, respectively. When the signal NFB is high, the switch elements 36 and 37 are Off and ON, respectively.
  • a numeral 39 represents an operational amplifier. The non-inverted input terminal of the operational amplifier is grounded and its inverted input terminal is connected to the junction of the switch elements 36 , 37 , and its output terminal is connected to an output terminal 46 .
  • a numeral 40 represents a capacitor inserted between the inverted input terminal and the output terminal of the operational amplifier 39 .
  • the operational amplifier 39 and the capacitor 40 constitute an integrating circuit.
  • a numeral 41 represents a comparator circuit.
  • the output of the operational amplifier 39 is input to its inverted input terminal, and a voltage of +1 V is input to its non-inverted input terminal.
  • a numeral 42 is a comparator circuit.
  • the output of the operational amplifier 39 is input to its inverted input terminal and a voltage of ⁇ 1 V is input to its non-inverted input terminal.
  • the output of the comparator 41 is input to one of the input terminals of a NAND gate 44 .
  • the output of the comparator 42 is input to one of the input terminals of a NAND gate 45 via an inverter 43 .
  • the NAND gates 44 , 45 constitute an RS (set/reset) flip-flop, whose output is supplied, as the signal NFB, to switch elements 36 , 37 and the phase comparator 22 .
  • a triangular wave generating circuit shown in FIG. 1 is a PLL (phase-locked loop) circuit.
  • an output voltage Vout by a triangular wave is obtained on the output terminal 46 .
  • the speeds of rise and fall of the triangular wave are determined by the current values of the constant-current circuits 34 , 35 . In case the current value is large, the leading edge and the trailing edge of the waveform are steeper. In case the current value is small, the leading edge and the trailing edge of the waveform are flatter. While voltages of +1 V and ⁇ 1 V are input to the comparator circuits 41 , 42 , other predetermined voltages may be input to the comparator circuits 41 , 42 .
  • Circuits for determining the current values of the constant-current circuits 34 , 35 are the phase comparator circuit 22 , the loop filter 23 , the low-pass filter 24 , the operational amplifier 30 , the resistor 31 , the FET 32 and the load circuit 33 . Operation of these circuits will be described.
  • the phase comparator circuit 22 compares the phase of the signal NFB and the phase of the clock pulse CK, and outputs a signal depending on the comparison result to the loop filter 23 .
  • the loop filter 23 outputs the analog signal PLLC (FIG. 2G) corresponding to the output of the phase comparison circuit 22 to the operational amplifier 30 via a low-pass filter 24 .
  • the operational amplifier 30 controls the current flowing in the load circuit 33 based on the signal PLLC. When the level of the signal PLLC becomes larger, the output of the operational amplifier 30 rises, which decreases the source-to-gate bias of the FET 32 thus reducing the current flowing in the load circuit 33 . When the level of the signal PLLC becomes smaller, the output of the operational amplifier 30 drops, which increases the source-to-gate bias of the FET 32 thus increasing the current flowing in the load circuit 33 .
  • the triangular wave generating circuit in this embodiment it is possible to obtain a triangular wave having the same period as the reference clock pulse CK on the output terminal 46 .
  • the peak voltage of the triangular wave is accurately specified by the voltage ⁇ 1 V input to the comparator circuits 41 , 42 so that it is possible to obtain a triangular wave without any variation in the peak voltage.
  • the recharging/discharging current is determined by the constant-current circuits 34 , 35 and stays at the same level. This avoids an offset deviation.
  • N, NG, P and PG represent N channels of FET and P channels of FET, respectively.
  • the load circuit 33 comprises an FET 50 .
  • the gate of the FET 50 is connected to the source of the FET 50 and the gate of the FET 51 .
  • a circuit including the FET 50 , the FET 32 and the resistor 31 and serially connected circuits including FETs 51 through 54 constitute a current mirror circuit.
  • the same current flows in the FET 50 and the FETs 51 through 54 .
  • the gate of the FET 53 is connected to the source of the FET 53 and the gate of the FET 55 .
  • the gate of the FET 54 is connected to the source of the FET 54 and the gate of the FET 56 .
  • serially connected circuits including FETs 51 through 54 and serially connected circuits including FETs 55 through 58 constitute a current mirror circuit.
  • the FET 52 serves to adjust the ON resistance of the circuits.
  • the gate of the FET 57 is connected to the source of the FET 57 and the gate of the FET 63 .
  • Serially connected circuits including FETs 55 through 58 and serially connected circuits including FETs 59 through 64 constitute a current mirror circuit. The same current flows in the serially connected circuits comprising FETs 55 through 58 and the serially connected circuits comprising FETs 59 through 64 .
  • the gate of the FET 60 is connected to the source of the FET 60 and the gate of the FET 66 .
  • Serially connected circuits including FETs 59 through 64 and serially connected circuits including FETs 65 through 67 constitute a current mirror circuit. The same current flows in both circuits.
  • the gate of the FET 57 is connected to the gate of the FET 69 .
  • the same current flows in the serially connected circuits including FETs 55 through 58 and serially connected circuits including FETs 68 through 70 .
  • the FET 65 constitutes the switch element 36 of FIG. 1 and the FET 70 constitutes the switch element 37 of FIG. 1 .
  • the FETs 58 , 59 , 62 , 64 , 68 are FETs for adjusting ON resistance.
  • the FETs 71 , 72 and the amplifier 73 are circuits for halting generation of a triangular wave.
  • the same current as that flowing in the FET 50 flows in the serially connected circuits including FETs 65 through 67 when the FET 65 is turned ON, and the serially connected circuits including FETs 68 through 70 when the FET 70 is turned ON.
  • a gain G from the input terminal P of the comparator 104 to the junction Q of the switching elements 106 , 106 ′ is obtained by the expression below.
  • the maximum value and minimum value of the output S 1 of the triangular wave generating circuit 102 as VP and VM respectively
  • the source voltage input to the switching element 106 as VPX (positive power source)
  • the source voltage input to the switching element 106 ′ as VMX (negative power source)
  • the amplitude of the signal appearing on the input terminal P is (VP ⁇ VM)
  • the amplitude of the signal appearing on the output terminal Q is (VPX ⁇ VMX)
  • the source voltages VPX and VMX may vary.
  • the aforementioned gain G varies, and as a result, stability of a system changes and a stability more than necessary must be provided.
  • a high stability power source may be used as an input to the switching elements 106 , 106 ′ to suppress the variation in the gain. This results in a complicated and costly power circuit design.
  • the second embodiment described hereinafter provides a circuit which prevents variations in the gain without using a high stability power source.
  • FIG. 4 is a circuit diagram showing the configuration of a triangular wave generating circuit according to the second embodiment.
  • the circuit shown in this figure differs from that shown in FIG. 1 with respect to signals input to the non-inverted input terminals of the comparators 41 , 42 .
  • certain voltages are input to these non-inverted input terminals.
  • a voltage obtained by dividing the source voltage VPX by resistors 81 , 82 is input to the non-inverted input terminal of the comparator circuit 41 while a voltage obtained by dividing the source voltage VMX by resistors 83 , 84 is input to the non-inverted input terminal of the comparator circuit 42 .
  • the resistance values (R81, R83) of the resistors 81 and the resistor 83 are the same and the resistance values (R82, R84) of the resistors 82 and the resistor 84 are the same.
  • voltages V1 and V2 obtained below are input to the non-inverted input terminals of the comparator circuits 41 , 42 :
  • V 1 VPX/a (2)
  • V 2 VMX/a (3)
  • the gain G is not influenced by variations in the source voltages VPX, VMX supplied to the switching elements 106 , 106 ′.
  • the gain G stays constant even when the source voltages VPX, VMX vary.
  • FIG. 5 is a circuit diagram showing an example of Class-D amplifier using a triangular wave generating circuit shown in FIG. 1 .
  • the sections equivalent to those in FIG. 9 are given the same numerals and signs.
  • the circuit shown in FIG. 5 differs from that shown in FIG. 9 : the inverted input terminal of the comparator 104 is connected to the common terminal of a manual selector switch 91 , a first contact of the switch 91 is connected to the common terminal of a switch 92 which can be manually selected, and a second contact of the switch 91 is connected to the output terminal of the triangular wave generating circuit 102 .
  • the switch 92 is driven by a signal on the non-inverted output terminal R 2 of the comparator 104 .
  • the common terminal When the signal on the non-inverted output terminal R 2 is high, the common terminal is connected to the first contact. When it is low, the common terminal is connected to the second contact.
  • To the first contact and second contact of the switch 92 are supplied the voltages VM3 and VP3 respectively.
  • the voltages VM3 and VP3 are obtained using the following expressions:
  • the gain G is not influenced by variations in the source voltages VPX, VMX supplied to the switching elements 106 , 106 ′.
  • the invention it is possible to generate a high-precision triangular wave with negligible variations in the peak value and a negligible offset deviation. According to the invention, it is further possible to obtain stable operation not influenced by variations in the source voltages supplied to switching elements.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
US10/400,357 2002-03-28 2003-03-27 Triangular wave generating circuit used in a Class-D amplifier Expired - Fee Related US6791405B2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2002091867 2002-03-28
JPP2002-091867 2002-03-28
JPP2002-181772 2002-06-21
JP2002181772A JP3982342B2 (ja) 2002-03-28 2002-06-21 Ｄ級増幅器における三角波生成回路および該三角波生成回路を用いたｄ級増幅器

Publications (2)

Publication Number Publication Date
US20040036529A1 US20040036529A1 (en) 2004-02-26
US6791405B2 true US6791405B2 (en) 2004-09-14

Family

ID=30446242

Family Applications (1)

Application Number Title Priority Date Filing Date
US10/400,357 Expired - Fee Related US6791405B2 (en) 2002-03-28 2003-03-27 Triangular wave generating circuit used in a Class-D amplifier

Country Status (4)

Country Link
US (1) US6791405B2 (ja)
JP (1) JP3982342B2 (ja)
KR (1) KR100606378B1 (ja)
TW (1) TWI294720B (ja)

Cited By (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040169553A1 (en) * 2003-02-28 2004-09-02 Yamaha Corporation Pulse width modulation amplifier
US20050200389A1 (en) * 2004-03-15 2005-09-15 Day Brandon D. Frequency programmable feed-forward oscillator and triangle wave generator
US20060001461A1 (en) * 2004-07-02 2006-01-05 Yamaha Corporation Triangular wave generating circuit adapted to class-D amplifier
US20060091874A1 (en) * 2002-12-27 2006-05-04 Kesatoshi Takeuchi Sawtooth wave generating apparatus, a method of generating sawtooth wave, a constant current circuit, and a method of adjusting amount of current from the same
US20060119422A1 (en) * 2004-11-02 2006-06-08 Satoshi Sakurai Semiconductor device including current control circuit of reference current source
US20060197570A1 (en) * 2005-02-24 2006-09-07 Samsung Electronics Co., Ltd. Pulse-width modulation circuits of self-oscillation type and pulse-width modulation methods
US20060208793A1 (en) * 2005-03-18 2006-09-21 Yamaha Corporation Class D amplifier
US20070273452A1 (en) * 2006-02-27 2007-11-29 Nec Electronics Corporation Triangular-wave generating apparatus incorporating capacitor
US20080101628A1 (en) * 2006-10-27 2008-05-01 Pacifictech Microelectronics, Inc. Switching amplifier circuits and methods
US7388413B1 (en) * 2005-07-14 2008-06-17 Microsemi Corporation Ramp generator with fast reset
US20080143394A1 (en) * 2006-12-13 2008-06-19 Atmel Corporation Amplitude controlled sawtooth generator
US20080161953A1 (en) * 2007-01-03 2008-07-03 Pacifictech Microelectronics, Incorporated Low distortion switching amplifier circuits and methods
US20080303507A1 (en) * 2005-12-15 2008-12-11 Koninklijke Philips Electronics N.V. Current Measurement Circuit and Method
US7551028B1 (en) * 2006-12-11 2009-06-23 Marvell International Ltd. Signal generators for current-mode three-level digital amplifiers
US20100007387A1 (en) * 2008-07-14 2010-01-14 Elite Semiconductor Memory Technology Inc. Triangular wave generating circuit having synchronization with external clock
US20100045350A1 (en) * 2008-08-20 2010-02-25 Rohm Co., Ltd. Semiconductor Device and Amplification Device Generating Triangular Wave Synchronized with Clock Signal
US7800419B2 (en) 2006-12-13 2010-09-21 Atmel Corporation Differential amplitude controlled sawtooth generator
US8441316B2 (en) 2011-01-06 2013-05-14 Diodes Incorporated Switching supply circuits and methods
TWI397260B (zh) * 2009-08-18 2013-05-21 Elite Semiconductor Esmt 三角波產生器及其方法
US8633740B2 (en) 2011-09-08 2014-01-21 Intel Mobile Communications Triangular waveform generator having differential output synchronized with external clock signal
GB2519540A (en) * 2013-10-23 2015-04-29 Wolfson Microelectronics Plc Class-D Amplifier Circuits
US20150200659A1 (en) * 2014-01-15 2015-07-16 Elite Semiconductor Memory Technology Inc. Triangular wave generating circuit to provide clock synchronization
AU2014295834B2 (en) * 2014-03-28 2016-03-10 Shenzhen Skyworth-Rgb Electronic Co., Ltd. A class D amplifier chip with duty ratio limiting functions and the device thereof

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4356625B2 (ja) 2005-02-14 2009-11-04 ヤマハ株式会社 デジタルアンプ
US7557622B2 (en) * 2005-10-17 2009-07-07 Harman International Industries, Incorporated Precision triangle waveform generator
KR101128520B1 (ko) * 2005-10-24 2012-03-27 삼성전자주식회사 디지털 오디오 증폭기 및 이에 적합한 디지털 오디오 신호증폭 방법
KR100929953B1 (ko) 2006-07-07 2009-12-04 야마하 가부시키가이샤 오프셋 전압 보정 회로 및 ｄ급 증폭기
JP4824599B2 (ja) * 2007-02-21 2011-11-30 セイコーインスツル株式会社 三角波生成回路
EP2127070B1 (en) * 2007-03-14 2018-12-26 Nxp B.V. A data processing system for clipping correction
JP4973891B2 (ja) * 2008-02-07 2012-07-11 オンキヨー株式会社 パルス幅変調回路及びそれを用いたスイッチングアンプ
CN102594272B (zh) * 2010-02-26 2015-05-27 比亚迪股份有限公司 一种用于降低d类音频功率放大器电磁干扰的电路
US11152927B1 (en) * 2020-03-25 2021-10-19 Richtek Technology Corporation Low distortion triangular wave generator circuit and low distortion triangular wave generation method
CN114268301B (zh) * 2022-02-28 2022-06-14 成都明夷电子科技有限公司 一种带有自校准offset功能的LOS检测电路及检测方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62242410A (ja) * 1986-04-14 1987-10-23 Mitsubishi Electric Corp 弛張発振回路
US5642066A (en) * 1995-05-24 1997-06-24 Ail System, Inc. Linear ramp generator having two voltage controlled current sources
US6121805A (en) * 1998-10-08 2000-09-19 Exar Corporation Universal duty cycle adjustment circuit
US6320460B1 (en) 2000-05-30 2001-11-20 Ivan Meszlenyi Class D amplifier

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62242410A (ja) * 1986-04-14 1987-10-23 Mitsubishi Electric Corp 弛張発振回路
US5642066A (en) * 1995-05-24 1997-06-24 Ail System, Inc. Linear ramp generator having two voltage controlled current sources
US6121805A (en) * 1998-10-08 2000-09-19 Exar Corporation Universal duty cycle adjustment circuit
US6320460B1 (en) 2000-05-30 2001-11-20 Ivan Meszlenyi Class D amplifier

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Vidal et al. "Amplitude stabilization in a triangle wave quadrature oscillator" IEEE 39<th >Midwest symposium on Circuits & Systems vol. 3 Aug. 18-25, 1996 pp 1083-1086. *
Vidal et al. "Amplitude stabilization in a triangle wave quadrature oscillator" IEEE 39th Midwest symposium on Circuits & Systems vol. 3 Aug. 18-25, 1996 pp 1083-1086.

Cited By (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060091874A1 (en) * 2002-12-27 2006-05-04 Kesatoshi Takeuchi Sawtooth wave generating apparatus, a method of generating sawtooth wave, a constant current circuit, and a method of adjusting amount of current from the same
US7471125B2 (en) 2002-12-27 2008-12-30 Seiko Epson Corporation Sawtooth wave generating apparatus, a method of generating sawtooth wave, a constant current circuit, and a method of adjusting amount of current from the same
US20080054997A1 (en) * 2002-12-27 2008-03-06 Kesatoshi Takeuchi Sawtooth wave generating apparatus, a method of generating sawtooth wave, a constant current circuit, and a method of adjusting amount of current from the same
US7339406B2 (en) * 2002-12-27 2008-03-04 Seiko Epson Corporation Sawtooth wave generating apparatus, a method of generating sawtooth wave, a constant current circuit, and a method of adjusting amount of current from the same
US20040169553A1 (en) * 2003-02-28 2004-09-02 Yamaha Corporation Pulse width modulation amplifier
US6956431B2 (en) * 2003-02-28 2005-10-18 Yamaha Corporation Pulse width modulation amplifier
US20050200389A1 (en) * 2004-03-15 2005-09-15 Day Brandon D. Frequency programmable feed-forward oscillator and triangle wave generator
US7256623B2 (en) * 2004-03-15 2007-08-14 Intersil Americas Inc. Frequency programmable feed-forward oscillator and triangle wave generator
US20060001461A1 (en) * 2004-07-02 2006-01-05 Yamaha Corporation Triangular wave generating circuit adapted to class-D amplifier
US7183818B2 (en) 2004-07-02 2007-02-27 Yamaha Corporation Triangular wave generating circuit adapted to class-D amplifier
US20060119422A1 (en) * 2004-11-02 2006-06-08 Satoshi Sakurai Semiconductor device including current control circuit of reference current source
US7323919B2 (en) * 2005-02-24 2008-01-29 Samsung Electronics Co., Ltd. Pulse-width modulation circuits of self-oscillation type and pulse-width modulation methods
US20060197570A1 (en) * 2005-02-24 2006-09-07 Samsung Electronics Co., Ltd. Pulse-width modulation circuits of self-oscillation type and pulse-width modulation methods
US20060208793A1 (en) * 2005-03-18 2006-09-21 Yamaha Corporation Class D amplifier
CN1835394B (zh) * 2005-03-18 2010-05-12 雅马哈株式会社 D类放大器
US7436254B2 (en) * 2005-03-18 2008-10-14 Yamaha Corporation Class D amplifier
US7388413B1 (en) * 2005-07-14 2008-06-17 Microsemi Corporation Ramp generator with fast reset
US7952343B2 (en) * 2005-12-15 2011-05-31 Chimei Innolux Corporation Current measurement circuit and method
US20080303507A1 (en) * 2005-12-15 2008-12-11 Koninklijke Philips Electronics N.V. Current Measurement Circuit and Method
US7626430B2 (en) * 2006-02-27 2009-12-01 Nec Electronics Corporation Triangular-wave generating apparatus incorporating capacitor
US20070273452A1 (en) * 2006-02-27 2007-11-29 Nec Electronics Corporation Triangular-wave generating apparatus incorporating capacitor
US20080101628A1 (en) * 2006-10-27 2008-05-01 Pacifictech Microelectronics, Inc. Switching amplifier circuits and methods
US7551028B1 (en) * 2006-12-11 2009-06-23 Marvell International Ltd. Signal generators for current-mode three-level digital amplifiers
WO2008076773A3 (en) * 2006-12-13 2008-11-27 Atmel Corp Amplitude controlled sawtooth generator
US7671642B2 (en) * 2006-12-13 2010-03-02 Atmel Corporation Amplitude controlled sawtooth generator
WO2008076773A2 (en) * 2006-12-13 2008-06-26 Atmel Corporation Amplitude controlled sawtooth generator
US7800419B2 (en) 2006-12-13 2010-09-21 Atmel Corporation Differential amplitude controlled sawtooth generator
US20080143394A1 (en) * 2006-12-13 2008-06-19 Atmel Corporation Amplitude controlled sawtooth generator
US20080161953A1 (en) * 2007-01-03 2008-07-03 Pacifictech Microelectronics, Incorporated Low distortion switching amplifier circuits and methods
US8111846B2 (en) 2007-01-03 2012-02-07 Pacifictech Microelectronics, Inc. Low distortion switching amplifier circuits and methods
TWI470932B (zh) * 2007-01-17 2015-01-21 Atmel Corp 差分式振幅控制鋸齒波產生器及產生雙差分式鋸齒波信號之方法
US20100007387A1 (en) * 2008-07-14 2010-01-14 Elite Semiconductor Memory Technology Inc. Triangular wave generating circuit having synchronization with external clock
US7746130B2 (en) 2008-07-14 2010-06-29 Elite Semiconductor Memory Technology, Inc. Triangular wave generating circuit having synchronization with external clock
US20100045350A1 (en) * 2008-08-20 2010-02-25 Rohm Co., Ltd. Semiconductor Device and Amplification Device Generating Triangular Wave Synchronized with Clock Signal
TWI397260B (zh) * 2009-08-18 2013-05-21 Elite Semiconductor Esmt 三角波產生器及其方法
US8441316B2 (en) 2011-01-06 2013-05-14 Diodes Incorporated Switching supply circuits and methods
US8633740B2 (en) 2011-09-08 2014-01-21 Intel Mobile Communications Triangular waveform generator having differential output synchronized with external clock signal
GB2519540A (en) * 2013-10-23 2015-04-29 Wolfson Microelectronics Plc Class-D Amplifier Circuits
US9473087B2 (en) 2013-10-23 2016-10-18 Cirrus Logic, Inc. Class-D amplifier circuits
US9787261B2 (en) 2013-10-23 2017-10-10 Cirrus Logic, Inc. Class-D amplifier circuits
GB2519540B (en) * 2013-10-23 2018-05-09 Cirrus Logic Int Semiconductor Ltd Class-D Amplifier Circuits
US10171049B2 (en) 2013-10-23 2019-01-01 Cirrus Logic, Inc. Class-D amplifier circuits
US20150200659A1 (en) * 2014-01-15 2015-07-16 Elite Semiconductor Memory Technology Inc. Triangular wave generating circuit to provide clock synchronization
US9300281B2 (en) * 2014-01-15 2016-03-29 Elite Semiconductor Memory Technology Inc. Triangular wave generating circuit to provide clock synchronization
AU2014295834B2 (en) * 2014-03-28 2016-03-10 Shenzhen Skyworth-Rgb Electronic Co., Ltd. A class D amplifier chip with duty ratio limiting functions and the device thereof

Also Published As

Publication number Publication date
US20040036529A1 (en) 2004-02-26
KR100606378B1 (ko) 2006-07-28
KR20030078761A (ko) 2003-10-08
TW200401505A (en) 2004-01-16
JP3982342B2 (ja) 2007-09-26
JP2004007324A (ja) 2004-01-08
TWI294720B (en) 2008-03-11

Similar Documents

Publication Publication Date Title
US6791405B2 (en) Triangular wave generating circuit used in a Class-D amplifier
US8164316B2 (en) DC/DC converter
US7592792B2 (en) Power supply
US8970199B2 (en) Electronic device and method for DC-DC conversion with variable bias current
US7489119B2 (en) DC to DC converter with reference voltage loop disturbance compensation
US7859324B2 (en) Power supply unit
US6522115B1 (en) Pulse-width-modulated DC-DC converter with a ramp generator
US7348812B2 (en) Multiphased triangular wave oscillating circuit and switching regulator using it
US20060273769A1 (en) Pulse modulation system with nonlinear ramp
US20060208798A1 (en) Compensation of nonlinearity introduced by dead time in switching output stage
US7518442B1 (en) Circuit and method for suppressing switching and supply-related errors in a PWM power stage by instantaneous per-pulse feedback
CN101425750A (zh) 电源控制器及其方法
US7183818B2 (en) Triangular wave generating circuit adapted to class-D amplifier
US7817399B2 (en) PWM drive apparatus and method for correcting output offset thereof
US20070035259A1 (en) Inverter controller with feed-forward compensation
US20240039384A1 (en) Current detection circuit and controller for switching converter circuit
US6407603B2 (en) Analog voltage isolation circuit
US6381154B1 (en) PWM nonlinear controller with a single cycle response and a non resettable integrator
EP1351061B1 (en) Power switch with current sense circuit
CN110086324B (zh) 切换式电源转换电路及其中的控制电路
CN101154930A (zh) 自动增益控制电路
US20090066309A1 (en) Switching regulator
US5821735A (en) Accumulator charging circuit
US11316528B2 (en) PWM DAC with improved linearity and insensitivity to switch resistance
US20170077923A1 (en) High speed tracking current sense system

Legal Events

Date Code Title Description
AS Assignment

Owner name: YAMAHA CORPORATION, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:TSUJI, NOBUAKI;NORO, MASAO;REEL/FRAME:013924/0393

Effective date: 20030317

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 4

FPAY Fee payment

Year of fee payment: 8

REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Lapsed due to failure to pay maintenance fee

Effective date: 20160914