TWI489559B - 用三個或四個遮罩製備的氧化物終端溝槽 - Google Patents
用三個或四個遮罩製備的氧化物終端溝槽 Download PDFInfo
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- TWI489559B TWI489559B TW100109907A TW100109907A TWI489559B TW I489559 B TWI489559 B TW I489559B TW 100109907 A TW100109907 A TW 100109907A TW 100109907 A TW100109907 A TW 100109907A TW I489559 B TWI489559 B TW I489559B
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- 229910052751 metal Inorganic materials 0.000 claims description 56
- 239000002184 metal Substances 0.000 claims description 56
- 239000004065 semiconductor Substances 0.000 claims description 54
- 238000000034 method Methods 0.000 claims description 48
- 239000000758 substrate Substances 0.000 claims description 39
- 238000002955 isolation Methods 0.000 claims description 30
- 239000004020 conductor Substances 0.000 claims description 21
- 238000005530 etching Methods 0.000 claims description 16
- 210000000746 body region Anatomy 0.000 claims description 11
- 239000011810 insulating material Substances 0.000 claims description 10
- FGUUSXIOTUKUDN-IBGZPJMESA-N C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 Chemical compound C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 FGUUSXIOTUKUDN-IBGZPJMESA-N 0.000 claims description 4
- YTAHJIFKAKIKAV-XNMGPUDCSA-N [(1R)-3-morpholin-4-yl-1-phenylpropyl] N-[(3S)-2-oxo-5-phenyl-1,3-dihydro-1,4-benzodiazepin-3-yl]carbamate Chemical compound O=C1[C@H](N=C(C2=C(N1)C=CC=C2)C1=CC=CC=C1)NC(O[C@H](CCN1CCOCC1)C1=CC=CC=C1)=O YTAHJIFKAKIKAV-XNMGPUDCSA-N 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 4
- 238000011049 filling Methods 0.000 claims description 4
- GNFTZDOKVXKIBK-UHFFFAOYSA-N 3-(2-methoxyethoxy)benzohydrazide Chemical compound COCCOC1=CC=CC(C(=O)NN)=C1 GNFTZDOKVXKIBK-UHFFFAOYSA-N 0.000 claims description 2
- 230000004888 barrier function Effects 0.000 description 11
- 239000002019 doping agent Substances 0.000 description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 8
- 229920005591 polysilicon Polymers 0.000 description 8
- 230000015556 catabolic process Effects 0.000 description 7
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 7
- 229910052721 tungsten Inorganic materials 0.000 description 7
- 239000010937 tungsten Substances 0.000 description 7
- KGBXLFKZBHKPEV-UHFFFAOYSA-N boric acid Chemical compound OB(O)O KGBXLFKZBHKPEV-UHFFFAOYSA-N 0.000 description 6
- 239000004327 boric acid Substances 0.000 description 6
- 239000005380 borophosphosilicate glass Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 5
- 239000011521 glass Substances 0.000 description 4
- 230000005669 field effect Effects 0.000 description 3
- 238000002513 implantation Methods 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 229910018125 Al-Si Inorganic materials 0.000 description 2
- 229910018520 Al—Si Inorganic materials 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 239000007943 implant Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- 229910052779 Neodymium Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 229910052788 barium Inorganic materials 0.000 description 1
- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
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- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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Description
本發明主要是關於溝槽金屬氧化物半導體場效應管(MOSFET),更確切地說,是關於氧化物終端溝槽MOSFET以及僅用三個或四個遮罩製成的此類裝置及其製備方法。
DMOS(雙擴散MOS)電晶體是一類利用兩個順序擴散階梯,校準到一個公共邊上,以構成電晶體的通道區的金屬氧化物半導體場效應管(MOSFET)。DMOS電晶體通常是高電壓、高電流裝置,既可以作為分立式電晶體,也可以作為功率積體電路的元件。DMOS電晶體僅用很低的正向電壓降,就可以在單位面積上產生高電流。
典型的DMOS電晶體是一種叫做溝槽DMOS電晶體的裝置,其中通道位於溝槽的側壁上,閘極形成在溝槽中,溝槽從源極延伸到汲極。其溝槽閘極,佈滿了薄氧化層並且用多晶矽填充,這種溝槽閘極比平面垂直DMOS電晶體結構對電流的限制還低,因此它的導通電阻率較小。
然而,製備這種溝槽DMOS場效應管的傳統方法,需要五至六個遮罩工藝,不僅價格昂貴而且耗費時間。
製備溝槽MOSFET的傳統方法需要五至六個遮罩。第一個遮罩是一個深勢阱遮罩,它也可用於高壓終端。根據要製備的裝置是否是高
壓裝置,來選擇是否使用該遮罩。第二個遮罩是一個溝槽遮罩,用於為閘極和其他裝置結構,製備溝槽。第三個遮罩是一個本體遮罩,它也可用於製備終端區,保護閘極滑道中的閘極氧化物不會由於暴露於汲極電勢而受到破壞,並遮罩閘極墊/電極不受汲極電壓的影響。第四個遮罩是一個源極遮罩,將源極區移至遠離閘極滑道以及終端區的地方,使擊穿電流轉移出這些區域,提高非鉗位元感應開關(Unclamped inductive switching,簡稱UIS)性能。第四個遮罩也可用於製備通道終點。第五個遮罩是一個接觸遮罩,用於製備源極/本體和閘極接頭,第六個遮罩是一個金屬遮罩,用於將金屬層分成閘極和源極金屬區。
第1圖表示由上述傳統的六遮罩工藝製備的溝槽MOSFET 100的剖面圖。如第1圖所示,溝槽MOSFET 100包括位於主動區中的主動單元102和閘極滑道104。閘極滑道連接到主動單元102中的閘極上。略有風險的是,沿N-外延層111的頂面可能會形成一個接近晶片末端的p-反演通道(P-inversion channel)。這個p-反演通道如果從接面終端108開始,觸及晶片邊緣112,就會在源極/本體和汲極之間,引起洩露。在晶片邊緣112處,可將一個重摻雜的N+通道終點106短接至汲極,從而阻止這種p-反演通道觸及晶片邊緣112。
正是在這一前提下,我們提出了本發明的各種實施例。
鑒於上述問題,本發明提供一種用於製備絕緣終端半導體裝置的方法,包括:步驟a:在半導體襯底上,使用溝槽遮罩;
步驟b:通過溝槽遮罩,刻蝕半導體襯底,形成第一溝槽TR1、第二溝槽TR2和第三溝槽TR3,寬度分別為W1、W2和W3,其中第三溝槽TR3是最窄的溝槽,其中第一溝槽TR1包圍著第三溝槽TR3;步驟c:在第三溝槽TR3中製備導電材料,以構成閘極電極,在第二溝槽TR2中製備導電材料,以構成閘極滑道;步驟d:用絕緣材料填充第一溝槽TR1,以構成包圍著閘極電極的絕緣隔絕溝槽;步驟e:在整個襯底頂部,製備一個本體層;步驟f:在整個本體層頂部,製備一個源極層;步驟g:在半導體襯底上方,應用一個絕緣層;步驟h:在絕緣層上方,應用一個接觸遮罩;步驟i:穿過絕緣層,形成到源極層和到閘極滑道的接觸開口;並且步驟j:在絕緣層上,形成源極和閘極金屬區,分別與源極和閘極滑道接頭電接觸。
上述的方法,步驟j包括:在絕緣層上方,沉積一個金屬層;在金屬層上方,使用一個金屬遮罩;並且通過金屬遮罩,刻蝕金屬層,以形成閘極金屬和源極金屬。
上述的方法,步驟c包括:在第一溝槽TR1、第二溝槽TR2和第三溝槽TR3中,製備一個閘極電介質;
在第一溝槽TR1、第二溝槽TR2和第三溝槽TR3中,沉積導電材料,其中選取導電材料的厚度填滿第二溝槽TR2和第三溝槽TR3,但不填滿第一溝槽TR1;並且各向同性地回刻導電材料,以便在第三溝槽TR3中形成閘極電極,在第二溝槽TR2中形成閘極滑道,其中第一溝槽TR1中的導電材料被完全除去。
上述的方法,進行步驟e和步驟f無需使用額外的遮罩。
上述的方法,還包括:在第一溝槽TR1的底部,植入一個通道終點。
上述的方法,被絕緣隔絕溝槽包圍著的區域內部的源極和本體層,處於源極電勢,絕緣隔絕溝槽外部的源極和本體區,處於汲極電勢。
上述的方法,主動閘極形成在主動區中,絕緣隔絕溝槽鄰近所述的主動區。
上述的方法,半導體襯底還包括一個重摻雜的底層和一個次重摻雜的頂層,其中製備第一溝槽TR1,使第一溝槽TR1向下觸及到所述的重摻雜的底層中。
上述的方法,進行步驟a和步驟b僅使用一個單獨的遮罩,並且根據單獨遮罩中的開口,同時刻蝕第一溝槽TR1、第二溝槽TR2、第三溝槽TR3。
上述的方法,進行步驟a和步驟b包括:在半導體襯底上,使用第一溝槽遮罩;
刻蝕半導體襯底,以形成第一溝槽TR1和第二溝槽TR2;在半導體襯底上,使用第二溝槽遮罩;並且刻蝕半導體襯底,以形成第三溝槽TR3。
上述的方法,還包括:用絕緣材料填充第一溝槽TR1和第二溝槽TR2;並且製備第四溝槽TR4,其中第四溝槽TR4形成在第二溝槽TR2中的絕緣材料頂部。
上述的方法,製備第四溝槽TR4是利用所述的第二溝槽遮罩。
上述的方法,步驟c包括:在第三溝槽TR3中,製備一個閘極電介質;並且在第三溝槽TR3和第四溝槽TR4中,製備導電材料,以便在第三溝槽TR3中形成閘極電極,在第四溝槽TR4中形成閘極滑道。
本發明所提供的一個絕緣終端半導體裝置,包括:多個位於主動區中的閘極溝槽,每個閘極溝槽都含有一個導電閘極電極;一個閘極滑道;以及一個絕緣隔絕溝槽,位於包圍著主動區的終端區中,其中用絕緣材料填充絕緣隔絕溝槽,以形成半導體裝置的絕緣終端。
上述的絕緣終端半導體裝置,還包括遍及整個裝置的源極和本體區。
上述的絕緣終端半導體裝置,主動區中的源極和本體區處於
源極電勢,絕緣隔絕溝槽外部的源極和本體區處於汲極電勢。
上述的絕緣終端半導體裝置,閘極滑道形成在閘極滑道溝槽中。
上述的絕緣終端半導體裝置,還包括一個閘極接頭,其中閘極接頭和閘極滑道溝槽位於閘極溝槽之間的主動區中。
上述的絕緣終端半導體裝置,還包括一個植入到絕緣隔絕溝槽底部的通道終點。
上述的絕緣終端半導體裝置,半導體裝置還包括一個半導體襯底,該襯底具有一個重摻雜的底層和一個次重摻雜的頂層,其中絕緣隔絕溝槽觸及重摻雜的底層。
上述的絕緣終端半導體裝置,一部分閘極滑道形成在絕緣隔絕溝槽中的絕緣材料中。
上述的絕緣終端半導體裝置,還包括一個閘極接頭,其中閘極接頭和部分閘極滑道位於被絕緣隔絕溝槽包圍的區域之外。
上述的絕緣終端半導體裝置,絕緣隔絕溝槽鄰近主動區。
上述的絕緣終端半導體裝置,閘極溝槽與絕緣隔絕溝槽部分合併。
上述的絕緣終端半導體裝置,在絕緣隔絕溝槽中形成一個額外的閘極滑道。
本領域的技術人員閱讀以下較佳實施例的詳細說明,並參照附圖之後,本發明的這些和其他方面的優勢無疑將顯而易見。
100‧‧‧溝槽MOSFET
102/202/702‧‧‧主動單元
104/204/306/502/704/808/930/1022‧‧‧閘極滑道
106‧‧‧N+通道終點
108‧‧‧接面終端
112/312‧‧‧晶片邊緣
200/300/400/500/600/700/800‧‧‧氧化物終端溝槽MOSFET
206/308‧‧‧氧化物填充溝槽
207‧‧‧電介質
208/902/1002‧‧‧襯底
213/313‧‧‧閘極墊
302‧‧‧主動閘極溝槽
304‧‧‧絕緣氧化物溝槽
307‧‧‧含有硼酸的矽玻璃(BPSG)層
310‧‧‧多晶矽
314‧‧‧內部區域
315‧‧‧外部區域
316‧‧‧N-外延層
317‧‧‧N+襯底
318‧‧‧本體
319‧‧‧源極
A-A/B-B‧‧‧線
402/802‧‧‧閘極溝槽
602/604/708/806/1024‧‧‧通道終點
706‧‧‧氧化物終端
804‧‧‧氧化物絕緣溝槽
90/1004‧‧‧外延層
906/1006‧‧‧氧化層
90/1008‧‧‧第一掩膜
910/911/922/1010/1012/1014‧‧‧溝槽
912/1026‧‧‧氧化物
914‧‧‧薄氧化層
916‧‧‧第二掩膜
918‧‧‧閘極滑道空腔
920‧‧‧掩膜開口
924/1016‧‧‧閘極氧化物
926/1018‧‧‧導電材料
928/1020‧‧‧閘極電極
932/1030‧‧‧本體層
934/1032‧‧‧源極層
936/1034‧‧‧絕緣層
938/1036‧‧‧接觸掩膜
940/942/1039‧‧‧閘極接觸孔
944/1040‧‧‧勢壘金屬
946‧‧‧鎢插頭
948‧‧‧金屬層
950/1048‧‧‧閘極金屬
952/1046‧‧‧源極金屬
1038‧‧‧源極/本體接觸孔
1042‧‧‧導電插頭
1044‧‧‧金屬層
閱讀以下詳細說明並參照以下附圖之後,本發明的其他特徵和優勢將顯而易見。
第1圖表示一種傳統的溝槽MOSFET裝置的剖面圖。
第2圖表示依據本發明的第一實施例,一種氧化物終端溝槽MOSFET的剖面圖。
第3A圖表示依據本發明的第一實施例,氧化物終端溝槽MOSFET佈局的俯視圖。
第3B圖表示第3A圖中所示的氧化物終端溝槽MOSFET沿線A-A和B-B的合併剖面圖。
第3C圖表示第3A圖中所示的氧化物終端溝槽MOSFET沿線A-A的剖面圖。
第3D圖表示第3A圖中所示的氧化物終端溝槽MOSFET的交叉點C處的透視圖。
第4A圖表示依據本發明的第一實施例,氧化物終端溝槽MOSFET的第一可選佈局的俯視圖。
第4B圖表示第4A圖中所示的氧化物終端溝槽MOSFET沿線A-A和B-B的合併剖面圖。
第5A圖表示依據本發明的第一實施例,氧化物終端溝槽MOSFET的第二可選佈局的俯視圖。
第5B圖表示第5A圖中所示的氧化物終端溝槽MOSFET沿線A-A和B-B的合併剖面圖。
第6圖表示第3B圖所示的氧化物終端溝槽MOSFET的剖面圖,其通道終點植入在終端溝槽底部。
第7圖表示依據本發明的第二實施例,一種氧化物終端溝槽MOSFET的剖面圖。
第8A圖表示依據本發明的第二實施例,氧化物終端溝槽MOSFET佈局的剖面圖。
第8B圖表示第8A圖中所示的氧化物終端溝槽MOSFET沿線A-A和B-B的合併剖面圖,其通道終點植入在終端溝槽底部。
第9A-9O圖表示依據本發明的第一實施例,第2圖和第3A圖中所示的氧化物終端溝槽MOSFET的製備過程的剖面圖。
第10A-10K圖表示依據本發明的第二實施例,第7圖和第8A圖中所示類型的氧化物終端溝槽MOSFET的製備過程的剖面圖。
儘管為了解釋說明,以下詳細說明包含了許多具體細節,但是本領域的任何技術人員都應理解基於以下細節的多種變化和修正都屬本發明的範圍。因此,本發明的典型實施例的提出,對於請求保護的發明沒有任何一般性的損失,而且不附加任何限制。
在本發明的實施例中,用氧化物終端代替傳統溝槽MOSFET中的接面終端,從而消除了接面終端擊穿,提高了UIS性能,並且由於氧化物所需的空間比傳統的接面終端所需的空間小得多,從而節省了原來被接面終端所占的空間。此外,通過將嵌入式二極體限制在主動區,改善了反向恢復。
依據第一實施例,閘極滑道位於氧化物終端中。第2圖表示氧化物終端溝槽MOSFET 200的剖面圖。如第2圖所示,氧化物終端溝槽MOSFET 200包括一個位於主動區中的主動單元202,以及一個位於大型氧化物填充溝槽206內部的閘極滑道(Gate runner)204,大型氧化物填充溝槽206位於終端區中。含有硼酸的矽玻璃(BPSG)等電介質207,以及/或大型氧化物填充溝槽206,可用於使閘極墊213與汲極電壓絕緣。氧化物填充溝槽206,也稱為氧化物終端溝槽或絕緣溝槽,向下觸及到重摻雜襯底208中。氧化物終端溝槽206阻止p-反演層穿過它,從而不需要使用單獨帶遮罩的通道終點。氧化物終端溝槽MOSFET 200的氧化物終端結構消除了接面終端擊穿,從而提高了UIS性能。如圖下第9A-9O圖所示,製備氧化物終端溝槽MOSFET 200的方法僅僅需要四個遮罩:一個絕緣溝槽遮罩、一個閘極溝槽遮罩、一個接觸遮罩以及一個金屬遮罩。在本方法中,不再需要深勢阱遮罩、本體遮罩和源極遮罩。
第3A圖表示依據本發明的第一實施例的一種可選版本,氧化物終端溝槽MOSFET 300佈局的俯視圖,第3B圖表示氧化物終端溝槽MOSFET 300沿線A-A和B-B的合併剖面圖。
氧化物終端溝槽MOSFET 200和氧化物終端溝槽MOSFET 300的不同之處在於,氧化物終端溝槽MOSFET 200中的大型氧化物填充溝槽206被氧化物終端溝槽MOSFET 300中的較小的氧化物填充溝槽308和絕緣氧化物溝槽304代替,絕緣氧化物溝槽304作為氧化物終端溝槽MOSFET 300中的通道終點和裝置終端。較小的氧化物填充溝槽308和絕緣氧化物溝槽304比氧化物終端溝槽MOSFET 200中的大型氧化物填充溝槽206更加易
於製備。如第3A-3B圖所示,氧化物終端溝槽MOSFET300包括一個位於主動區中的主動閘極溝槽302,一個位於終端區中的絕緣氧化物溝槽304,以及一個位於終端區中的氧化物填充溝槽308內部的閘極滑道306。根據預設的所需電壓,選擇閘極滑道306的一側和氧化物填充溝槽308的外壁之間的距離t,t通常約為幾千埃。電壓越高,所需的距離t越厚。例如,所加電壓為60V的話,距離t約為2000埃。通常,擊穿場約為10MV/cm,為了運行穩定,計算厚度時,擊穿場要小於7MV/cm。如第3B圖所示,由於在晶片邊緣312處短接,絕緣氧化物溝槽304外部的源極319和本體318區域,包括閘極滑道306周圍的區域,都處於汲極電勢。由於絕緣溝槽外部的本體區318處於汲極電勢,不會構成嵌入式體二極體(與主動區本體區318相反),因此不會增加體二極體電荷,從而提高了裝置的反向恢復。
所形成的BPSG層307足夠厚,使閘極墊313與汲極電勢絕緣。氧化物終端溝槽MOSFET 300的大多數結構都形成在N-外延層316上方,N-外延層316位於N+襯底317上。略有風險的是,沿絕緣溝槽304的側壁,在N-外延層316中可能會形成一個P-反演通道,從而在絕緣氧化物溝槽304的底部附近引起洩露。通過使溝槽深至N+襯底317中,重摻雜的N+襯底317可作為通道終點,阻止這種洩露。如第3A和3B圖所示,絕緣氧化物溝槽304臨近主動區,MOSFET單元和主動閘極就形成在絕緣氧化物溝槽304上。
第3C圖表示第3A圖所示的線A-A的剖面圖,以及附近的晶片邊緣312。如圖可知,與原有技術的接面終端相比,絕緣氧化物溝槽304使主動區形成在更靠近晶片邊緣312的地方。
第3D圖表示一部分氧化物終端溝槽MOSFET 300,在終端區
中,絕緣氧化物溝槽304和氧化物填充溝槽308之間的交叉點C處的透視圖。以絕緣氧化物溝槽304為界的內部區域314是一個主動區,其中源極319和本體318區域(第3D圖中沒有表示出)處於源極電勢。在以絕緣氧化物溝槽304為界的區域外部的外部區域315(終端區)中,源極319和本體318區域(第3D圖中沒有表示出)處於汲極電勢。如第3D圖所示,在內部區域314上的多晶矽310是一個具有閘極氧化物的閘極多晶矽。在外部區域315上,多晶矽310為閘極滑道306,並通過絕緣氧化物溝槽304和氧化物填充溝槽308的氧化物電絕緣。
第4A圖表示依據本發明的第一實施例,氧化物終端溝槽MOSFET 400的一個可選佈局的俯視圖,第4B圖表示氧化物終端溝槽MOSFET 400沿線A-A和B-B的剖面圖。
與氧化物終端溝槽MOSFET 300類似,溝槽MOSFET 400含有閘極溝槽302和絕緣氧化物溝槽304,以及一個位於氧化物填充溝槽308中的閘極滑道306,其中絕緣氧化物溝槽304形成得足夠深,穿過N-外延層316觸及N+襯底317,作為終端結構,為MOSFET裝置提供通道終點。此外,溝槽MOSFET 400還含有一個位於閘極溝槽302外部的額外的閘極溝槽402,靠近絕緣氧化物溝槽304,這個額外的閘極溝槽402的大約一半的寬度,都與絕緣氧化物溝槽304重迭。在第3B圖所示的氧化物終端溝槽MOSFET 300中,略有風險的是,由於絕緣溝槽另一側上的汲極電勢,形成在絕緣氧化物溝槽304的側壁內部的主動區(P-)的本體區318中的(n-)通道,可能會產生漏電流。這個額外的閘極溝槽402遮罩該區域不受汲極電勢的影響,並阻止該通道開啟。
第5A圖表示依據本發明的第一實施例,氧化物終端溝槽MOSFET 500的另一個可選實施例佈局的俯視圖,第5B圖表示氧化物終端溝槽MOSFET 500沿線A-A和B-B的剖面圖。
與氧化物終端溝槽MOSFET 300類似,溝槽MOSFET 500含有閘極溝槽302和絕緣氧化物溝槽304,以及一個位於氧化物填充溝槽308中的閘極滑道306,其中絕緣氧化物溝槽304作為終端結構,為MOSFET裝置提供通道終點。此外,溝槽MOSFET 500還含有一個位於閘極溝槽302外部、並在絕緣氧化物溝槽304中的額外的閘極滑道502。與溝槽MOSFET 400的額外的閘極溝槽402相類似,額外的閘極滑道502也遮罩了形成在絕緣溝槽304內部的寄生n-通道。
第6圖表示氧化物終端溝槽MOSFET 600的剖面圖,氧化物終端溝槽MOSFET 600與氧化物終端溝槽MOSFET 300相類似,還含有一個植入在氧化物填充溝槽308底部的通道終點(Channel stop)602,以及一個植入在絕緣氧化物溝槽304底部的通道終點604。在本實施例中,氧化物填充溝槽308和絕緣溝槽304都沒有深至觸及N+襯底619(無論溝槽是比之前更淺,還是外延層618比之前更深),因此,可以在氧化物填充溝槽308、絕緣氧化物溝槽304的底部中形成自對準的N+植入物,以構成通道終點602和604。
在第二實施例中,可以用一個具有閘極滑道的氧化物終端,代替傳統的溝槽MOSFET的接面終端,其中閘極滑道位於主動單元區中。第7圖表示氧化物終端溝槽MOSFET 700的剖面圖。如第7圖所示,氧化物終端溝槽MOSFET 700含有主動單元702以及閘極滑道704,其中閘極滑道704
位於主動單元702之間的主動區中。氧化物終端706位於終端區中。通道終點708植入在氧化物終端706的底部。溝槽MOSFET 700的氧化物終端結構消除了接面終端擊穿,從而提高了UIS性能。如同下第1圖10A-10K所示,製備氧化物終端溝槽MOSFET 700的方法僅僅需要三個遮罩:一個閘極溝槽遮罩、一個接觸遮罩以及一個金屬遮罩。在本方法中,省去了深勢阱遮罩、本體遮罩以及源極遮罩。
溝槽MOSFET 700和溝槽MOSFET 800的不同之處在於,溝槽MOSFET 700中的大型氧化物終端706,被溝槽MOSFET 800中較小的氧化物絕緣溝槽804代替。第8A圖表示氧化物終端溝槽MOSFET 800佈局的俯視圖,第8B圖表示氧化物終端溝槽MOSFET 800沿線A-A和B-B的剖面圖。
如第8A-8B圖所示,溝槽MOSFET 800含有位於主動區中的閘極溝槽802,每個閘極溝槽802都含有一個閘極電極,以及一個位於終端區的氧化物絕緣溝槽804,用於終端主動單元。閘極滑道808沉積在主動區中,位於主動閘極溝槽802的中心。如果通道終點806沒有深至觸及襯底(圖中沒有表示出)的話,就可以植入到氧化物絕緣溝槽804的底部。
第9A-9O圖表示用於製備上述第3A-3B圖所示類型的氧化物終端溝槽MOSFET的四遮罩工藝的剖面圖。如第9A圖所示,提出了一種半導體襯底,該襯底含有例如位於重摻雜襯底902上方,相對輕摻雜的外延層904。外延層904可以摻雜n-,襯底902可以摻雜n+,這僅作為示例,不作為局限。氧化層906可以形成在外延層904的頂面上。作為示例,可以通過熱氧化作用和低溫氧化物沉積或高密度等離子(HDP)相結合,製備氧化物。如第9B圖所示,在氧化層906上方,使用第一遮罩908,也就是絕緣溝槽遮
罩,該遮罩帶有開口圖案,限定了絕緣和閘極滑道溝槽。通過穿過氧化層906、外延層904,還可選擇襯底902的頂部,刻蝕形成溝槽910、911。這是通過利用氧化物刻蝕,穿過氧化層906,隨後利用矽刻蝕,刻蝕到外延層904中,來實現的。氧化物刻蝕後,氧化層906可以用作矽刻蝕的硬遮罩。溝槽910將在製備過程中,形成閘極滑道。為了簡便,溝槽910指的就是閘極滑道溝槽。另一個溝槽911可用於為主動區製備絕緣氧化物終端。為了簡便,該溝槽911指的就是絕緣氧化物溝槽。如果溝槽911沒有觸及(n+)襯底,那麼通道終點植入物(圖中沒有表示出)就可以在此時形成在溝槽底部。
溝槽910、911的寬度約為1.5微米,這僅作為示例,不作為局限。如第9C圖所示,可以除去第一遮罩908,用氧化物912填充溝槽910、911,然後壓實緻密,並進行化學-機械-拋光(CMP)。
如第9D圖所示,薄氧化層914可以生長或沉積在溝槽910和外延層904的上方。在薄氧化層914上方,使用第二遮罩916,即溝槽遮罩,該遮罩帶有開口圖案,限定了溝槽。如第9E圖所示,通過穿過薄氧化層914以及遮罩開口920中的部分氧化物912的刻蝕,在溝槽910中形成閘極滑道空腔918,最好選擇氧化物刻蝕,而不是矽刻蝕。然後,如第9F圖所示,利用同一個遮罩916,通過矽刻蝕,刻蝕外延層904,製備溝槽922。稍後,在製備過程中,利用溝槽922製備閘極墊/電極。為了簡便,這些溝槽922指的就是閘極溝槽。溝槽910比溝槽922更寬,以便形成閘極滑道空腔918。通常,閘極滑道空腔也比溝槽922更寬,以便增強傳導,並為閘極金屬接觸留出空間。典型的閘極滑道空腔918的寬度約為1.0微米,溝槽922的寬度約為0.4至0.8微米。
然後,如第9G圖所示,除去第二個遮罩916,並形成犧牲氧化物(之後會被除去)以及閘極氧化物。如第9H圖所示,導電材料926(例如多晶矽)可以沉積在溝槽918和922中,以及閘極氧化物924上方。可以用摻雜物(例如n+型摻雜物)摻雜導電材料926,使其導電性能更強。然後,如第9I圖所示,回刻導電材料926,以便在溝槽918中形成閘極滑道930,在溝槽922中形成閘極電極928。
如第9J圖所示,無需使用遮罩,就可在外延層904的頂部形成本體層932。例如通過整體垂直或帶角度的植入以及擴散,與外延層的摻雜物類型相反的適宜的摻雜物,可以製成本體層932。摻雜離子可以穿過氧化層924植入。作為示例,如果外延層為n-摻雜,那麼可以用p-型摻雜物摻雜本體層,反之亦然。如第9K圖所示,無需使用遮罩,源極層934形成在本體層932頂部。例如通過氧化層924進行整體垂直或帶角度的植入適宜的摻雜物,並退火,可以製成源極層934。製備源極層所植入的摻雜物,其類型通常與本體層932的類型相反。例如,如果本體層932所摻雜的為p-型,那麼源極層934將摻雜n-型,反之亦然。
如第9L圖所示,絕緣層936,例如一個低溫氧化層和含有硼酸的矽玻璃(BPSG),形成在該結構上方,然後壓實緻密,並進行CMP平整化。
如第9M圖所示,接觸遮罩938形成在絕緣層936上,並形成帶有開口的圖案,開口限定接觸孔。接觸遮罩938是該工藝中所用的第三個光遮罩。絕緣層936、源極層934以及部分本體層932,都可以通過遮罩中的開口刻蝕,以形成源極/本體接觸孔942,例如通過氧化物刻蝕以及矽刻蝕,
向下刻蝕溝槽918中的氧化物以及一部分閘極滑道930,以形成閘極接觸孔940。
如第9N圖所示,可以在接觸孔940和942中沉積一個勢壘材料(例如Ti/TiN)層944。然後,利用導電(例如鎢(W))插頭946,填滿接觸孔940和942。在源極區934上方,接觸孔942中的勢壘金屬944和鎢插頭946提供源極/本體接頭。在閘極滑道930上方,接觸孔940中的勢壘金屬944和鎢插頭946提供閘極接頭。金屬層948,例如Al-Si,可以沉積在製成的結構上方。
在金屬層948上,形成一個帶圖案的金屬遮罩(圖中沒有表示出),形成圖案並製備,通過金屬刻蝕,將金屬層948分成多個電絕緣部分,這些電絕緣部分構成閘極和源極金屬(例如閘極金屬950和源極金屬952),從而製成類似於第3A-3B圖所示的半導體裝置氧化物終端溝槽MOSFET300的裝置。金屬遮罩是該工藝中所用的第四個光遮罩。在源極區上方,接觸孔942中的勢壘金屬944和鎢插頭946,提供從源極層934和本體層932到源極金屬952的源極/本體接頭。在溝槽910上方,接觸孔940中的勢壘金屬944和鎢插頭946提供從閘極滑道930到閘極金屬950的垂直閘極滑道接頭。此後,無需使用額外的遮罩,就可以在裝置的背面,形成汲極金屬(圖中沒有表示出)。
在一個可選實施例中,可以利用三遮罩工藝,製備氧化物終端溝槽MOSFET。作為示例,第10A-10K圖表示用於製備上述第8A-8B圖所示類型的氧化物終端溝槽MOSFET的三遮罩工藝的剖面圖。如第10A圖所示,提出了一種半導體襯底,該襯底含有一個位於重摻雜(例如n+)襯底
1002上方的相對輕摻雜(例如n-)的外延層1004。氧化層1006形成在外延層1004的頂面上。作為示例,可以通過熱氧化作用和低溫氧化物沉積或高密度等離子(HDP)相結合,製備氧化物。如第10B圖所示,在氧化層1006上方,使用第一遮罩1008,也就是溝槽遮罩,該遮罩帶有開口圖案,限定了溝槽。通過穿過氧化層1006、外延層1004,還可選擇襯底1002的頂部,刻蝕形成溝槽1010、1012、1014。溝槽開口越寬,製成的溝槽就越深,因此利用同一個遮罩刻蝕過程,可以同時形成不同寬度的溝槽。隨後,可以利用溝槽1014,在工藝中製成主動閘極電極。為了簡便,溝槽1012指的就是閘極溝槽。隨後,可以利用溝槽1012,在工藝中製成閘極滑道溝槽。為了簡便,該溝槽1012指的就是閘極滑道溝槽。可以利用另一個溝槽1010,製備主動區的絕緣氧化物終端。為了簡便,該溝槽1010指的就是絕緣氧化物溝槽。
閘極滑道溝槽1012比閘極溝槽1014更寬,例如1.2微米。氧化物終端溝槽1010比閘極滑道溝槽1012更寬,例如1.5微米。對於一個特定的刻蝕過程,遮罩開口越寬,通過各向異性刻蝕工藝(例如乾刻蝕)刻蝕的溝槽越深。
然後,如第10C圖所示,除去第一個遮罩1008,並在溝槽側壁上形成犧牲氧化物和閘極氧化物1016。如第10D圖所示,在閘極氧化物1016上方,導電材料(例如多晶矽)1018可以沉積在溝槽1010、1012和1014中。選取導電材料1018的厚度,使其可以填滿所有較小的溝槽1012和1014,但不填滿最寬的溝槽1010。最寬的溝槽1010僅僅內襯有導電材料1018。可以用摻雜物,例如n+型摻雜物,摻雜導電層1018,以增強其導電性能。
如第10E圖所示,可以各向同性地回刻導電層1018,刻蝕終點在外延層1004的頂面以下,以便在溝槽1012中形成閘極滑道1022,在溝槽1014中形成閘極電極1020。在該刻蝕過程中,完全除去溝槽1010中的導電材料1018。如果通道終點1024沒有觸及襯底1002,那麼可以選擇在溝槽1010的底部植入通道終點1024。如第10F圖所示,氧化物1026沉積在所製成的結構上方,以便填充在溝槽1010中以及溝槽1012和1014的頂部,然後進行化學-機械-拋光(CMP)。
如第10G圖所示,在外延層1004的頂部,形成本體層1030。例如通過垂直或帶角度的植入和擴散,與外延層1004的類型相反的摻雜物,來製備本體層1030。如第10H圖所示,可以在本體層1030的頂部形成一個源極層1032。通過垂直或帶角度的植入和擴散,與本體層的類型相反的摻雜物,並退火,來製備源極層1032。
如第10I圖所示,絕緣層1034,例如低溫氧化層和含有硼酸的矽玻璃(BPSG),可以形成在該結構上方,然後壓實緻密,並進行CMP平整化。接觸遮罩1036可以形成在絕緣層1034上,形成帶有限定接觸孔圖案的開口。接觸遮罩1036是該過程中所用的第二個光遮罩。通過遮罩中的開口,刻蝕絕緣層1034、源極層1032以及本體層1030的頂部,以形成源極/本體接觸孔1038。通過遮罩中的開口,刻蝕絕緣層1034和閘極滑道1022的頂部,以形成閘極接觸孔1039。
如第10J圖所示,導電勢壘材料(例如Ti/TiN)層1040可以沉積在接觸孔1038和1039內,以及絕緣層1034上方。然後,利用導電(例如鎢(W))插頭1042填滿接觸孔1038和1039。源極區1032上方,接觸孔1038
中的勢壘材料1040和導電插頭1042,提供源極/本體接頭。閘極滑道1022上方,接觸孔1039中的勢壘材料1040和導電插頭1042,提供閘極接頭。金屬層1044,例如Al-Si,可以沉積在製成的結構上方。
帶圖案的金屬遮罩(圖中沒有表示出)沉積在金屬層1044上,並通過金屬刻蝕,將金屬層1044分成多個電絕緣部分,這些電絕緣部分構成閘極和源極金屬(例如閘極金屬1048和源極金屬1046),從而製成類似於第8A-8B圖所示的半導體裝置800的裝置。金屬遮罩是該過程中所用的第三個光遮罩。無需額外的遮罩,就可以在裝置的背部形成汲極金屬。源極區上方,接觸孔1038中的勢壘材料1040和導電插頭1042,提供從源極層1032和本體層1030到源極金屬1046的源極/本體接頭。溝槽1012上方,接觸孔1039中的勢壘金屬1040和導電插頭1042,提供從閘極滑道1022到閘極金屬1048的垂直閘極滑道接頭。
由此可知,通過本發明的實施例製備溝槽MOSFET裝置,比傳統工藝所用的遮罩要少。所製成的結構消除了接面終端擊穿,提高了UIS性能,並且由於氧化物所占的空間比傳統的接面終端所占的空間小得多,從而節省了接面終端所占的空間。另外,通過將嵌入式體二極體限定在主動區,提高了反向恢復。
儘管本發明關於某些較佳的版本已經做了詳細的敍述,但是仍可能存在其他版本。例如,上述示例所示的是一種n-通道MOSFET裝置,但是只要轉換各區域的導電類型,就可應用於p-通道MOSFET。而且,儘管所述的是MOSFET,但本領域的技術人員也應理解,同樣的原理也適用於IGBT裝置。此外,氧化物也可以用另一種合適的絕緣物替代。因此,本發
明的範圍不應由上述說明決定,與之相反,本發明的範圍應參照所附的權利要求書及其全部等效內容。任何可選件(無論首選與否),都可與其他任何可選件(無論首選與否)組合。在以下權利要求中,除非特別聲明,否則不定冠詞“一個”或“一種”都指下文內容中的一個或多個專案的數量。除非用“意思是”明確指出限定功能,否則所附的權利要求書並不應認為是意義和功能的局限。
300‧‧‧氧化物終端溝槽MOSFET
302‧‧‧主動閘極溝槽
304‧‧‧絕緣氧化物溝槽
306‧‧‧閘極滑道
307‧‧‧含有硼酸的矽玻璃(BPSG)層
308‧‧‧氧化物填充溝槽
310‧‧‧多晶矽
312‧‧‧晶片邊緣
313‧‧‧閘極墊
316‧‧‧N-外延層
317‧‧‧N+襯底
318‧‧‧本體
319‧‧‧源極
A-A/B-B‧‧‧線
Claims (25)
- 一種用於製備絕緣終端半導體裝置的方法,包括:步驟a:在半導體襯底上,使用溝槽遮罩;步驟b:通過溝槽遮罩,刻蝕半導體襯底,形成第一溝槽TR1、第二溝槽TR2和第三溝槽TR3,寬度分別為W1、W2和W3,其中第三溝槽TR3是最窄的溝槽,其中第一溝槽TR1包圍著第三溝槽TR3;步驟c:在第三溝槽TR3中製備導電材料,以構成閘極電極,在第二溝槽TR2中製備導電材料,以構成閘極滑道;步驟d:用絕緣材料填充第一溝槽TR1,以構成包圍著閘極電極的絕緣隔絕溝槽;步驟e:在整個襯底頂部,製備一個本體層;步驟f:在整個本體層頂部,製備一個源極層;步驟g:在半導體襯底上方,應用一個絕緣層;步驟h:在絕緣層上方,應用一個接觸遮罩;步驟i:穿過絕緣層,形成到源極層和到閘極滑道的接觸開口;並且步驟j:在絕緣層上,形成源極和閘極金屬區,分別與源極和閘極滑道接頭電接觸;其中,被絕緣隔絕溝槽包圍著的區域內部的源極和本體層,處於源極電勢。
- 如申請專利範圍第1項所述的方法,其中,步驟j包括:在絕緣層上方,沉積一個金屬層; 在金屬層上方,使用一個金屬遮罩;並且通過金屬遮罩,刻蝕金屬層,以形成閘極金屬和源極金屬。
- 如申請專利範圍第1項所述的方法,其中,步驟c包括:在第一溝槽TR1、第二溝槽TR2和第三溝槽TR3中,製備一個閘極電介質;在第一溝槽TR1、第二溝槽TR2和第三溝槽TR3中,沉積導電材料,其中選取導電材料的厚度填滿第二溝槽TR2和第三溝槽TR3,但不填滿第一溝槽TR1;並且各向同性地回刻導電材料,以便在第三溝槽TR3中形成閘極電極,在第二溝槽TR2中形成閘極滑道,其中第一溝槽TR1中的導電材料被完全除去。
- 如申請專利範圍第1項所述的方法,其中,進行步驟e和步驟f無需使用額外的遮罩。
- 如申請專利範圍第1項所述的方法,其中,還包括:在第一溝槽TR1的底部,植入一個通道終點。
- 如申請專利範圍第1項所述的方法,其中絕緣隔絕溝槽外部的源極和本體區,處於汲極電勢。
- 如申請專利範圍第1項所述的方法,其中,主動閘極形成在主動區中,絕緣隔絕溝槽鄰近所述的主動區。
- 如申請專利範圍第1項所述的方法,其中,半導體襯底還包括一個重摻雜的底層和一個次重摻雜的頂層,其中 製備第一溝槽TR1,使第一溝槽TR1向下觸及到所述的重摻雜的底層中。
- 如申請專利範圍第1項所述的方法,其中,進行步驟a和步驟b僅使用一個單獨的遮罩,並且根據單獨遮罩中的開口,同時刻蝕第一溝槽TR1、第二溝槽TR2、第三溝槽TR3。
- 如申請專利範圍第1項所述的方法,其中,進行步驟a和步驟b包括:在半導體襯底上,使用第一溝槽遮罩;刻蝕半導體襯底,以形成第一溝槽TR1和第二溝槽TR2;在半導體襯底上,使用第二溝槽遮罩;並且刻蝕半導體襯底,以形成第三溝槽TR3。
- 如申請專利範圍第10項所述的方法,其中,還包括:用絕緣材料填充第一溝槽TR1和第二溝槽TR2;並且製備第四溝槽TR4,其中第四溝槽TR4形成在第二溝槽TR2中的絕緣材料頂部。
- 如申請專利範圍第11項所述的方法,其中,製備第四溝槽TR4是利用所述的第二溝槽遮罩。
- 如申請專利範圍第11項所述的方法,其中,步驟c包括:在第三溝槽TR3中,製備一個閘極電介質;並且在第三溝槽TR3和第四溝槽TR4中,製備導電材料,以便在第三溝槽TR3中形成閘極電極,在第四溝槽TR4中形成閘極滑道。
- 一個絕緣終端半導體裝置,包括:多個位於主動區中的閘極溝槽,每個閘極溝槽都含有一個導電閘極電 極;一個閘極滑道;以及一個絕緣隔絕溝槽,位於包圍著主動區的終端區中,其中用絕緣材料填充絕緣隔絕溝槽,以形成半導體裝置的絕緣終端,被絕緣隔絕溝槽包圍著的區域內部的源極和本體層,處於源極電勢。
- 如申請專利範圍第14項所述的絕緣終端半導體裝置,其中,還包括遍及整個裝置的源極和本體區。
- 如申請專利範圍第15項所述的絕緣終端半導體裝置,其中,主動區中的源極和本體區處於源極電勢,絕緣隔絕溝槽外部的源極和本體區處於汲極電勢。
- 如申請專利範圍第14項所述的絕緣終端半導體裝置,其中,閘極滑道形成在閘極滑道溝槽中。
- 如申請專利範圍第17項所述的絕緣終端半導體裝置,其中,還包括一個閘極接頭,其中閘極接頭和閘極滑道溝槽位於閘極溝槽之間的主動區中。
- 如申請專利範圍第14項所述的絕緣終端半導體裝置,其中,還包括一個植入到絕緣隔絕溝槽底部的通道終點。
- 如申請專利範圍第14項所述的絕緣終端半導體裝置,其中,半導體裝置還包括一個半導體襯底,該襯底具有一個重摻雜的底層和一個次重摻雜的頂層,其中絕緣隔絕溝槽觸及重摻雜的底層。
- 如申請專利範圍第14項所述的絕緣終端半導體裝置,其中,一部分閘極滑道形成在絕緣隔絕溝槽中的絕緣材料中。
- 如申請專利範圍第14項所述的絕緣終端半導體裝置,其中,還包括一個閘極接頭,其中閘極接頭和部分閘極滑道位於被絕緣隔絕溝槽包圍的區域之外。
- 如申請專利範圍第14項所述的絕緣終端半導體裝置,其中,絕緣隔絕溝槽鄰近主動區。
- 如申請專利範圍第23項所述的絕緣終端半導體裝置,其中,閘極溝槽與絕緣隔絕溝槽部分合併。
- 如申請專利範圍第23項所述的絕緣終端半導體裝置,其中,在絕緣隔絕溝槽中形成一個額外的閘極滑道。
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US20110233666A1 (en) | 2011-09-29 |
US20140138767A1 (en) | 2014-05-22 |
US9219003B2 (en) | 2015-12-22 |
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US8637926B2 (en) | 2014-01-28 |
CN102237279A (zh) | 2011-11-09 |
US8956940B2 (en) | 2015-02-17 |
CN102237279B (zh) | 2014-06-04 |
US20160099308A1 (en) | 2016-04-07 |
US20150137225A1 (en) | 2015-05-21 |
US8367501B2 (en) | 2013-02-05 |
US20130126966A1 (en) | 2013-05-23 |
US9443928B2 (en) | 2016-09-13 |
US8324683B2 (en) | 2012-12-04 |
TW201133650A (en) | 2011-10-01 |
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