TW535245B - Multiple chip module with integrated RF capabilities - Google Patents
Multiple chip module with integrated RF capabilities Download PDFInfo
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- TW535245B TW535245B TW089101442A TW89101442A TW535245B TW 535245 B TW535245 B TW 535245B TW 089101442 A TW089101442 A TW 089101442A TW 89101442 A TW89101442 A TW 89101442A TW 535245 B TW535245 B TW 535245B
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Description
535245
發明領域 本發明一般係關於多晶片模組(MCM),利用於射頻 中頻用途。具體而言,本發明係關於MCM特點,可使模組 低成本而高容量生產,整合不同有源電路晶片之功、Λ 發明背景 b °
多晶片模組(MC Μ)為優異的電子封裝,可含有許多、 露和/或封裝的積體電路(1C)晶片,以及許多個別組>件# 例如電阻|§、電容器和感應器)柄合於相連基材。傳統的 MCM包含極複雜的多層相連基材,有數個裸露晶粒及其他 組件。各前案技術的MCM有通常大小,不一定要符合^封 裝業内通常所知的標準「封裝」袼式。易言之,各"前案技 術MCM基材(與MCM封裝相較)典型上以不同方式設計了處 理和測試。MCM常利用於許多電子用途,諸如個^人&電腦、& 主機電腦、電通信、電話系統,其中許多組件具有類似的 電氣特性或具有類似的電氣路徑,可一同組合於單一封裝 内。雖然基本MCM設計和製造技術較為廣知,如此之習知 技術不便於低成本、尚谷軍之生產製法。許多包裝技 術只容納裸露晶粒,而有些容納裸露晶粒和個別組件。然 而’具有裸露和封裝晶粒和個別組件之前案技術封裝 ,利用於多GHz用途。此外,習知MCM技術未延伸到射頻( RF)用途’例如具有在大約800 MHz以上的頻率操作之電路 的用途’以及中頻(I F )用途’例如具有在大約2 〇 〇和8 〇 〇 MHz間的頻率操作之電路的用途。 在RF和I F用途的脈絡中,很難符合提高電路積合、降
535245 案號 89101442 -Τ' η 五、發明說明(2) 低生產成本、容易升級 Β 修正 減小组件尺寸之日增需要。此項 =涉及許多實際理由。例如不同以和/或 = t屏蔽和信號絕緣,典型上限制在單一MCM内可容 # ,組件數量。此外,對電磁干擾(EMI)和發射的管制限 J,進一步限制與習知RF/IF模組之設計參變數。此外, 從若干RF電路晶片散熱,對習用模組設計增加另一 擔。 貝 前案技術設計的前述缺點之結果,習知^"^封〆 般在高容量用途之使用上有所限制。最好是習知RF/if MCM功能在組件程度(於次系統程度以下);許多物理上單 獨之MCM典型上用途來達成與做為相連結構的母板相關之 操作性次系統或系統。個別MCM均充分屏蔽以免RF彼此千 擾’並減少與其相關的EMI發射量。不幸,使用個別MCM增 加設計和生產成本,因為各種MCM間需要分別隔離、g己合 和絕緣網路。 除上述問題外’習知M C Μ不能充分撓曲以配合許多設 計選項。例如在單一習知MCM内合併表面安裝和接線結合 技術實屬不可能或不合經濟,在一習知MCM基材上不可能 含有不同的有源IC類型(例如CMOS、GaAs、双極)。此外 ’習知M C Μ未有適應性以利用不同種通道供散熱和尺f接地 之用,或未有適應性以採用不同終嗤^型式於各種用途。 發明概要 按照本發明,單一 RF / I F MCM可含有複數有源電路晶 片和複數單獨組件,耦合於一相連基材。MCM可構成遂行
第7頁 2003. 03. 04. 〇〇7 535245 五、發明說明(3) 〜 任何數量的不同R F / I F功能,諸如可做為獨立的次***操 作。高階整合、使用RF絕緣技術、和使用熱縮技術,使“ MCM以等於無相關設計和製造成本的許多分開的習知模級 作用。此外,RF/ I F可以適應方式設計,設想各種製造'''、 電氣、環保、測試上的參變數。 本發明上述和其他優點可以一種型式進行,即利用 MCM,具有相連基材,耦合於相連基材的表面安裝無源矣 件,以及耦合於相連基材的至少一有源電路元件。此、、、、 一有源電路το掉構成遂行複數RF功能,諸如^祕做 S v 封裝操作。 —體 _ 圖式簡單說 本發明參煦附圖的詳細說明和申請專利範圍, 為完整明白,附圖中相同參照號碼指相似 P可更 第1圖為MCM之分解透視圖; 第2圖為MCM之簡略俯視圖,表示有源 之配置例; 早獨級件 第3圖為第2圖所示MCM可用之其妯^ #知 第4圖為則可用之基材細部\^例《略俯视圖; 第5圖為M C Μ簡略仰視圖; 第6和7圖為M C Μ例之簡略斷面圖. 第8圖為M C Μ —部份之簡略斷面圖· 第9和10圖為裝設有源電路晶 腦 略俯視圖; 谷部份之簡 第11和1 2圖為MCM中可利用的w β虚怒 π用的印刷感應器紐 》 <簡略
535245 修正 月 曰 MM 89101442 五、發明說明(4) 俯視圖。 盤例之詳細說明 以下說明在許多較佳MCM具體例脈絡中,係針對RF組 件、RF電路和RF信號。按照習知術語和現有技術,RF指大 約80 0 MHz以上之頻率。同時,本發明技術旨在使用約2〇〇 MHz至80 0 MHz範圍内之if頻率。此外,RF和I F之用詞並無 盍_對本發明做任何限度或限制。 在按照本發明構成的實際裝置内,可以採用與電路晶 片位階、基材位階和MCM位階之設計和製造相關的習用技 術和元件。凡精於此道之士一般所知的此項習用技術,在 此不予贅述。例如,有關陶瓷和/或積層基材、鍍金或鍍 銅、熔接、RF信號絕緣等之基礎技術,均可在實際裝置内 實施。 參見第1圖,RF MCM 100—般含有基材102,許多有源 電路晶片1 0 4、和許多個別組件1 〇 6。在實際具體例中, MCM 1 00大小約36mm2至約375mm2。雖然可採用許多設備, 但M C Μ以含有二或三個有源設備和介於1 〇和1 〇 〇個之間的無 源組件為佳。 有源電路晶片1 0 4可構成進行任何數量的適當功能。 有源電路晶片的特殊功此’視各種用途而異。例如單 一有源電路晶片104適於設計成做為RF發射器、RF接收器 、RF收發器、低噪音放大器(LNA)、可變增益放大器(VGA) 等之功能。如下所述,MCM 1 0 〇特別適用於多功能有源電 路晶片1 0 4,即單一晶片可進行二種或以上之不同電子功
IIM 第9頁 2003. 03. 04. 009 535245 五、發明說明(5) 能,或單一晶片含有通常與許多分開而獨特晶片相關之特 在一實際具體例中,MCM 100構成用於無線電話系統 。與需要分開RF和基頻封裝之已知系統不同的是’ MCM 100可積合包含例如45 MHz基頻段和9 0 0 MHz RF段’ MCM 100之其他實際用途包含多帶RF放大器,可在800 MHz、 1800 MHz和2. 4 GHz同時操作者。 MCM 1 0 〇構成配合使用不同種有源電路晶片1 〇 4。例如 ,有源電路晶片1〇4可基於CMOS、双極、GaAs,或其他適 當的晶粒科技。基材102可適當設計成方便安裝矽、GaAs =/其他晶^教基材。有源電路晶片1 〇4可為裸露晶粒或封裝 總成二裸露rf晶片和相對應接線結合可適當環氧或其他包 膠材料’在結構上強化和電氣上絕緣。裸露晶粒1 〇4可利 用接線結合"\酿彿1々士人 』、、/»!=» 膠▼自動釔合、或洋片晶片,與基材1 0 2相 ^ 、、、一般精於此道之士所知,不予詳述。 勺人件106一般使用表面安裝技術安裝於基材102, ;、電容器:感應器、電晶體封裝等。在較佳具 約定豆大j面安裝的早獨組件106,是按照公知的封裝公 i寸,。、無源:例如單獨組件106典型上不是04〇2就是0603 .....、且件可另外或附加位於有源晶Μ太I μ而 ^ 組上裝置的數量和位置:J曰曰片本身上*。杈 械可靠或組合之考量而驅^積效標準、冷卻 '機 在3史叶上顧慮到RF絕緣或EMI發 MCM 100包含金屬蓋1〇8。 射^車又佳具體例中, 隹變通具體例中,MCM 100可採
第10頁 535245 五▲發明說明(6) 用習知塑膠過度成型技術,提供基材1〇2上之適當「蓋」 。可利用於容許更多RF干擾的過度成型之用途,和/或較 少限制EM I要件之用途。此種過度成型法和技術一般已屬 公知,在此不贅。 〃 基材102可為積層(有機)材料或陶瓷(無機)質材 料。在許多目前應用上,以積層基材為佳,因為製造容易 ,以及與積層材料相關的電氣、熱和機械性能之故。如第 6— 8圖(以及第!圖虛線)所示,基材1〇2可含有任意數量 之金屬層,和輪替之介質層。任何適當材料可用來生產基 材1 02,介質材料可利用BT、FR4或PTFE等通常玻璃質聚合 物,而金屬層可用銅等任何適當導電性金屬。基材1〇2實 例含有1至8個金屬層;較佳具體例包含2至4金屬層。一如 習用基材設計,上、下金屬層典型上暴露,而内部或埋入 的金屬層可夾在至少二介質層之間。基材1〇2之形成,包 含導電性金屬線和墊片之形成,是在本說明書範圍以外。 在較佳具體例中’第一或頂面金屬層是電路層,而下 面的金屬層是基層。基層適於把頂層上的電路線條與其他 層’例如底層上的電路線條絕緣。基層亦可用來界定頂層 上的RF線條之阻抗。在RF用途上,電路層與基層間的介質 層厚度’可在設計階段中調節,以達成頂層線條之所需阻 抗’阻抗亦由電路線寬度和任何其他導電性線條之調節加 以支配。 基材102暴露的上表面110包含許多金屬區(由第一金 屬(Ml)層所遺留 利用介質材料分離。例如金屬晶粒附
第11頁 535245 五、發明說明(7) 著墊片1 1 2,可與各有源電路晶片i 04相關。晶粒附著墊片 11 2之特殊造型,其在基材1力2上的位置,和/或與MCM 100 其他元件之互動,視MCM 100所需電氣效能、MCM 100内通 路的佈署和密度,以及電力管理的考慮而定。有源電路晶 片1 0 4可按照任何數量的適當方法學,諸如導電性環氧、 焊劑等,附著於附著墊片1 1 2。當然,變通附著技術可視 奉材1 0 2的組成份和/或晶粒附著墊片1 1 2所用材料而定。 如後詳述,晶粒附著墊片1 1 2亦可用做基底連接墊片和/或 集熱區。 上表面11 0亦可含有與無源組件1 0 6相關之接觸墊片 114。和附著墊片112—樣,接觸墊片I14由M1層形成為佳 p接觸墊片11 4可按照習知技術形成、鍍著和處理,以方 便無源組件1 0 6之表面安裝。無源組件1 0 6最好使用較高溫 焊劑附著於接觸墊片11 4。當隨後使用逆流技術附著於 印刷接線板(PWB)母板時,高溫焊劑保持完整無損。上表 面11 0之特殊面積可利用焊劑遮蔽材料覆蓋’防止焊劑流 入某些面積内。基材400例之焊劑遮蔽面積402如第4圖所 示。烊劑遮蔽面積402典型上位於基材1〇2上焊接表面安裝 組件之部位附近。 最好由Μ1層形成的許多結合墊片11 6,亦可位在上表丨齡 面110。結合墊片116可適當鍍鉑(Pd)或軟金,以便電氣上 和物理上堅固的接線結合。詰合墊片11 6可接電至導電性 線條、封裝終端、導電性通路等,以確立MCM 100之電氣 功能性(見第4圖)。按照習知接線結合計劃,細金線用做
535245 五、發明說明(8) 結合墊片1 1 6和有源電路晶片1 〇 4上適當面積間之電氣連接 (詳後)。本發明利用特別構成之晶粒附著墊片i 1 2、結合 塾片1 1 6,和MCM 1 0 〇之其他特點,以增進模組之電氣效 能。 基材1 0 2之内部金屬層適度限定任何數量之導電性線 條、印刷組件(例如感應器、變壓器、電容器、電阻器) 、基底平面、終端等。埋設組件(例如感應器、變壓器、 電容器、電阻器)亦可利用於基材丨〇 2内。在較佳具體例 + ’鍍著或充填之通路1 1 8的功用是,做為基材1 〇 2層間之 内部和/或電氣途徑。 MCM 100包含可以在單一基材102上整合複數基頻、Rf 、I F和/或其他有源電子晶片之許多設計元件和特點。Mcm 1 00内所含各攆有源晶片顯然不需就其電氣特性或功能分 組在一起。與前案MCM計劃相對地,MCM 100即使實際Mcm 尺寸較小(例如細胞式電話等前案用途,可利用絕緣技術 ,然而基材較大,且在各基材上劃分功能),只要在不同 RF元件間提供充分量的RF絕緣,即可容許複數“功能存在 。不同的有源電路可將個別分隔、絕緣和/或匹配網路整 合於基材102内。以此方式,MCM 1 00在二截然不同的封^ 模組間不需設計以及實施外部匹配和絕緣電路。 MCM 100適當構成得以整合多數之有源設備科技,同 時符合模組之RP效能、絕緣、屏蔽、測試、冷卻、信賴、 實體搬運之設計要件。此外,褕CM 1 0 0之造型使其可以較 低成本、咼谷里生產。可符合此等設計目的之虹M 1Q0諸
第13頁 發明說明(9) 層面,詳述如下。 細和R F接土 度Uf ? t ΐ =(尤其是RF晶片),—般具有高功率密 本以適當散熱…防有源晶片和/或模組 於由低^阻,=便充分的熱傳送率,有源設備104可附著 本且係數之材料形成的附著墊片112。按照 轨Κίΐί ί ’MCM 1()Q_充填通路做為熱通路,把 有源电路曰日片傳導至適當散熱元 佳具體财,散熱元件亦可用做㈣底^電墊片。在較 ^ ^ ΓΛ\^7β^6〇17,] " ^ MCM Boot 片6 〇 4。在美材6 :: Γ / Λ附設於暴露之晶粒附著墊 從晶粒附著墊片604行進至基材6〇8下 ,貫穿通路606 電性塾片。通路606可按照任何數量下表面形成之至少一導 較佳具體例中,通路606先經鍍著,知技術形成。在 性之適當材料(例如銅膏、#導再充填導電性和導熱 在較佳具體例中,採用做熱通;物”。 1*生材料。填料防止晶粒附著材料漭「通路適度充填導熱 通路。當MCM封裝焊接於次階板或開口」鍍著之貫穿 焊料棉吸經過通路。 $〜成時,填料亦可防止 充填之通路60 6構成兼具有基 之功能。在MCM 6 0 0安裝於母板上眸用熱通路評和導電體 晶粒附著墊片604,用做有源電踗1,導電墊片610可經由 、晶片602之基底電位。為
535245 五、發明說明(ίο) 了對有源電路晶片602提供基底,接殿結合612之一端可直 接附著於晶粒附著墊片604,另一端直接在有源電路晶片 602上之適當位置。以此方式,通路提供由有源電路晶 片602至母板之熱通路,並提供由有源電路晶片6〇2直接至 母板和/或内部基底層的低阻抗基底途徑。 按照本發明,RF基底平面之位置、通路之造型,以及 從有源電路晶片至RF基底的導電途徑,因特定用途而異。 例如,第7圖表示另一例MCM 70 0之部份斷面圖。MCM 7ί)〇 包含盲通路702(盲通路702可經鍍著,或又鐘又充填), 把第一有源晶片7 0 4以熱和電氣方式聯結至内部基底平面 70 6。雖然圖上未示,但内部基底平面7〇6可從而接至適當 基底終端和/或適當散熱座。MCM 700又含有錢著貫穿通^ 708,把第二有源晶片71〇以熱和電氣方式聯結至内部基底 平面712及暴瘗之導電墊片714。内部基底平面7〇6和了^明 顯位在不同金屬層(如圖所示)或同樣金屬層。如上述夂 ^第6圖所說明,導電墊片714可以焊接或其他方式電二 耆於提供良好RF基底之母板。另一充埴/推装 、 ㈡ 槪为兄填7鍍耆盲通路716滲 透或跨越二層金屬’把第二有源晶片71〇與 712連接。 | I底千面 基底平面 八參見第1圖和第5-7圖,在基材相同或不闾金屬層上之 分,基底平面,最好利用來獲得複數有源電路晶片&和/ 或單一有源電路晶片上的不同功能段間之絕緣。如第1 圖所示,MCM 100可包含單一基材1〇2上所含二功能上截然
第15頁 535245 H月說明⑴) 一 j的部位(各部位與二有源晶片1 04之一有關)。為減少 4值間的不良RF干擾份量,MCM 100宜含有第一基底平 122和分開之第二基底平面124。在第1圖脈絡中,第一 〜基底平面122、124係形成於同樣内部金屬層上。如 此所詳述,MCM 1 0 0可利用通路1 1 8在基底平面和各晶粒
Jt/l 士备 I S者塾片1 1 2。基底平面1 22、1 24可適當聯結於母板總成 提供的基底,或MC Μ 100上之適當終端(第1圖内未示)。 ▲ 須知基底平面1 2 2、1 2 4之特殊尺寸和形狀,視指定設 w十而異。例如,第7圖所示第一有渾電路晶片7 0 4,具有相 關之内部基底平面7 0 6。接線結合7 2 0在晶粒附著墊片7 2 2 與電路晶片7 04間確立直接導電遂徑。因此,為了 RF目的 ’電路晶片710具有RF基底平面712,位於與基底平面706 不同的位階。此外,電路晶片7 1 0可與導電性基底墊片7 1 4 相關,後者亦可做為MCM 70 0和次一總成位階(例如母板) 間之附著面積。下降結合730經由晶粒附著墊片732用來建 i至電路晶片710之RF基底。
如第5和6圖所示,***基底平面特點不限於内部金屬 層。在第6圖内,第一導電基底墊片610a與第二導電基底 塾片6 1 〇b分開;分開的基底墊片可用來把單一有源電路晶 片6 〇 2上的不同功能面積絕緣。第5圖為另一 MCM 5 0 0之仰 視圖’内裝二有源電路晶片(圖上未示)。MCM 5 00包含與 $ ~有源電路晶片相關之第一導電性基底墊片5 0 2,以及 與第二有源電路晶片相關之複數導電性基底墊片504。貫 穿通路506表示各基底墊片以電氣和/或熱學方式聯結至有
幻 5245 f原Ϊ明說明02) _片或有源晶片之一部份。亦可用盲通路把内部基底層 接至一或以上之導電性基底墊片。 導電性基底墊片5 0 4明顯分開,以方便單一有源電路 晶片之局部RF絕緣。例如有源晶片位於墊片5 〇4c上方的部 伤’可具有與位於墊片504a或504b上方的有源晶片部份截 然有別之功能或不同的電氣特性。此外,為了各種設計理 ^ ’位於墊片5 〇 4 a上方的有源晶片部份,可具有相關的内 部基底平面,或不需分開的RF基底。 基底平面的特殊配置和造型之設計標準,視電氣要件 三有源線條所需阻抗、有源線條阻抗密度、及其他因數而 定:按照較佳具體例,在單一介質基材上具有多項絕緣RF 功能的有源電路晶片之使用,可用上述***基底平面技術 ’在實際可製成的產品内達成。 參見第1-3圖,MCM 100可藉用金屬蓋1〇8,以及在MC Μ 100内某些組件周圍形成法拉第籠的適當基底連接,完成 RF絕緣和ΕΜΙ屏蔽。當然,有些MCM設計可容許RF或EM I干 擾;那些封裝不需採用金屬蓋丨〇8,可改為依賴習知過度 成型技術。 、 洋見第1和3圖,最好在基材1 〇 2周邊形成許多導電性 通路。此等通路的正確數目和位置可由基底平面造型支配 i ^組件之數目和類型是利用法拉第籠加以保護。例如, 且選擇周邊通路間的間隔,以確保MCM 1 0 0受到充分保護 ,以免某些頻率的RF干擾。广般而言,周邊通路間隔在不
535245 五、發明說明(13) 要信號的波長十二分之一以下。 導電環200 (見第2圖)形成於基材102周圍,最好在 周邊通路上方。實務上,可先形成導電環2〇〇,再把周邊 通路引進導電環200内或附近。在較佳具體例内,導電環 200不是鐘著就是侵#入基材1〇2内。使用已知焊接或導電 性環氧附著技術,把金屬蓋1 〇 8附著於導電環2 〇 〇,諸如把 金屬蓋108和至少一部份導電環200,在電氣上聯結。 周邊通路宜構成使其接電至基材1〇2内部之金屬基底 平面。例如第1圖表示周邊通路130、132,分別聯結於基 底平面122、124。因此,金屬蓋1Q8、導電環2〇〇、一或以 上之基底平面,有在基材1 〇 2上做為有源電路絕緣和屏蔽 部位之功用。法拉第籠保護1〇〇不受外界rf和EMI的干 擾’而法拉第籠可適當構成保護1〇〇内之不同區段並 加以絕緣。在某些用途中,例如無線和細胞式電話,可調 節RF或EMI發射和干擾者,需要法拉第籠。 須知導電環200不需連續,而金屬蓋108不需在基材 1 0 2周圍形成物環密封。例如,導電環2 〇 〇可只在MCM之一 區段(例如接收器段)連續。可刻意產生不連續,試圖只 f MCM電路的特殊部份(例如只有RF發射段)絕緣和屏蔽。 月ίΐ案絕緣技術可採用分開之金屬蓋,或具有物理隔板或壁 之金屬蓋,以便把蓋隔間。 為增進法拉第籠之屏蔽和絕緣效果,MCM ί 0 0可含有 基材102上所形成之至少一暴露的導電條14〇 (見第1圖)。 在幸父佳具體例中’導電條1 4 〇形成鋼長孔,延伸跨越整個
Η 第18頁 535245 五 發明說明(14) 一· 基:,。導零條藉周邊通路接電至一 。此外,金屬蓋1 〇 8可以導雷 + 之基底平面 材料)於導電條140。使用導電\附^以八焊接或另外適當 、1 24,可有效產生割分之條U〇加上刀4基底平面122 1〇8之另外接地連接。 ,拉弟籠,不需形成與金屬蓋 之造1 參見第3 - 1 〇圖,本發明4 成和位置,在於增進。?電\佳和^ 通路可為鍍著通路或充填之鲈# ”、、子特14。如前所述, 能而定(例如為了散埶和/者路’視特定通路所需功 如第8圖所示並詳述: = MRF接地)。 材m内採用貫穿通路8〇4、盲m =可於單—介質基 合,設計成容納許多…:::8。6:且埋二^ 路808和其他元件(如ΠΓ,路可8:4、盲通路_、埋設通 理要求、MCM 800相關的生產議題支配^準、物 使RF信號途綠最短途徑,至内; 盲通路806 土 η贋或形成埋入的 改用鑛著之貫穿孔/通…定置在底部暴露的基:墊; 。由於基底塾片有不同的電#,從底部層上之基底特Ϊ二 餘部份,需要抗塾片之絕緣區域。此外,貫穿通路需用煤 劑遮蔽加,^,使MCM封裝用的安裝焊劑不會 用^ 短路至相鄰基底特點。目此’盲通路會使信號途徑路 而使最後完成的封裝更易於表面安震 ^ 5 通路相對於晶粒附著墊片和/或有源電路晶片之特殊
535245 五、發明說明(15) ----------------—- _ 酉己置’亦可增進MCM的雷 ,有源電路晶片902可鱼相^ ‘虛予性能。例如,詳見第9 _ 粒附著墊片904接電。為供右Λ線所不)且構成使其與晶 全部埶通路曹1 \ ,為有政熱縮,有源電路晶粒要與 #4 〇;ΓΛ Λ°Λ ® ^^j£i^aaa^^^ ^ιΐ2^^ 刊兮UVM夕j上之其他暴露金屦 ^ 鑛者和/或充填貫穿通路或盲 、塔』為 不聯結於任何暴露之金屬厝 之任何、,且口 (埋設通路 上基底平面之貫穿、f層)。如上所短路至暴露層 裝時發生問題。、H經充填,以免在隨後安裝MCM封 路晶f 9第Jim圭具體例中,通路906-9 1 6可與有源電 片二之另二Π;關:而通路9 不同部严可右 ? _在此脈絡中,有源電路晶片g 〇 2之 上。通路906 91Γ盥ϋ的疋件,位於電路晶片902之各面積 iil 能整合於單-介質基材上。電氣絕緣 ,如第6和7圖所示,詳後。的刀離基底平面進-步增進 至少下 1地之品質,通路9°6,2可配置成 合)之拟士、曲別μ —、、 置附近。下降結合(接線結 曰if:/由晶粒附著墊片,建立有源電路 日日月用之基底。弟9圖表示下降結合924, 連接於晶粒附著墊片904。如圖把有源-片902 叮不下降結合9 2 4形成晶 535245 五、發明說明(16) 粒附著墊片904上的下降位置92 6與有源電路晶片9〇2上的 下降位置928間之接電。通路9〇6和9〇8二者顯然較接近下 =位置9 2 8。此項接近增進RF基底對有源電路晶片9 〇 2的品 質(理想上,基底途徑長度盡量短,以減少寄生阻 晶粒附羞^片之造^ 按照本發明另一較佳要旨,MCM基材上的晶粒附著墊 片,構成增進MCM的電氣、機械和/或熱學特性。晶粒附著 ^片之特殊佈署,視許多設計參變數,例如所用有源電路 晶片之類型、有源晶片是否遂行多項功能、下降結合之必 要程度、與有源晶片相關的信號終端數、有源組件間之Μ 絕緣需要量等而定。 又參見第9圖,晶粒附著墊片9 04可適度造型以容納許 多下降結合位置932和934,以及許多導電墊片936_94()。 寄生效應,位置932和934等下降位置定位在使接線 ° 2、944長度保持盡量短。在實際具體例中,下降位 置^32和934位在晶粒附著墊片9〇4分別突出或延伸部位上 若線條密度或封裝尺寸為MCSj總設計之有功因數, 應用上需用到該項突出。、 導電墊片936 一 94〇可利用於輸入或輸出信號之途程。 qm p/寄生和RF干擾,有源電路晶片902和導電墊片936 — 之距離,宜保持實際上最小。因此,蟲粒附 9片〇490可2 Ϊ度構成使導電墊片936 — 940可位在接近有源電路晶 來狀,τ之/附著點。以此方式,晶粒附著墊片904之總體 /狀可I納許多導電墊片和下降結合,同時在基材表面 535245 五、發明說明(π) 上又保存空簡。 第10圖為MCM棊材1 0 04上所安裝多功能有源電路晶片 1 0 0 2例之簡略俯視圖。電路晶片丨〇 〇 2可構成進行與一或以 上操作頻率相關之許多不同RF功能。為明瞭起見,圖示有 源晶片10Q2具有LNA段1 00 6、VGA段1 008、第一額外RF段 1 0 1 0 (例如RF輸入段),和第二額外rf段1 0 1 2 (例如RF輸 出段)。
基材1 004宜包含與有源晶片1〇 〇2相關之複數截然有別 之晶粒附著墊片。第一晶粒附著墊片1 〇 i 4主要相當於LNA 段1 006,第二晶粒附著墊片1016主要相當於1 008, 第三晶粒附著墊片i 〇丨8主要相當於rf段1 〇 1 〇,而第四晶粒 附著墊片1 020主要相當於RF段1012。絕緣面積限定在各種 晶粒附著墊片1 〇 1 4 — 1 〇 2 0間。分開的晶粒附著墊片1 〇 1 4 — 1 02 0可適度構成定aRF隔離、emi干擾和/或散熱議題。例 如,許多通路(虚線所示)可對一或以上基底平面建立電 氣和熱學連接。如上詳述,MCM可採用***RF基底平面, 位於中間金屬層或暴露之下金屬層,以促準有效的接地 ’以及不同RF晶片或單一 RF晶片内不同區段間之隔離。 二内之不同有源
如上簡述,MCM 100可含有各種有源電路晶片1〇4之任 何組合,例如CMOS、双極、GaAs、或其他適當晶粒技術。 安裝於單一基材102的多晶片技術之組合能力,提高與MCM 100相關的設計適應性。因此,MCM 100可利用任何指定型 有源電路晶片1 〇 4,其方式在使製造成本、電氣效能及其
第22頁 535245 五、發明說明(18) 他設計因素最佳。 使用不同的有源晶片類別,引起基材1 〇 2更多樣化的 設計。例如以上就第1 — 3圖所述,Ga晶片典型上安裝在 暴露的晶粒附著墊片112,對附設MCM 100的基底平面或母 板提供散熱座。反之,矽質晶片可安裝於用焊劑面罩(或 任何適當絕緣面積)覆蓋之面積。以此方式,金屬線調可 直接在矽晶片或通路下方途經其他金屬層,不影響與有源 石夕晶片相關RF信號之互動。焊劑面罩層可將導電金屬線與 石夕晶片有效隔離。因此,若矽質有源晶片(或其他適當晶 片型)安裝在焊劑面罩面積,則MC Μ 100内所含金屬線密度 即提高。 接線結合技術 如上參照第1-3圖所述,MCM 100宜含有許多表面安裝 的單獨組件1 〇 β和許多有源電路晶片丨〇4,具有相關之接線 結合電氣接頭。單一 MCM裝置需使用逆流表面安裝技術, 連同接線結合技術,來減少製造成本,提高生產容量,又 能達成電氣效能和封裝目標。第67和9圖表示接線結合 612、62Q' 622、720、924,從有源電路晶片引至位於各 基材f之許多接觸點。第6圖表示接線結合620、622,把 電路晶μ片602上的點連接至基材6〇8上的各接觸墊片63〇和 632^攸而’接觸塾片即可電氣聯結至通路,對基材6〇8内 所含其他金屬線條提梃接電。 本發明克服惶& 4 ^ ^ ^ ~劑塾片和接線結合墊片鍍著和清洗相關 t難題’以及焊逾丨去 τ W流動相關的問題(因單獨組件1 〇 6實體接
第23頁 535245 五、發明說明(19) ΐ有;=°4:相鄰電氣接觸位置,可能發生短路)。例 i片用鍍著材料(例如金)之特性,與焊劑 === 性不同°此外’習用咖所利用之電 rF應用’因為剩下的金屬桿或短柱會劇烈 Ϊ^ Ϊ 此等缺點’MCM100可將表面安裝單獨組 件與丨質基材上的接線結合有源電路晶片加以組合。 、前案所賴技術,是積體電路封裝(例如MCM )與次一 總成位階(例如母板)間之終端連接。例如,習知MCM可 採用球柵陣列(BGA)、銷柵陣列(PGA)、焊接點栅陣列(lga )、造城陣列等。然而,前案MCM常限於單一終端體系,因 此,MCM基材必須設計成以終端體系為限制因素。 與習用MCM相反的是,本發明MCM可將一或以暴露的附 著墊片(例如基底墊片)與許多周邊接觸墊片組合。第5圖 表示MCM 500例之底侧’採用許多較大基底塾片5Q2和504 ’以及許多其他焊接點柵墊片5 1 〇。在變通具體例中,焊 劑球可用做終端設備。在RF應用中以LGA為佳,因為與焊 劑球相關的較高隔體,典型上會引進不要的寄生^第3圖 表示使用造城140 (鍍著之半圓筒)於終端。造城140在某
些用途中需用來目視檢查造城與母板間焊接之完整性。 按照本發明,MCM可在單一封裝内使用終端體系之任 何組合。此種終端體系之多樣化和適應性能,容許MCM取 得不同種終端之優點,以構思電氣和製造的議題。 調節性AiL無源組件
第24頁 535245 五、發明說明(20) 如第3圖所示,MCM包含印刷無源組件,諸如印刷感應 器1 5 0 ;該印刷組件可接至有源電路晶片、導電塾片、終 端、單獨組件等。可利用印刷電阻器、電容器、感應器和 變壓器,以供調諧、匹配、旁通或隔離。前案MCM基材在 該印刷組件之調節性方面有限;典型上,印刷組件之電氣 特性,因基材之設計而固定。
參見第11和12圖,MCM基材1〇〇可包含任何數量的巧節 性印刷組件。第11圖為印刷螺形感應器1 1 1 0例之簡圖,而 第1 2圖為印刷馬蹄形感應器1 2 1 0之簡圖。按照習知技術, 此等印刷組件可在基材11〇〇之第一金屬層。在感應器111〇 和1 2 1 0未暴露的部份可施加焊劑面罩等適當絕緣材料。感 應器1110和1210均宜構成在基材1 100製成後,必要時均可 分別改變其電感。 螺形感應器1100—端接至導電通路1112或任何適當之 導電接合點。接線結合111 6之第一端可用習知接線結;技 術接電至導電墊片1丨丨4。接線結合1 1 1 6之第二端顯示^電 至接近螺形感應器11〇〇外端之位置Π18。除去焊劑面罩材 料之適當部位,可暴露位置丨丨丨8。按照具體例,任何數量 的次要位置11 2 0可利用做接線結合111 6之接觸點。此等= 要位置1120可用來調諧螺形感應器1100之電感至所需值二 馬蹄形感應器1210兩端可接電至各導電通路或導電 片1212。馬蹄形感應器1210本身可具有某些電感接近硖 設計值。由於t造公差,以及與MCM相關其他組件之互 ’馬蹄形感應器1 2 1 0可能無最佳電感。因此,在馬蹄形或 535245 五、發明說明(21) 應器1 2 1 〇附近可印刷任何數目的次要感應器1 2 1 4。次要感 應器1 2 1 4構成方便調節與馬蹄形感應器1 2 1 0相關之電感。 如第12圖所示,次要感應器1214可平行於馬蹄形感應器 1 2 1 0接線結合,以便有效減少通路丨2 1 2間測得之整體電感 。總電感視各種次要感應器1 2 1 4相關的電感而適當調節。 -雖然第1 2圖只顯示二次要感應器1 2 1 4,但任何數量均可印 在基材1 1 〇 〇上。此外,任何數量的次要感應器均可一同接 ’ 線結合,以便多樣化調節電感。此外,可用焊珠等使感應 器匝間途徑短路ο 上述和其他技術可利用來調節基材11〇〇上所含電阻性 和電容性元件q須知此等調節技術亦可在三次元組件脈絡_ 中實施。 ' 總之,本發明多樣化MCM模組可採用許多特點,使不 同的RF功能整合於單一基材封裝上。在Μ(:Μ設計中考虞 3 2數是RF隔離、EMI保護、電氣效能、散熱、高容 ΐίίϊ等Π管…低成本生產。MCM元件之適應本 2备許此等和其他設計參變數為生產實際mcm 責。 * 月 均知ίΠίί照較佳具體例說明1而,精於此道之士 如,上述基材佈署和特殊組件J :::明之:圍。例 指定MCM封裝的特殊功能性因各種γ例之用。此外’任何 改變或修飾旨在包含在本 途而異。此等和其他 範圍P % Θ於下列申請專利範圍表達之
535245 修正
晶片和單獨組件 ^___案號 89101442 ---x---- 圖式簡單說明 闽. 第1圖為MCM之分解透視_ ’ 第2圖為MCM之簡略俯視圖,表示有源 之配置例; 第3圖為第2圖所示MCM可用之基材例簡略俯視圖. 第4圖為MCM可用之基材細部俯視圖; θ ’ 第5圖為MCM簡略仰視圖; 第6和7圖為MCM例之簡略斷面圖; 第8圖為MCM —部份之簡略斷面圖; 第9和10圖為裝設有源電路晶片的MCM基材各却a 略俯視圖; a I ^份之簡 108 110 第1 1和12圖為MCM中可利 俯視圖。 元件符號說 10 2,40 0,6 0 8,~^ 1 004,1 1 00 1_〇4, 6 02, 9 02, 電路晶片 1002 10 6 組件 麦J蓋 面 1 1 2, 6 04, 722, 904, 1014, 1016, 1 0 1 8,1 020 墊片 1 1 4, 630, 632 塾片 116 塾片 用的印刷感應器組件> # r〈 略 504 504a,b,c 200 130, 132 122, 124 140 802 808 924 926, 928 932, 934 基 墊片_ 導電l 周邊^^ 棊-塵面 導電t
535245 案號 89101442 年 月 曰 修正 圖式簡單說明 118, 606, 506, 1006 LNA段 906-922, 1212 通路 1008 VGA段 402 焊劑遮蔽面積 1010 第一額外RF段 610, 714, 936- 1012 第二額外RF段 940,1212 導電墊片 612, 6 2 0, 6 2 2, 7 0 2, 7 1 6, 80 6 盲通路 720, 9 24 接線結合 704 第一有源晶片 5 02, 5 04 基底墊片 70 6, 7 1 2 内部基體平面 510 柵墊片 708, 804 貫穿通路 150 印刷感應器 710 第二有源晶片 1110 印刷螺形感應 122 第一基底平面 器 124 第二基底平面 1210 印刷馬蹄形感 720, 942, 944, 應器 1116 接線結合 1112 導電通路 610a,502 第一導電基底 1118 螺形感應器外 墊片 端位置 610b 第二導電基底 1120 次要位置 墊片 1214 次要感應器
第27-1頁 2003. 03. 04. 028
Claims (1)
- 535245 六、申請專利範圍 1. 一種多晶片模組,包括: 單一相連基材; 至少一 RF/IF有源電路晶片,構成遂行複數RF/IF功 能,該至少一 RF / I F有源電路晶片係耦合於該單一相連基 材;和 至少一無源组件,輕合於該單一相連基材;其中 該單一相連基材構成使該多晶片模組整合該複數RF / I F功能者。第28頁
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- 2000-01-27 KR KR1020017009449A patent/KR20010110421A/ko not_active Application Discontinuation
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CN1206732C (zh) | 2005-06-15 |
HK1044072B (zh) | 2006-09-22 |
JP2002536819A (ja) | 2002-10-29 |
DE60026978D1 (de) | 2006-05-18 |
ATE322079T1 (de) | 2006-04-15 |
JP2006100861A (ja) | 2006-04-13 |
EP1153419A2 (en) | 2001-11-14 |
WO2000045420A2 (en) | 2000-08-03 |
DE60026978T2 (de) | 2006-08-31 |
US6885561B1 (en) | 2005-04-26 |
CN1339175A (zh) | 2002-03-06 |
DK1153419T3 (da) | 2006-08-07 |
KR20010110421A (ko) | 2001-12-13 |
HK1044225A1 (zh) | 2002-10-11 |
HK1044072A1 (en) | 2002-10-04 |
WO2000045420A3 (en) | 2001-01-25 |
JP3941911B2 (ja) | 2007-07-11 |
WO2000045420A9 (en) | 2002-05-02 |
EP1153419B1 (en) | 2006-03-29 |
US6377464B1 (en) | 2002-04-23 |
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