TW521325B - Seed layer deposition - Google Patents

Seed layer deposition Download PDF

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Publication number
TW521325B
TW521325B TW90126462A TW90126462A TW521325B TW 521325 B TW521325 B TW 521325B TW 90126462 A TW90126462 A TW 90126462A TW 90126462 A TW90126462 A TW 90126462A TW 521325 B TW521325 B TW 521325B
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TW
Taiwan
Prior art keywords
item
patent application
substrate
seed layer
copper
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TW90126462A
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Chinese (zh)
Inventor
James G Shelnut
David Merricks
Oleh B Dutkewych
Charles R Shipley
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Shipley Co Llc
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Publication of TW521325B publication Critical patent/TW521325B/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/422Plated through-holes or plated via connections characterised by electroless plating method; pretreatment therefor

Abstract

Disclosed are methods for depositing a copper seed layer on a substrate having a conductive layer. Such methods are particularly suitable for depositing a copper seed layer on a substrate having small apertures, and preferably very small apertures.

Description

521325 A7 B7 五、發明說明(i ) [發明背景] 本發明主一要係關於後期金屬化處理的晶種層之領域, 更特別地是,本發明係關於針對金屬化處理之前的晶種層 沉積之方法。 目前的小型微電子裝置,諸如次微米幾何形狀,都已 趨向含多重金屬化處理層以做更高密度之處理。一般用以 形成金屬線的金屬也稱之為接線,形成於半導體晶圓上的 金屬一般是鋁。鋁的優點在於價格相當便宜、電阻係數低、 且非常容易作姓刻處理。铭也用來作導通孔(via)的互連金 屬以便連接不同的金屬層。然而,當使用紹來做不同金屬 層之間的互連時,當導通孔/接觸孔之大小縮至次微米範圍 時,則造成步階範圍(step coverage)之問題,轉而產生可靠 性之問題。這樣的不良步階範圍造成高電流密度並且也促 使電子漂移的提高。 有一種方法可提供導通孔的改良互連路徑,它可於使 用鋁來作為金屬層時而利用諸如鎢這類的金屬來形成完整 的填充塞(filled plug)。然而,鎢製程不合乎成本且較複 雜、鎮的電阻係數南、而且鎮塞孔易造成空隙與接線層的 不良介面。 銅可作為互連金屬化處理之取代材料。鋼的優點是電 特性比鎢還要好,有較佳的電子漂移特性以及比鋁還要低 的電阻係數’而缺點則是比鋁和鎢要難做蝕刻處理並且易 漂移入介電層,諸如二氧化矽。為了避免漂移之情形發生, 必須於銅層沉積處理之前使用障壁層,諸如氮化欽、 裝·-- (請先閱讀背面之注意事項再填寫本頁) ' 丨線- 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公爱) 1 91945 521325 A7 五、發明說明(2 鈕等。 一般金屬層應用技術,铬如齋 7落如電化學沉積,僅適合將銅 施加於導電層。因此,底層導 曰刃等1:日日種層,一般是指諸如521325 A7 B7 V. Description of the invention (i) [Background of the invention] The present invention mainly relates to the field of seed layers in later metallization, and more particularly, the present invention relates to seed layers before metallization. Method of deposition. Current small microelectronic devices, such as sub-micron geometries, have tended to contain multiple metallization layers for higher density processing. The metal generally used to form the metal line is also called a wiring, and the metal formed on a semiconductor wafer is generally aluminum. The advantages of aluminum are that it is relatively cheap, has a low resistivity, and is very easy to be engraved. Inscriptions are also used as interconnect metal for vias to connect different metal layers. However, when using Shao for interconnection between different metal layers, when the size of the via / contact hole is reduced to the sub-micron range, the problem of step coverage is caused, which in turn results in reliability. problem. Such a poor step range results in a high current density and also promotes an increase in electron drift. One method is to provide an improved interconnect path for vias, which can use a metal such as tungsten to form a complete filled plug when using aluminum as a metal layer. However, the tungsten process is not cost-effective and complicated, the electrical resistivity of the town is low, and plugging the holes is likely to cause a poor interface between the void and the wiring layer. Copper can be used as a replacement material for interconnect metallization. The advantages of steel are better electrical characteristics than tungsten, better electronic drift characteristics and lower resistivity than aluminum ', but the disadvantages are that it is more difficult to etch than aluminum and tungsten and drifts into the dielectric layer, such as Silicon dioxide. In order to avoid drifting, a barrier layer must be used before the copper layer deposition process, such as Nitriding, and installation (Please read the precautions on the back before filling out this page) '' Line-Employees of the Intellectual Property Bureau of the Ministry of Economic Affairs The paper size printed by the consumer cooperative is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 public love) 1 91945 521325 A7 V. Description of the invention (2 buttons, etc.) General metal layer application technology, such as chromium 7 Deposition, it is only suitable for applying copper to the conductive layer. Therefore, the bottom guide layer, such as the first layer, generally refers to layers such as

銅的金屬晶種層,則在鋼的雷仆風_蚀 > 火L 列97 !化學》儿積之前就施加於基板 上。施加該晶種層之方法有許多種,諸如物理汽相沉積 (PVD)與化學汽相沉積(cVD) 〇 一 ; 般而&,在與其他金屬層 相較之下,晶種層比較薄,諸如5〇至15〇〇埃的厚度。該 金屬晶種層,特別是銅晶種層,可能產生諸如有晶種層與 層面之大部分範圍的表面金屬氧化物與層面上出現斷裂現 象之問題。 晶種層區的金屬範圍,如鋼,若出現斷績或空隙現象 則屬不完整或瑕疲。這是因為表面層沉積不足而造成,諸 如金屬沉積於一排的線上。若要使完整的金屬層以電化方 式沉積於該晶種層,則在最終的金屬層沉積之前或期間必 須將斷績部分填入,否則最終的金屬層可能會發生斷績現 象。舉例而言,PCT專利申請編號W099/47731 (Chen)揭 露一種藉以第一蒸汽而提供晶種層之方法,其中該第一蒸 汽沉積一種超薄晶種層,而該層是藉以電化方式強化超薄 晶種層而產生以形成一種最終的晶種層。依據本專利申 凊,該項的兩階段製程所提供的晶種層會降低斷續現象, 也就是降低晶種層範圍之區域的不完整或瑕疵現象。 物理或化學汽相沈積法是相當複雜且難以控制。而 且,物理汽相沈積法易造成金屬整排沉積,而無電沉積則 不像PVD或cVD,無電沉積法更會形成等角效果,而因 本紙張尺度適用ψ曝國家標準(CNS)A4規格(210 X 297公爱) (請先閱讀背面之注意事項再填寫本頁) --------訂--------- 經濟部智慧財產局員工消費合作社印製 521325 A7 B7 五、發明說明(3 此提供較佳的孔徑側壁之範圍,也因此使晶種層更為連續 並因而降低後續電鍍而形成的空隙現象。 目前所需要的方法則是使實質連續晶種層之沉積依據 電子裝置的表面外型之要求,該外型要求尤其著重於〇 5 微米(含)以下的裝置。 [發明概述] 如今令人驚訝地發現實際連續晶種層已能依據本方法 以項步驟做沈積處理。該方法所提供的實際連續晶種層 符合基板的表面幾何外型,尤其是孔徑$1以01的基板。 在一方面’本發明所提供的晶種層沈積方法之步驟包 含:將具導電層與之孔徑的基板與無電解鍍鋼溶液 接觸;使該基板於一段時間内維持低電流密度以著手導電 層上的錢銅之作業;將電流中斷;以及繼續無電電錢以提 供一種銅晶種層。 在第二方面,本發明所提供的電子裝置製造方法包含 銅晶種層 生之步驟,該步驟包含:將一種具導電層且 //m之孔徑的電子裝置基板與無電鍍銅溶液接觸;使該電 子裝置基板於一段時間内維持低電流密度以著手導電層上 的鍍鋼作業;將電流中斷;以及繼績無電電鍍以提供銅晶 種層。 在第三方面,本發明提供沈積於基板上之非連續晶種 層的強化方法,所包含之步驟:將具非連續晶種層之基 板與無電鍍銅溶液接觸;使該基板於一段時間内維持低電 流密度以著手導電層上的鍍銅作業;將電流中斷;以及繼 --------------Μ—— (請先閱讀背面之注意事項再填寫本頁) 訂· •線 經 濟 部 ,智 '慧 財 員 工 消 費 合 作 社 印 製 本紙張尺度適用中國國家標準(CNS)A4規格(21〇 x297公釐) 3 91945 521325 A7 B7 五、發明說明(4 ) 績無電電鑛以 生實際連續的晶種層。 [發明之詳細說明] 除非本文清楚指示,否則下列縮寫代表之意義如下: 奈米;μπ1 =微米;。c==攝氏度;g/L=^/公升;mA/cin2= 毫安/平方米;M=克分子濃度(molar);以及pprn=百萬分之 — 〇 在整篇說明書中所使用的,’’特徵(feature),,是表示基 板上的幾何外形,諸如但不局限為溝漕與導通孔。,,孔徑 (aperture)”是表示凹陷之外形,諸如導通孔與溝漕。,,小特 徵’’ 一詞是表示一微米或以下之尺寸大小的外形。,,極小特 徵’’是表示0 · 5微米或以下之尺寸大小的外形。同樣地,,, 小孔’’是表示孔徑尺寸大小為一微米或以下($ 1 # m ),而,, 極小孔”是表示孔徑尺寸大小為0 ·5微米或以下($ 〇 ·5 // m)。’’電鍍”是表示金屬電鍍,然而除非内文明白指示,否 則該名詞定義不變〇 沉積’’與”電鍍,,在說明書中可互換使 用。’’鹵化”是表示氟代、氣代、溴代與碟代。同樣地,” 鹵化物”是表示氟化物、氣化物、溴化物與蛾化物。,,烷基,, 包含直鍊、分枝的與環狀的烧基群。 除非加以說明,否則所有百分比與比例皆表示重量。 所有範圍均包含在内且可結合的。 本發明提供一種晶種層沉積之方法,所包含之步驟是 將具導電層及孔徑的基板與無電鍍鋼溶液接觸;使 該基板於一段時間内維持低電流密度以著手導電層上的鍍 銅作業;將電流中斷;以及繼續無電解電鍍以提供銅晶種 木紙張尺度適用中國國家標準(CNS〉A4規格(210 X 297公爱) (請先閱讀背面之注音?事項再填寫本頁) 裝--------訂---------. 經濟部智慧財產局員工消費合作社印製 91945 521325The metal seed layer of copper is applied to the substrate before the lightning storm of steel &fire; column 97! Chemistry. There are many ways to apply the seed layer, such as physical vapor deposition (PVD) and chemical vapor deposition (cVD). Generally, & the seed layer is thin compared to other metal layers , Such as a thickness of 50 to 150 Angstroms. The metal seed layer, especially the copper seed layer, may cause problems such as the occurrence of fractures on the surface metal oxide and the surface in most areas with the seed layer and the layer. The metal range of the seed layer area, such as steel, is incomplete or flawed if it is broken or voided. This is caused by insufficient surface layer deposition, such as metal deposition on a line. If the complete metal layer is to be electrochemically deposited on the seed layer, the broken performance part must be filled in before or during the final metal layer deposition, otherwise the broken performance of the final metal layer may occur. For example, PCT Patent Application No. W099 / 47731 (Chen) discloses a method for providing a seed layer by a first vapor, wherein the first vapor deposits an ultra-thin seed layer, and the layer is electrochemically strengthened A thin seed layer is created to form a final seed layer. According to this patent application, the seed layer provided by this two-stage process will reduce the discontinuity, that is, reduce the incompleteness or defects in the area of the seed layer. Physical or chemical vapor deposition methods are quite complex and difficult to control. Moreover, the physical vapor deposition method is easy to cause the entire row of metal deposition, while electroless deposition is not like PVD or cVD. The electroless deposition method will form an equiangular effect, and because this paper scale applies the National Standard (CNS) A4 specification ( 210 X 297 public love) (Please read the notes on the back before filling out this page) -------- Order --------- Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 521325 A7 B7 V. Description of the invention (3 This provides a better range of aperture sidewalls, which also makes the seed layer more continuous and thus reduces the void phenomenon formed by subsequent electroplating. The currently required method is to make the substantially continuous seed layer Deposition is based on the requirements of the surface appearance of electronic devices, which especially emphasizes devices below 0,5 micrometers inclusive. [Summary of the Invention] It is now surprisingly found that actual continuous seed layers can be used in accordance with this method. The step is to perform a deposition process. The actual continuous seed layer provided by the method conforms to the surface geometry of the substrate, especially a substrate with an aperture of $ 1 to 01. In one aspect, the steps of the seed layer deposition method provided by the present invention include: will The substrate with the conductive layer and its aperture is in contact with the electroless steel plating solution; maintaining the substrate at a low current density for a period of time to start the operation of the copper and copper on the conductive layer; interrupting the current; and continuing the lack of electricity and electricity to provide a Copper seed layer. In a second aspect, the method for manufacturing an electronic device provided by the present invention includes a step of layering copper seeds, which step includes: placing an electronic device substrate with a conductive layer and // m aperture and electroless plating Copper solution contact; maintaining the electronic device substrate at a low current density for a period of time to initiate steel plating on the conductive layer; interrupting the current; and following electroless plating to provide a copper seed layer. In a third aspect, the invention Provided is a method for strengthening a discontinuous seed layer deposited on a substrate, comprising the steps of: contacting a substrate having a discontinuous seed layer with an electroless copper plating solution; maintaining the substrate at a low current density for a period of time to start conducting electricity Copper plating on the layer; interrupt the current; and follow -------------- M—— (Please read the precautions on the back before filling this page) Department, Zhi'huicai Employee Consumer Cooperative Co., Ltd. This paper is printed in accordance with the Chinese National Standard (CNS) A4 specification (21 × 297 mm) 3 91945 521325 A7 B7 V. Description of the invention (4) Performance without electricity and electricity [Detailed description of the invention] Unless the text clearly indicates otherwise, the following abbreviations represent the following meanings: nanometer; μπ1 = micron; c = = degree Celsius; g / L = ^ / liter; mA / cin2 = millimeter A / m²; M = molar concentration (molar); and pprn = parts per million— 〇 Features used throughout the specification, "feature," refer to the geometric shape of the substrate, such as but Not limited to trenches and vias. "Aperture" refers to external shapes of depressions, such as vias and trenches. "Small features" means shapes with dimensions of one micron or less. "Minimal features" means 0 · 5 micron or smaller dimensions. Similarly, "small pores" means that the pore size is one micron or less ($ 1 # m), and "minimum pores" means that the pore size is 0 · 5 microns or less ($ 0.55 // m). "Plating" means metal plating, but unless the text clearly indicates otherwise, the definition of the term does not change. "Deposition" and "plating" are used interchangeably in the description. "Halogenation" means fluorinated, gasified, brominated, and saponified. Similarly, "halide" means fluoride, gaseous, bromide, and moth., "Alkyl", includes straight chain, Branched and cyclic fired groups. Unless stated, all percentages and ratios represent weight. All ranges are inclusive and combinable. The present invention provides a method for depositing a seed layer. The steps involved are Contacting a substrate with a conductive layer and an aperture with an electroless steel solution; maintaining the substrate at a low current density for a period of time to begin copper plating on the conductive layer; interrupting the current; and continuing electroless plating to provide copper seeds Wood paper size applies to Chinese national standards (CNS> A4 size (210 X 297 public love) (Please read the phonetic on the back? Matters before filling out this page)) -------- Order ------- -. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 91945 521325

經濟部智慧財產局員工消費合作社印製 層。本發明適合將晶種層沉積於各式的基板上,尤其適用 於電子裝置製造的基灰。 任何適當的基板均包含一種導電層以做後續的金屬電 解/儿積。相當適當的基板有使用於積體電路與半導體製造 的晶圓、印刷電路板内/外層、相容性電路等。以晶圓作為 基板疋最佳的方式。以示範基板為例,可具有一個或一個 以上的孔徑,孔徑大小可為$1^„1,尤其5^m,甚至 S〇.18/zm,其中大小規格並不設限。 一般的導電層包含障壁層,諸如使用於積體電路製造 的障壁層。該導電層僅需具適當導電性以便利用導電層的 電位來著手電鍍之作業。適當的障壁層含有一種或一種以 上的鈷、鈷-鎢-磷、鎢、氮化鎢或氮化鈦。 廣變化的無電電鍍銅溶液可依據本方法而使用。一般 而該無電電鑛溶液一般包含鋼離子、一種或^一種以上 的還原劑與依實際需求所加的複合劑。無電電鍍溶液通常 均含水分,但是也可包含一種或一種以上的有機溶劑。 無電電鑛 >谷液可含有任何可溶解形式的銅離子,諸如 蛾酸銅、硫酸鋼、氨基績酸鹽銅(copper sulfamate)、橫酸 鹽銅(copper sulfonate)、院基確酸鹽銅(copper alkylsulfonate)、芳基績酸鹽銅(copper arylsulfonate)、鹵 化銅、氟硼酸鹽銅(copper fluoroborate)、葡萄糖酸鹽鋼 (copper gluconate)、醋酸鹽銅(copper acetate)、甲酸鹽銅 等。該等銅離子量是視所使用的特殊無電電鍍溶液而定。 含量均維持在該技藝中一般技術人員所能自由決定之範 (請先閱讀背面之注意事項再填寫本頁) 裝 • n n n - 二^1· 線. 本纸張尺度適用中國國家標準(CNS)A4規格(210 x 297公餐) 5 91945 經濟部智慧財產局員工消費合作社印製 521325 A7 _ B7 五、發明說明(6 ) 圍,而一般足以提供一定量的銅金屬(零價銅),含量範圍 維持約1至5g/L,最佳則是維持約2至3g/L之範圍。 廣變化的還原劑皆可使用於此等無電電鍍溶液。合適 的還原劑包含但不局限於次碌酸鹽鈉、次構酸鹽卸、硼氩 化納、甲酸、二甲胺蝴燒(dimethylamine borane)、三甲胺 硼烧(trimethylamine borane)、甲胺基硼烧 (methylmorpholino borane)、嗎啉代硼烷(morph〇lino borane)、二異丙基胺删烧(diisopropylamine borane)、L-納 抗壞血酸(L-sodium ascorbate)、亞鱗酸納、亞罐酸鉀、酒 石酸、葡萄糖、甘油、N,N-乙基甘氨酸鈉、甲酸鈉、甲酸 鉀、三氣化鈦、聯氨、硫脲、甲基硫脲、N_甲基硫脲、N-乙基硫脲、對苯二紛、二價始化合物等。而甲酿、二甲胺 硼燒、與氫化納為最佳的還原劑。無電電鐘溶液中的還 原劑量由本技藝令之一般技術人員已知,並且依據所選的 特殊還原劑來決定’此外還要視無電電鍍溶液是否為快速 或緩慢的無電鑛銅溶液為依據。舉例而言,當甲駿用來作 為還原劑時,一般所使用的範圍大約為1至1 5 g/L,但最 妤是維持在6至12g/L之範圍。 無電電鑛溶液可依據所需添加一種或一種以上的複合 劑,諸如乙二胺、乙二胺四乙酸(“EDTA”)、四甲撐二胺、 檸檬酸鹽(citrate salts)、酒石酸鹽(tanrate salts)、如羅謝 爾鹽(Rochelle salts)等。 銅無電電鍍溶液通常為鹼性溶液,且鹼性度越高越 好。因此’該無電電錢溶液通常含有一種或一種以上的主 (請先閱讀背面之注意事項再填寫本頁) --------訂---- 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公芨) 6 91945 521325 經 濟 部 智 慧 財 消 費 合 作 社 印 製 A7 五、發明說明(7 ) 要成分。適當的主要成分包含氫氧化鹼金屬(alkaH metal hydroxides)、虱乳化氣鹽基(ammonium hydroxides)、氫氧 化四烧基錄(tetra(C i - C4) alky lam mo nium hydroxides)等。最 佳的主要成分包含氫氧化鈉、氫氧化鉀、氫氧化鋰與氫氧 化四甲銨。該主要成分均以足量方式加至無電電鍍銅溶液 以達到所需要的驗度。該主要成分通常以足量添加以達到 約7·5至14的酸鹼值,較佳的範圍為約8至13.5,而最理 想約8.5至13。 具導電層的基板通常以許多方式,諸如浸泡、喷麗、 旋塗、流塗等與無電解鍍銅溶液相接觸。當接觸無電鍍銅 溶液時’基板於一段時間内維持低電流密度以著手導電層 上的鍍鋼作業,其後則中斷電流且晶種層可進行無電電鍍 作業。只有低電流密度才需要於無電鍍銅溶液中著手電鍍 作業。適當的電流密度最高大約為1 〇mA/cm2,最佳情況則 疋5mA/cm2。該低電流密度之施加時間通常約3〇秒以起始 電鍍作業,而最理想的時間約1 〇至3 〇秒。雖然不希望由 理論所限制’但確信該低電流密度使銅晶種粒電沉積於導 電層上’該導電層是作為無電鋼沉積之起催化作用的位 置。 在電流中斷後,具導電層之基板通常於一定時間内與 無電解電鍍溶液接觸以沉積所需的銅晶種層。適當的電鍍 時間通常至少維持約30秒,較佳則至少約1分鐘,而最理 想則至少維持5分鐘。其他適當的電鍍時間則至少約2 〇 分鐘。但電鍍時間並無上限之範圍。無電電鍍的時間越長, ^---------$ ftt先閱讀背面vit事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公爱) 7 91945 521325 A7 B7 五、發明說明(8 ) 則金屬沉積物越厚。於此技藝方面之一般技術人員可知, 沉積物的厚度增加,則電鍍速度會變得緩慢。該無電電鍍 作業之溫度可維持在室溫以下至約95它,而最佳的溫度為 25°C至80°C。時間與溫度是依據所使用的特殊無電電鍍溶 液而變化。 當產生所需之鋼晶種層時,基板就不需與無電解電鍍 溶液接觸’而清洗工作可依當時需求而定。之後含基板的 晶種層可做電鍍處理,諸如將晶種層與電解電鍍溶液接 觸,但最好是接觸電解鍍鋼溶液,如此可完全將孔徑填塞。 Shipley公司(馬博羅,麻薩諸塞州)的ulTRAFILLtm2001EP 銅沉積化學成分為適合的電鍍溶液。電鍍銅溶液通常含有 一種或一種以上來源的鋼離子與一種電解液。酸性電解液 為最理想之條件。銅與電解液含量的變化幅度非常大,而 且維持於技藝中一般技術人員所能自由決定之範圍。該電 鍍溶液可任意選用一種或一種以上的添加劑,諸如齒化 物、觸媒劑或光凳劑、抑制劑、均化劑、晶粒細化劑、浸 濕劑、表面活性劑等。該添加劑之含量均維持於該技藝中 一般技術人員所能自由決定之範圍。 在一項替代的實施例_,基板會維持於無電解鍍銅溶 液中直到獲得所需之銅厚為止。本方式處理之目的並不是 將具銅晶種層的基板隔離,而是將所需厚度的鋼金屬層直 接沉積於導電層。在積體電路製造令,該方法具有優點, 因為可避免各自獨立的晶種層步驟。因此足以完全將孔徑 填充於基板(晶圓)之厚度的鋼金屬層可直接沉積於障壁層 (請先閱讀背面之注音?事項再填寫本頁) --------訂·----- 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 8 91945 521325 A7 B7 五、發明說明(9 ) 上 本發明也可適用強化基板上的非連續金屬晶種層。非 連績金屬晶種層之’’強化”方法是指修補或擴充晶種層以充 分將晶種層的非連續部份或空隙區域充分填入,而最佳方 式是完整填入。因此,本發明還提供一種方法,該方法是 強化沉積於基板上的非連績晶種層,該項步驟包含:將具 非連續晶種層之基板與無電錢鋼溶液接觸,使該基板於一 段時間内維持低電流後度以者手導電層上的鍵銅作業;將 電流中斷;以及繼績無電電鍍以提供充分連績的晶種層。 本發明可用以強化由蒸氣沉積製程,諸如CVD或PVD 或其他任何沉積方法所沉積的晶種層。而該晶種層最好為 銅或鋼合金。甚至最理想的方式是將該晶種層沉積於積體 電路製造中所使用的晶圓上。 本發明之優點是可避免使用一般之無電催化劑,諸如 鈀和鈀/錫。其另一項優點則是產生的晶種層為實質且最妤 為連續性。也就是說,依據本發明所強化且/或沉積的晶種 層涵蓋95%以上的基板之表面面積,而最佳範圍則在%% 以上’甚至99〇/〇以上。由於無電解沉積為等角,因此該晶 種層也都呈均勻狀態。 如上述,本發明之晶種層可以沉積於各種的基板上。 本發明之方法特別有用,目的是使困難的工作部分,諸如 直徑小、深寬比非常大的微導通孔與其他孔徑之電路板基 板的後續非電或電解電鍍均能產生晶種層。本發明之方法 更可以將晶種層沉積於積體電路裝置上,諸如已完成的半 --------------裝--- (請先閱讀背面之注音?事項再填寫本頁) .- «線 經 濟 部 .•智 慧 財 、產 局 員 工 消 費 合 作 社 印 製 本紙張尺度適用中國國家標準(CNS〉A4規格(210 X 297公釐) 9 91945 521325 A7 -______ B7 五、發明說明(i0 ) 導體裝置等。本發明之方法尤其適合將充分連續的晶種層 ί儿積於基板上,而該基板具有高深寬比的微導通孔與溝 漕,諸如深寬比為4 : 1或以上的基板。 如上述,若深寬比至少4 : 1且直徑約20mm或以下, 則本發明之充分連續的晶種層上之鍍銅部份就不會有瑕疲 (例如利用離子束檢測亦不會發現有任何的空隙或夾雜物 產生)。若基板上的孔徑直徑低於150mm,或甚至低於 100mm,且深寬比為5 ·· 1、6 : 1、7 : 1、1〇 : 1或以上, 且甚至咼達約1 5 ·· 1或以上,則可利用本發明來沉積或有 效地強化晶種層。儘管基板的直徑為〇18mm且孔徑過小, 本發明尤其適合將晶種層沉積於基板上,並於該處做修補 動作。 於金屬化處理後,即孔徑填塞後,若以晶圓為例,最 好將基板做化機平坦化處理(chemical-mechanical planadzation,’’CMP”)。CMP程序可依據下列之發明來處 理0 晶圓是安裝於晶圓載體中,該晶圓載體使晶圓倚靠著 移動的拋光墊之表面。該拋光墊可以作為一種習知的平滑 抛光墊或是一種凹陷的抛光墊。合適的凹陷撖光墊之取得 來源為Rodel公司(紐瓦克,美國德拉威州)。該拋光墊可 置於習知的壓板上,而該壓版可以旋轉該拋光墊。拋光墊 可藉由固定機構來固定於壓板上,該固定機構諸如但不限 定為黏著物,如具兩面黏著的雙面膠帶。 一種拋光溶液或漿料是灌於拋光墊上。晶圓栽體可置 (請先閱讀背面之注音?事項再填寫本頁) 裝·-------訂--------- 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210x297公楚) 10 91945 521325 A7Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. The invention is suitable for depositing a seed layer on various substrates, and is particularly suitable for the base ash used in the manufacture of electronic devices. Any suitable substrate contains a conductive layer for subsequent metal electrolysis / child deposition. Suitable substrates include wafers for integrated circuit and semiconductor manufacturing, inner / outer layers of printed circuit boards, and compatible circuits. The best way to use a wafer as a substrate. Taking the demonstration substrate as an example, it may have one or more apertures, and the aperture size may be $ 1 ^ „1, especially 5 ^ m, or even S18.18 / zm, wherein the size specification is not limited. The general conductive layer includes A barrier layer, such as a barrier layer used in the fabrication of integrated circuits. The conductive layer only needs to have appropriate conductivity in order to use the potential of the conductive layer to start electroplating. A suitable barrier layer contains one or more cobalt, cobalt-tungsten -Phosphorus, tungsten, tungsten nitride or titanium nitride. A wide variety of electroless copper electroplating solutions can be used in accordance with this method. Generally, the electroless mineral solution generally contains steel ions, one or more than one reducing agent, and according to actual conditions Additives as required. Electroless plating solutions usually all contain water, but may also contain one or more organic solvents. Electroless ore > Valley fluids can contain copper ions in any soluble form, such as copper mothate, sulfuric acid Steel, copper sulfamate, copper sulfonate, copper alkylsulfonate, copper arylsulfonate, halogen Copper, copper fluoroborate, copper gluconate, copper acetate, copper formate, etc. The amount of these copper ions depends on the special electroless plating solution used The content is maintained at the level that can be freely determined by ordinary technicians in the art (please read the precautions on the back before filling this page). • nnn-2 ^ 1 · line. This paper size applies Chinese national standards ( CNS) A4 size (210 x 297 meals) 5 91945 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 521325 A7 _ B7 V. Description of the invention (6), and generally enough to provide a certain amount of copper metal (zero-priced copper) The content range is maintained at about 1 to 5 g / L, and the best is to maintain the range of about 2 to 3 g / L. A wide variety of reducing agents can be used in these electroless plating solutions. Suitable reducing agents include but are not limited to secondary Sodium salt, hypochlorite, sodium borohydride, formic acid, dimethylamine borane, trimethylamine borane, methylmorpholino borane, morpholino Borane 〇lino borane), diisopropylamine borane, L-sodium ascorbate, sodium linolenate, potassium arsenate, tartaric acid, glucose, glycerin, N, N-ethyl Sodium glycine, sodium formate, potassium formate, titanium trioxide, hydrazine, thiourea, methylthiourea, N-methylthiourea, N-ethylthiourea, terephthalic acid, divalent starting compounds, etc. The best reducing agents are methyl alcohol, dimethylamine boron, and sodium hydride. The amount of reduction in the electroless clock solution is known to those of ordinary skill in the art, and is determined based on the particular reducing agent selected. In addition, it depends on whether the electroless plating solution is a fast or slow electroless copper solution. For example, when Jia Jun is used as a reducing agent, the range generally used is about 1 to 15 g / L, but at most it is maintained in the range of 6 to 12 g / L. The electroless mineral solution can be added with one or more complexing agents, such as ethylenediamine, ethylenediaminetetraacetic acid ("EDTA"), tetramethylenediamine, citrate salts, tartrate ( tanrate salts), such as Rochelle salts. The copper electroless plating solution is usually an alkaline solution, and the higher the alkalinity, the better. Therefore, 'the non-electricity electricity solution usually contains one or more of the main (please read the precautions on the back before filling this page) -------- Order ---- This paper size applies to Chinese national standards (CNS ) A4 size (210 x 297 cm) 6 91945 521325 Printed by the Intellectual Property Cooperative of the Ministry of Economic Affairs A7 V. Description of the invention (7) Essential ingredients. Suitable main ingredients include alkaH metal hydroxides, ammonium hydroxides, tetra (C i-C4) alky lam monium hydroxides, and the like. The preferred main ingredients include sodium hydroxide, potassium hydroxide, lithium hydroxide and tetramethylammonium hydroxide. The main ingredients are all added to the electroless copper plating solution in a sufficient amount to achieve the required verification. The main ingredient is usually added in a sufficient amount to reach a pH value of about 7.5 to 14, preferably in the range of about 8 to 13.5, and most preferably about 8.5 to 13. The substrate with the conductive layer is usually contacted with the electroless copper plating solution in many ways, such as immersion, spray coating, spin coating, flow coating, and the like. When contacting the electroless copper plating solution, the substrate maintains a low current density for a period of time to start the steel plating operation on the conductive layer, after which the current is interrupted and the seed layer can be electrolessly plated. Only low current densities require electroplating in an electroless copper solution. The appropriate current density is about 10 mA / cm2 at the highest, and 最佳 5 mA / cm2 in the best case. The application time of this low current density is usually about 30 seconds to start the plating operation, and the most desirable time is about 10 to 30 seconds. Although not wishing to be bound by theory ', it is believed that the low current density causes the copper seed particles to be electrodeposited on the conductive layer' and that the conductive layer serves as a catalytic site for electroless steel deposition. After the current is interrupted, the substrate with the conductive layer is usually contacted with the electroless plating solution within a certain period of time to deposit the required copper seed layer. The proper plating time is usually at least about 30 seconds, preferably at least about 1 minute, and most preferably at least 5 minutes. Other suitable plating times are at least about 20 minutes. However, there is no upper limit for the plating time. The longer the electroless plating time, ^ --------- $ ftt first read the vit item on the back and then fill out this page) This paper size applies to China National Standard (CNS) A4 (210 X 297 public love) 7 91945 521325 A7 B7 5. Description of the invention (8) The thicker the metal deposit. A person skilled in the art would know that as the thickness of the deposit increases, the plating speed becomes slower. The temperature of the electroless plating operation can be maintained below room temperature to about 95 ° C, and the optimal temperature is 25 ° C to 80 ° C. Time and temperature vary depending on the particular electroless plating solution used. When the required steel seed layer is generated, the substrate does not need to be in contact with the electroless plating solution 'and the cleaning work can be determined according to the needs at that time. After that, the seed layer containing the substrate can be subjected to electroplating treatment, such as contacting the seed layer with the electrolytic plating solution, but it is better to contact the electrolytic steel plating solution, so that the pore diameter can be completely filled. Shipley's (Mboro, Mass.) UlTRAFILLtm2001EP copper deposition chemistry is a suitable plating solution. Copper plating solutions usually contain one or more sources of steel ions and an electrolyte. An acid electrolyte is the most ideal condition. The content of copper and electrolyte content varies greatly and remains within a range that can be freely determined by a person skilled in the art. The electroplating solution may be selected from one or more additives, such as dentifrices, catalysts or bare stools, inhibitors, leveling agents, grain refiners, wetting agents, surfactants, and the like. The content of the additive is maintained in a range freely determined by a person skilled in the art. In an alternative embodiment, the substrate is maintained in an electroless copper plating solution until the desired copper thickness is obtained. The purpose of this method is not to isolate the substrate with the copper seed layer, but to directly deposit the steel metal layer of the required thickness on the conductive layer. In integrated circuit manufacturing orders, this method is advantageous because separate seed layer steps can be avoided. Therefore, a steel metal layer of a thickness sufficient to completely fill the hole in the substrate (wafer) can be directly deposited on the barrier layer (please read the note on the back? Matters before filling out this page) -------- Order ·- --- Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the paper size is applicable to the Chinese National Standard (CNS) A4 (210 X 297 mm) 8 91945 521325 A7 B7 5. The invention description (9) is also applicable to Strengthen the discontinuous metal seed layer on the substrate. The "strengthening" method of non-continuous metal seed layer refers to repairing or expanding the seed layer to fully fill the discontinuous part or void area of the seed layer, and the best way is to fill it completely. Therefore, The present invention also provides a method for strengthening a non-continuous seed layer deposited on a substrate, the step comprising: contacting a substrate having a discontinuous seed layer with a non-electrical steel solution, so that the substrate is allowed to stand for a period of time; Maintaining low currents within the user's hands on the conductive copper bond layer; interrupting the current; and following electroless plating to provide a seed layer that is sufficiently continuous. The present invention can be used to enhance processes such as CVD or PVD by vapor deposition processes. Or any other deposition method. The seed layer is preferably a copper or steel alloy. The most ideal way is to deposit the seed layer on a wafer used in integrated circuit manufacturing. The advantage of the present invention is that the use of common electroless catalysts, such as palladium and palladium / tin, can be avoided. Another advantage is that the seed layer produced is substantial and most contiguous. That is, it is strengthened according to the present invention. / Or the deposited seed layer covers more than 95% of the surface area of the substrate, and the optimal range is more than %% 'or even more than 99 0 / 0. Since the electroless deposition is equiangular, the seed layer also presents Uniform state. As mentioned above, the seed layer of the present invention can be deposited on various substrates. The method of the present invention is particularly useful in order to make difficult working parts such as micro-vias with small diameters and very large aspect ratios and other The subsequent non-electrical or electrolytic plating of the circuit board substrate of the aperture can produce a seed layer. The method of the present invention can further deposit the seed layer on a integrated circuit device, such as a completed half ------- ------ Equipment --- (Please read the note on the back? Matters before filling out this page) .- «Ministry of Economic Affairs. CNS> A4 specification (210 X 297 mm) 9 91945 521325 A7 -______ B7 V. Description of the invention (i0) Conductor device, etc. The method of the present invention is particularly suitable for accumulating a fully continuous seed layer on a substrate, and The substrate has a high aspect ratio Microvias and trenches, such as substrates having an aspect ratio of 4: 1 or more. As described above, if the aspect ratio is at least 4: 1 and the diameter is about 20mm or less, the fully continuous seed layer of the present invention There will be no flaws in the copper plated part (for example, no voids or inclusions will be found in the ion beam inspection). If the diameter of the aperture on the substrate is less than 150mm, or even less than 100mm, and the aspect ratio It is 5. · 1, 6: 1, 7: 1, 10: 1 or more, and even up to about 15 ·· 1 or more, the present invention can be used to deposit or effectively strengthen the seed layer. The diameter of the substrate is 018 mm and the hole diameter is too small. The present invention is particularly suitable for depositing a seed layer on the substrate and performing a repair operation there. After the metallization process, that is, after the hole is filled, if the wafer is taken as an example, it is best to perform a chemical-mechanical planadzation ("CMP") on the substrate. The CMP program can be processed according to the following invention. The wafer is mounted in a wafer carrier, which makes the wafer lean against the surface of a moving polishing pad. The polishing pad can be used as a conventional smooth polishing pad or a concave polishing pad. Suitable depressions 撖The source of the light pad is Rodel (Newark, Delaware, USA). The polishing pad can be placed on a conventional platen, and the platen can rotate the polishing pad. The polishing pad can be fixed by a mechanism It is fixed on the pressure plate. The fixing mechanism is not limited to adhesives, such as double-sided tape with double-sided adhesion. A polishing solution or slurry is poured on the polishing pad. The wafer carrier can be placed (please read the note on the back first) ? Please fill in this page again.) Packing ------- Order --------- Printed by the Consumers' Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs. Gongchu) 10 91945 52132 5 A7

521325 經濟部智慧財產局員工消費合作社印製 A7 --------2L_______ 五、發明說明(12 ) 甲錄’ 3.5g/L的▼駿,4〇g/L的乙二胺四乙酸與_以下 7其他添加劑。含有一種氣化欽(“TiN”)障壁層的晶圓基板 疋與50°C且含有陽極的鍍銅溶液相接觸,而其中障壁層沉 積之方式為物氣沉積。冑電麼施加於基板中使其產生 陰極與5mA/Cm2的電流密度,維持時間為⑽秒,在此期 間鋼晶種層沉積於障壁材料上。之後則將電壓去掉且將晶 圓基板接觸鍍銅溶液一段時間以使銅晶種層沉積的厚度能 達到約5至l〇〇mn^之後再將該基板由鍍銅溶液中移除並 以去離子水做清潔工作。 1 2實例 經由第1實例的晶圓基板處理之後則做加熱而後退火 之處理,處理方式是將晶圓置於熱平板上,維持60秒的時 間,並於含氧量低的環境下處理。熱平板之溫度為200艺。 之後再將晶圓基板由熱平板_移除並冷卻。在冷卻時,再 將晶圓基板作金屬化處理,處理方式是將該晶圓基板接觸 電解鍍銅溶液,諸如由Shipley公司(馬博羅,麻薩諸塞州) 以ultrAFLL2001商標所銷售的電鍍溶液。將晶圓基板置於 電解電鍍溶液一段充分時間以產生所需之金屬化層。之後 再將該晶圓基板由電解電鍍溶液移除,以去離子水做清潔 處理並再做進一步之處理。 第3實例 鑛銅溶液之成分含有氣化銅(l〇g/L)、N-經乙基乙二胺三乙酸(N-hydroxyethyl ethylenediamine triacetie acid(26g/L))、次鱗酸鹽納(26g/L),於水中所含的酸驗值調 #521325 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 -------- 2L_______ V. Description of the invention (12) A record of '3.5g / L ▼ Jun, 40g / L of ethylenediaminetetraacetic acid With _ following 7 other additives. Wafer substrates containing a gas barrier ("TiN") barrier layer 疋 are in contact with a copper plating solution at 50 ° C and containing an anode, and the barrier layer is deposited by material gas deposition. Electrolytic capacitors are applied to the substrate to produce a cathode and a current density of 5 mA / Cm2, which is maintained for a leap second, during which the steel seed layer is deposited on the barrier material. After that, the voltage is removed and the wafer substrate is contacted with the copper plating solution for a period of time so that the copper seed layer can be deposited to a thickness of about 5 to 100 mm ^, and then the substrate is removed from the copper plating solution and removed. Ionized water does the cleaning work. 1 2 Example After the wafer substrate of the first example is processed, it is heated and then annealed. The processing method is to place the wafer on a hot flat plate for 60 seconds and process it in an environment with low oxygen content. . The temperature of the hot plate is 200 ° C. After that, the wafer substrate is removed from the hot plate and cooled. When cooling, the wafer substrate is then metallized by treating the wafer substrate with an electrolytic copper plating solution, such as the plating sold by Shipley Corporation (Marboro, Mass.) Under the trademark ultrAFLL2001. Solution. The wafer substrate is placed in an electrolytic plating solution for a sufficient time to produce the desired metallization layer. The wafer substrate is then removed from the electrolytic plating solution, cleaned with deionized water, and further processed. The third example of the mineral copper solution contains gasified copper (10 g / L), N-hydroxyethyl ethylenediamine triacetie acid (26g / L)), sodium hypoquatrate ( 26g / L), adjust the acid value in water #

(請先閱讀背面之注意事項再填寫本頁) .Γ .a裝 訂--------- 本纸張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 12 91945 521325 521325 經 濟 部 饞.智 '慧 財 ,產 局 員 工 消 費 合 作 社 印 製 A7 B7 五、發明說明() 至9.0,其方法則是添加氫氧化四甲銨即可調配完成。具 錄-鎮-磷(cobalt-tungsten-phospliide)障壁層的晶圓基板再 接觸50°C的鍍銅溶液,其中該晶圓基板含有陽極。之後再 將電壓施加於該基板,使其產生陰極與5mA/cm2的電流密 度’時間維持6 0秒,在此期間鋼晶種層則沉積於障壁層 上。之後則將該電壓移除並且使該晶圓基板接觸鍍銅溶液 一段充分時間以使銅晶種層沉積之厚度能達到約5至 100nm。再將該基板由鐘銅溶液中移除,以去離子水清潔, 另外再依據第2實例之方法來做處理。 第4實例 1公升的鍍銅溶液之成分含有硫酸鋼(0.04M)、N-羥乙 基乙二胺三乙酸(0.05M)、次磷酸鹽鈉(〇·34Μ),於水中所 含的酸鹼值調至3,其方法則是添加稀硫酸即可調配完 成。之後再將具TiN障壁層的晶圓基板與50乞的鍍鋼溶液 接觸,其中該晶圓基板含有陽極。之後再將電壓施加於該 基板,使其產生陰極與5 mA/cm2的電流密度,時間維持 60秒,在此期間銅晶種層則沉積於障壁層上。之後則將該 電壓移除並且使該晶圓基板接觸鍍銅溶液一段時間以使銅 晶種層沉積之厚度能達到約5至1 OOnm。再將該基板由鑛 銅溶液中移除,以去離子水清潔,另外再依據第2實例之 方法來做處理。 I · ^--------^---------線 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297 :爱) 13 91945(Please read the notes on the back before filling this page) .Γ .a Binding --------- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 12 91945 521325 521325 Ministry of Economic Affairs 馋. Zhi'huicai, A7 B7 printed by the Consumers' Cooperatives of the Production Bureau 5. Description of the invention () to 9.0, the method is to add tetramethylammonium hydroxide to complete the preparation. The wafer substrate with the cobalt-tungsten-phospliide barrier layer is then contacted with a copper plating solution at 50 ° C, where the wafer substrate contains an anode. Thereafter, a voltage was applied to the substrate to maintain a cathode current density of 5 mA / cm2 for a time of 60 seconds, during which a steel seed layer was deposited on the barrier layer. After that, the voltage is removed and the wafer substrate is brought into contact with the copper plating solution for a sufficient time so that the copper seed layer can be deposited to a thickness of about 5 to 100 nm. The substrate is then removed from the bell copper solution, cleaned with deionized water, and further processed according to the method of the second example. Example 4 The composition of a 1-liter copper plating solution contains steel sulfate (0.04M), N-hydroxyethyl ethylenediamine triacetic acid (0.05M), and sodium hypophosphite (0.34M). The acid contained in water The base value is adjusted to 3, and the method is to add dilute sulfuric acid to complete the preparation. Thereafter, the wafer substrate with the TiN barrier layer is contacted with a 50-g steel plating solution, where the wafer substrate contains an anode. Thereafter, a voltage was applied to the substrate to cause a cathode and a current density of 5 mA / cm2 for 60 seconds, during which a copper seed layer was deposited on the barrier layer. Thereafter, the voltage is removed and the wafer substrate is brought into contact with the copper plating solution for a period of time so that the copper seed layer can be deposited to a thickness of about 5 to 100 nm. The substrate was then removed from the mineral copper solution, cleaned with deionized water, and treated in accordance with the method of the second example. I · ^ -------- ^ --------- line (please read the notes on the back before filling this page) This paper size is applicable to China National Standard (CNS) A4 (210 X 297: love) 13 91945

Claims (1)

H3 第90126462號專利申請案 申請專利範圍修正本 (91年12月20曰) 1. 一種用以沉積晶種層之方法,包含下列步驟:將具有導 電層與小於或等於_之孔徑之基板與無電鍍鋼溶液 接觸;將該基板維持低電流密度一段時間以起始導電層 上之鍍銅作業;將電流中斷;以及繼續叙 1 貝…、%電鍍以提供 一種銅晶種層。 2·如申請專利範圍第丨項之方法,其中該導電層係一種障 3·如申請專利範圍第2項之方法,其中該障壁層包入姑、 始-鎢-磷、鎢、氮化鎢或氮化鈦。 4·如申請專利範圍第1項之方法,其中該電流密度最高達 10mA/cm2。 ° 5.如申請專利範圍第4項之方法,其中該電流密度最高達 5mA/cm2。 6·如申請專利範圍第1項之方法,其中該時間維持最長% 經濟部中央標準局員工福利委員會印製 秒。 7·如申請專利範圍第6項之方法,其中該時間維持10秒 至3 0秒。 8 ·如申請專利範圍第1項之方法,其中該孔徑小於或等於 0·5μηι 〇 9· 一種用以製造電子裝置之方法,該裝置包含提供晶種層 之步驟,所包含之步驟為··將具導電層與$ 1 的孔徑 本紙張尺度適用中國國家標準(CNS) A4規格(21())<297公釐) 1 91945 H3 之電子裝置基板與無電鍍銅溶液接觸;將該電子裝置基 ^維持低電流密度一段時間以起始導電層上的鐘銅作 W如申:==第以及繼續無電電鑛以提供鋼晶種層。 層。 & 9項之方法,其中該導電層係為障壁 U:申:專利範圍第1〇項之方法,其中該障壁層包含 ,.、鈷·鎢-磷、鎢、氮化鎢或氮化鈦。 12·如申請專利範圍第9項之方法,苴φ 1〇mA/cm2。 項方法其中該電流密度最高達 13. 如申請專利範圍第12項之方法 達5mA/em2。 - ^電“度最高 14. 如申請專利範圍第9項之方 秒。 八T该時間維持最長3〇 15. 如申請專利範圍第14項之 至30秒。 /、中該時間維持10秒 16. 如申請專利範圍第9 0一。 法…孔輕小於或等於 經濟部中央標準局員工福利委員會印製 17. 如申請專利範圍第9項之方 積體電路。 …電子裝置係—種 ^申請專利範圍第9項之方法,其中該基板係一種晶 19. -種於基板上所沉積的非連續晶種層強化之 下列步驟:將具有非連續晶種層之基板與非 $ 接觸;將該基板維持低電流密度-段時間以起始^液 - - _ 守%* 本紙張尺度賴巾關家鮮(CNS) A4雜 521325 H3 上的鍍銅作業;將電流中斷;以及繼續無電電鍍以提供 一種實際連續的晶種層。 20. 如申請專利範圍第19項之方法,其中該非連續之晶種 層係銅或銅合金。 21. 如申請專利範圍第19項之方法,其中該電流密度最高 達 10mA/cm2 〇 22. 如申請專利範圍第21項之方法,其中該電流密度最高 達 5mA/cm2 〇 23. 如申請專利範圍第19項之方法,其中該時間維持最長 3 0秒。 24. 如申請專利範圍第23項之方法,其中該時間維持10秒 至30秒。 25. 如申請專利範圍第19項之方法,其中該孔徑小於或等 於 0·5 μηι 〇 26. 如申請專利範圍第19項之方法,其中該基板係一種晶 圓。 經濟部中央標準局員工福利委員會印製 本紙張尺度適用中國國家標準(CNS) Α4規格(210 X 297公釐) 3 91945H3 No. 90126462 Patent Application Amendment to the Patent Scope (December 20, 91) 1. A method for depositing a seed layer, comprising the following steps: a substrate having a conductive layer and an aperture smaller than or equal to Electroless steel solution contact; maintaining the substrate at a low current density for a period of time to initiate copper plating on the conductive layer; interrupting the current; and continuing electroplating to provide a copper seed layer. 2. The method according to the scope of the patent application, wherein the conductive layer is a barrier 3. The method according to the scope of the patent application, wherein the barrier layer is encapsulated in tungsten, phosphorous, tungsten, tungsten nitride Or titanium nitride. 4. The method according to item 1 of the patent application range, wherein the current density is up to 10 mA / cm2. ° 5. The method according to item 4 of the patent application range, wherein the current density is up to 5 mA / cm2. 6. The method according to item 1 of the scope of patent application, wherein the time is maintained for the longest% printed by the Staff Welfare Committee of the Central Standards Bureau of the Ministry of Economic Affairs. 7. The method according to item 6 of the patent application range, wherein the time is maintained for 10 seconds to 30 seconds. 8 · The method according to item 1 of the scope of patent application, wherein the pore diameter is less than or equal to 0.5 μm 〇9. A method for manufacturing an electronic device, the device includes a step of providing a seed layer, the steps included are ... Contact a conductive layer with an aperture of $ 1. This paper is sized to the Chinese National Standard (CNS) A4 specification (21 ()) < 297 mm) 1 91945 H3. The electronic device substrate is in contact with an electroless copper solution; The substrate is maintained at a low current density for a period of time, and the bell copper on the conductive layer is used as described above: == No. and the electric ore is continued to provide a steel seed layer. Floor. & The method of item 9, wherein the conductive layer is a barrier U: The method of item 10 of the patent scope, wherein the barrier layer comprises, cobalt, tungsten-phosphorus, tungsten, tungsten nitride, or titanium nitride . 12. The method of item 9 in the scope of patent application, 苴 φ10mA / cm2. Among them, the current density is as high as 13. The method in item 12 of the patent application range is 5mA / em2. -^ Electricity is up to 14. The square seconds of item 9 in the scope of patent application. The time of 8T is maintained at a maximum of 3015. The time of item 14 in the scope of patent application is up to 30 seconds. /, The time is maintained at 10 seconds 16 For example, the scope of application for patent No. 901. Method ... Kong Qing is less than or equal to printed by the Staff Welfare Committee of the Central Standards Bureau of the Ministry of Economic Affairs. The method of item 9 of the patent, wherein the substrate is a kind of crystal 19.-The following steps for strengthening the discontinuous seed layer deposited on the substrate: contact the substrate with the discontinuous seed layer with a non- $; The substrate maintains a low current density for a period of time to start with ^ Liquid--_ %% * This paper size is copper plating on Guan Jiaxian (CNS) A4 521325 H3; interrupt the current; and continue electroless plating to provide A practical continuous seed layer. 20. The method according to item 19 of the patent application, wherein the discontinuous seed layer is copper or copper alloy. 21. The method according to item 19 of the patent application, wherein the current density is the highest Up to 10mA / cm2 〇22. If the method of applying the scope of patent No. 21, the current density is up to 5mA / cm2 〇23. If the method of applying the scope of patent No. 19, wherein the time is maintained for a maximum of 30 seconds. The method according to item 23, wherein the time is maintained for 10 seconds to 30 seconds. 25. The method according to item 19 of the patent application, wherein the pore diameter is less than or equal to 0.5 μηι 〇26. The method according to item 19 of the patent application The substrate is a kind of wafer. The paper printed by the Staff Welfare Committee of the Central Bureau of Standards of the Ministry of Economic Affairs is compliant with China National Standards (CNS) A4 (210 X 297 mm) 3 91945
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