JP2004197169A - Method for forming copper electric wiring on substrate - Google Patents
Method for forming copper electric wiring on substrate Download PDFInfo
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- JP2004197169A JP2004197169A JP2002367469A JP2002367469A JP2004197169A JP 2004197169 A JP2004197169 A JP 2004197169A JP 2002367469 A JP2002367469 A JP 2002367469A JP 2002367469 A JP2002367469 A JP 2002367469A JP 2004197169 A JP2004197169 A JP 2004197169A
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 69
- 229910052802 copper Inorganic materials 0.000 title claims abstract description 69
- 239000010949 copper Substances 0.000 title claims abstract description 69
- 239000000758 substrate Substances 0.000 title claims abstract description 51
- 238000000034 method Methods 0.000 title claims abstract description 29
- 238000007747 plating Methods 0.000 claims abstract description 41
- 229920000642 polymer Polymers 0.000 claims abstract description 30
- 238000011282 treatment Methods 0.000 claims abstract description 14
- 239000007788 liquid Substances 0.000 claims abstract description 13
- 239000002184 metal Substances 0.000 claims abstract description 13
- 229910052751 metal Inorganic materials 0.000 claims abstract description 13
- IAYPIBMASNFSPL-UHFFFAOYSA-N Ethylene oxide Chemical compound C1CO1 IAYPIBMASNFSPL-UHFFFAOYSA-N 0.000 claims description 7
- 239000002202 Polyethylene glycol Substances 0.000 claims description 7
- 229920001223 polyethylene glycol Polymers 0.000 claims description 7
- GOOHAUXETOMSMM-UHFFFAOYSA-N Propylene oxide Chemical compound CC1CO1 GOOHAUXETOMSMM-UHFFFAOYSA-N 0.000 claims description 5
- 229920001451 polypropylene glycol Polymers 0.000 claims description 3
- 230000007547 defect Effects 0.000 abstract description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 8
- 229910052710 silicon Inorganic materials 0.000 abstract description 8
- 239000010703 silicon Substances 0.000 abstract description 8
- 239000011800 void material Substances 0.000 abstract description 3
- 239000000243 solution Substances 0.000 description 12
- 235000012431 wafers Nutrition 0.000 description 8
- 239000000203 mixture Substances 0.000 description 7
- WSFSSNUMVMOOMR-UHFFFAOYSA-N Formaldehyde Chemical compound O=C WSFSSNUMVMOOMR-UHFFFAOYSA-N 0.000 description 5
- 239000002904 solvent Substances 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 125000004432 carbon atom Chemical group C* 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 238000009713 electroplating Methods 0.000 description 4
- KCXVZYZYPLLWCC-UHFFFAOYSA-N EDTA Chemical compound OC(=O)CN(CC(O)=O)CCN(CC(O)=O)CC(O)=O KCXVZYZYPLLWCC-UHFFFAOYSA-N 0.000 description 3
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 3
- 239000003638 chemical reducing agent Substances 0.000 description 3
- KRKNYBCHXYNGOX-UHFFFAOYSA-N citric acid Chemical compound OC(=O)CC(O)(C(O)=O)CC(O)=O KRKNYBCHXYNGOX-UHFFFAOYSA-N 0.000 description 3
- 229910000365 copper sulfate Inorganic materials 0.000 description 3
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 3
- 238000007772 electroless plating Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- CIWBSHSKHKDKBQ-JLAZNSOCSA-N Ascorbic acid Chemical compound OC[C@H](O)[C@H]1OC(=O)C(O)=C1O CIWBSHSKHKDKBQ-JLAZNSOCSA-N 0.000 description 2
- PIICEJLVQHRZGT-UHFFFAOYSA-N Ethylenediamine Chemical compound NCCN PIICEJLVQHRZGT-UHFFFAOYSA-N 0.000 description 2
- 125000000217 alkyl group Chemical group 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 229910001429 cobalt ion Inorganic materials 0.000 description 2
- XLJKHNWPARRRJB-UHFFFAOYSA-N cobalt(2+) Chemical compound [Co+2] XLJKHNWPARRRJB-UHFFFAOYSA-N 0.000 description 2
- 239000008139 complexing agent Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- XTVVROIMIGLXTD-UHFFFAOYSA-N copper(II) nitrate Chemical compound [Cu+2].[O-][N+]([O-])=O.[O-][N+]([O-])=O XTVVROIMIGLXTD-UHFFFAOYSA-N 0.000 description 2
- HHLFWLYXYJOTON-UHFFFAOYSA-N glyoxylic acid Chemical compound OC(=O)C=O HHLFWLYXYJOTON-UHFFFAOYSA-N 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 238000007781 pre-processing Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- ROFVEXUMMXZLPA-UHFFFAOYSA-N Bipyridyl Chemical group N1=CC=CC=C1C1=CC=CC=N1 ROFVEXUMMXZLPA-UHFFFAOYSA-N 0.000 description 1
- FEWJPZIEWOKRBE-JCYAYHJZSA-N Dextrotartaric acid Chemical compound OC(=O)[C@H](O)[C@@H](O)C(O)=O FEWJPZIEWOKRBE-JCYAYHJZSA-N 0.000 description 1
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- FEWJPZIEWOKRBE-UHFFFAOYSA-N Tartaric acid Natural products [H+].[H+].[O-]C(=O)C(O)C(O)C([O-])=O FEWJPZIEWOKRBE-UHFFFAOYSA-N 0.000 description 1
- NSOXQYCFHDMMGV-UHFFFAOYSA-N Tetrakis(2-hydroxypropyl)ethylenediamine Chemical compound CC(O)CN(CC(C)O)CCN(CC(C)O)CC(C)O NSOXQYCFHDMMGV-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000002378 acidificating effect Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 125000003158 alcohol group Chemical group 0.000 description 1
- 150000008431 aliphatic amides Chemical group 0.000 description 1
- 150000003973 alkyl amines Chemical group 0.000 description 1
- 229960005070 ascorbic acid Drugs 0.000 description 1
- 235000010323 ascorbic acid Nutrition 0.000 description 1
- 239000011668 ascorbic acid Substances 0.000 description 1
- RJTANRZEWTUVMA-UHFFFAOYSA-N boron;n-methylmethanamine Chemical compound [B].CNC RJTANRZEWTUVMA-UHFFFAOYSA-N 0.000 description 1
- 238000001311 chemical methods and process Methods 0.000 description 1
- UFMZWBIQTDUYBN-UHFFFAOYSA-N cobalt dinitrate Chemical compound [Co+2].[O-][N+]([O-])=O.[O-][N+]([O-])=O UFMZWBIQTDUYBN-UHFFFAOYSA-N 0.000 description 1
- 229910001981 cobalt nitrate Inorganic materials 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000012895 dilution Substances 0.000 description 1
- 238000010790 dilution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- -1 for example Chemical compound 0.000 description 1
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 1
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 1
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- ACVYVLVWPXVTIT-UHFFFAOYSA-N phosphinic acid Chemical compound O[PH2]=O ACVYVLVWPXVTIT-UHFFFAOYSA-N 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000004901 spalling Methods 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000011975 tartaric acid Substances 0.000 description 1
- 235000002906 tartaric acid Nutrition 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Abstract
Description
【０００１】
【発明の属する技術分野】
本発明は、基板の銅配線形成方法に関する。さらに詳しくは、微細な配線溝で回路パターンが形成された半導体ウェハなどの電子回路用基板に対し、配線溝の底面から銅を析出、堆積せしめて埋め込むことにより、電気的信頼性が高い微細回路配線を形成することができる銅配線の形成方法に関する。
【０００２】
【従来の技術】
従来より、半導体ウェハなどの微細な回路パターンを有する電子回路用基板に対して、金属として電気抵抗が低く電気信頼性の高い銅を用いて回路配線を形成する検討がされている。
【０００３】
金属銅を用いて回路配線を形成する方法としては、例えば、配線用の溝を予め形成した電子回路基板表面を銅めっきすることにより溝の中に銅を埋め込み、その後表面の余分な銅を化学機械研磨（Chemical Mechanical Polishing：ＣＭＰ）により除去するという方法が用いられている。この方法におけるめっき手段としては、主として化学的プロセスを用いる無電解めっきと、電気化学的プロセスを用いる電解めっきとがあるが、必要とする設備や作業が簡便であるという点で、無電解銅めっきが広く用いられていた。一般的に、電解めっきに先立っては、電解めっき時の給電層となる銅薄膜がスパッタリング法等によって形成されているが、近年においては配線の微細化が進むに従って、この給電層が溝底部付近で膜厚が薄くなったり、不連続になったりして、電解めっきによる埋め込みでの欠陥の原因となっていた。このような問題の解決策として、電流分布の影響を受けない無電解めっきによる配線形成が提案されている。
【０００４】
しかしながら、従来の無電解銅めっきでは、微細な配線溝の側壁や底面から金属銅が等方成長していくため、側壁から析出した銅が配線溝の入口を覆ってしまうことがあり、溝の内部にシームボイド等の欠陥が形成されやすいという問題があった。そして、溝内部にこのような欠陥が残ると、高電流を流した場合の熱応力や温度上昇によって、ストレスマイグレーションやエレクトロマイグレーションが生じ、当該欠陥から断線して、回路配線の電気特性に悪影響を与えることがあった。
【０００５】
【発明が解決しようとする課題】
従って、微細な回路パターンが設けられたシリコンウェハ等の電子回路用基板に対し、無電解銅めっきにより溝内部にシームボイド等の欠陥が生じることがなく、優れた銅の埋め込み性と高い電気信頼性を有する微細回路配線を形成することができる技術の提供が求められていた。
【０００６】
【課題を解決するための手段】
本発明者らは、上記課題を解決すべく鋭意検討を重ねた結果、被めっき体である電子回路用基板を無電解銅めっきするに先立ち、ポリマー成分の含有する処理液に浸漬させて基板表面にポリマーの層を形成させ、その後に無電解銅めっきを行えば、電子回路用基板上の回路パターンの溝の底面部から銅が析出、堆積せしめて埋め込みを行うことができるため、シームボイド等の欠陥を形成することなく、電気的信頼性の高い微細回路配線が形成できることを見出し、本発明を完成した。
【０００７】
すなわち、本発明は、微細な回路パターンが設けられ、金属シード層が形成された電子回路用基板に銅配線を形成する方法であって、該基板をポリマー成分を含有する溶液に浸漬した後、無電解銅めっきを行うことを特徴とする基板の銅配線形成方法を提供するものである。
【０００８】
【発明の実施の形態】
本発明である基板の銅配線形成方法を実施するには、まず、埋め込み配線構造を有する基板に対して、金属シード層を形成する。
【０００９】
本発明方法の対象となる基板は、その表面に埋め込み配線構造が設けられた、シリコンウェハ等の半導体基板などである。この基板上の埋め込み配線構造は、例えば、微細な溝等（以下、「配線溝」ということもある）により形成されるものであり、この配線溝が金属銅で埋められることにより、回路配線となる。本発明の銅配線形成方法の対象となる電子回路用基板としては、例えば、幅が０．０１〜１．０μｍ程度、深さが０．１〜２．０μｍ程度（アスペクト比として１〜５程度）の配線溝を有しているものが挙げられる。
【００１０】
この基板に対する金属シード層の形成は、必要により、あらかじめ常法で前処理された後実施される。この前処理の例としては、例えば、シリコンウェハ等のシリコン基板の場合は、バリア層の形成が挙げられる。このバリア層は、例えば、ＴａＮ、ＴｉＮ、ＷＮ、ＳｉＴｉＮ等の金属窒化物やＣｏＷＰ、ＣｏＷＢ等により形成されたものであることが好ましい。
【００１１】
金属シード層は、酸性銅めっきを行う前に、基板に対して給電層となるものであり、種々の導電化処理により形成される。この導電化処理の具体例としては、例えば、スパッタリング、化学蒸着法（chemical vapor deposition：ＣＶＤ）、物理蒸着法（Physical vapor deposition：ＰＶＤ）等の方法を用いて行うことができる。
【００１２】
この金属シード層は、一般に、５〜１００ｎｍ程度の厚さで形成すればよい。また、本発明の方法においては、上記の金属シード層は、溝内全体に完全に形成させる必要はなく、例えば、電子回路用基板の表面及び配線溝の底面部に形成されていればよい。
【００１３】
上記の導電化処理により金属シード層が形成された電子回路用基板は、次いで、ポリマー成分を含有した処理液に浸漬される。
【００１４】
上記処理液に含有されるポリマー成分は、基板表面に吸着して、無電解銅めっきを行った際に該基板表面上での銅めっき層の形成を抑制できる作用を有するものであれば特に制限なく使用することができる。
【００１５】
このポリマー成分の例としては、ポリエチレングリコール、ポリプロピレングリコール、エチレンオキサイド付加物、プロピレンオキサイド付加物またはエチレンオキサイド付加物−プロピレンオキサイド付加物等が挙げられる。このうち、エチレンオキサイド付加物としては、下記（Ｉ）式で表されるものが、プロピレンオキサイド付加物としては、式（II）で表されるものをそれぞれ例示することができる。これらのポリマー成分は、１種を単独で用いてもよく、また２種以上を組み合わせて用いてもよい。
【００１６】
（エチレンオキサイド付加物）
【化１】
【００１７】
（プロピレンオキサイド付加物）
【化２】
【００１８】
上記のポリマー成分は、処理液に電子回路用基板を浸漬させた場合に、該基板の表面だけに優先的に吸着させるため、分子量が比較的大きいものを使用することが好ましい。例えば、ポリマー成分としてポリエチレングリコールを使用した場合には、分子量が４０００〜４００００のものを用いることが好ましく、ポリプロピレングリコールを使用した場合には、分子量が６００〜１０００のものを用いることが好ましい。また、（Ｉ）式で表されるエチレンオキサイド付加物、（II）式で表されるプロピレンオキサイド付加物またはそれらの混合物を使用した場合には、分子量が１０００〜５０００のものを用いることが好ましい。
【００１９】
また、この処理液においてポリマー成分を溶解ないしは懸濁させるための溶媒としては、ポリマー成分の特性に影響を与えないものであれば特に制限なく使用することができ、例えば、水、硫酸水溶液、硫酸銅水溶液等を用いることができる。なお、この次に行う無電解めっきで使用するめっき浴を溶媒として用いれば、溶媒成分によるめっき浴の希釈、ｐＨ変動及び汚染を防止することができるという点で好ましい。
【００２０】
更に、上記処理液中のポリマー成分の濃度は、被めっき体である電子回路用基板の種類や面積及び基板上の配線溝の大きさ、処理液中のポリマー成分以外の成分の種類等によって適宜決定されるが、一般に、０．１ｍｇ／Ｌ〜１０ｇ／Ｌであればよく、１０ｍｇ／Ｌ〜１ｇ／Ｌが好ましい。
【００２１】
上記の処理液の調製方法は、ポリマー成分を適切な溶媒に混合させる等、通常の方法で調製すればよい。また、電子回路基板を処理液に浸漬する条件についても特に制限はなく、処理液の成分等により適宜決定すればよいが、一般には、液温を 室温（２０℃）〜６０℃程度で、５秒〜３０分程度浸漬すればよい。
【００２２】
以上のようにして、ポリマー成分を含有する溶液に浸漬された基板は、以後常法に従い、無電解銅めっき浴が行われる。
【００２３】
この無電解銅めっき浴としては、特に制限なく、室温浴、高温浴いずれのタイプの銅めっきを使用することができ、例えば、公知の無電解銅めっき浴の硫酸銅を含有しためっき浴や、硝酸銅を含有しためっき浴等の銅めっき浴を使用することができる。また、かかるめっき浴には、ＥＤＴＡ、酒石酸、クアドロール、くえん酸、エチレンジアミン等の錯化剤や、ホルマリン、グリオキシル酸、ジメチルアミンボラン、次亜リン酸、コバルトイオン等の還元剤を添加することが好ましい。なお、無電解銅めっき浴としては、水素ガスの発生反応を伴わないめっき浴、例えば、２価のコバルトイオンを還元剤として用いた浴等を使用することが好ましい。
【００２４】
上記の無電解銅めっきを行なう条件も、それぞれの無電解銅めっき浴での通常の条件に従えばよい。すなわち、錯化剤をＥＤＴＡ、還元剤にホルマリンとした硫酸銅めっき浴を使用し、シリコンウェハ上の幅０．２５μｍ、深さ１μｍの配線溝を完全に埋めるためには、浴温を５０〜７０℃程度、浴のｐＨを１３程度として、３０分程度無電解銅めっきを行えばよい。
【００２５】
以上説明した本発明の方法において、好ましい態様の一つとしては、例えば、まずはポリマー成分としてポリエチレングリコール（分子量４０００）を含有する後記組成の無電解銅めっき浴（液温：２５℃、ｐＨ：１２．５）を処理液としてこれに１分程度浸漬し、その後、当該浴からポリエチレングリコール成分を除いた無電解銅めっき浴（浴温：６０℃、ｐＨ：１２．５）を用いて、３０分間程度無電解銅めっきする方法が挙げられる。
【００２６】
無電解銅めっき浴組成：
硫酸銅 ０．０４ｍｏｌ／Ｌ
ＥＤＴＡ・４Ｎａ ０．１ｍｏｌ／Ｌ
ＨＣＨＯ ０．３ｍｏｌ／Ｌ
ポリエチレングリコール（分子量４０００） ５００ｍｇ／Ｌ
ｐＨ １２．５（水酸化ナトリウムにて調整）
【００２７】
【作用】
本発明の銅配線形成方法は、微細溝を有する電子回路用基板の表面にポリマー成分を吸着させた後に無電解銅めっきを施すことにより、溝の底面部から銅を堆積させ埋め込みを行うという方法である。このような方法が可能となるのは、以下の理由による。すなわち、シード層が形成された電子回路用基板を処理液に浸漬させた場合、処理液中のポリマー成分は、基板の表面部に吸着する一方、比較的高分子量であるため配線溝の内部には浸入しにくくほとんど吸着しない。
【００２８】
従って、基板の表面部を中心にポリマー成分層が形成されることになるが、このような基板に無電解銅めっきを行った場合には、ポリマー成分が吸着した基板表面部では、ポリマー成分が銅の析出を抑制することになるのに対し、配線溝の内部では、ポリマー成分の吸着が少ないため、金属シード層が形成されている溝の底面部から銅が析出することになる。このように、配線溝の底面部から基板表面に向かって銅めっきが進行することとなるため、銅めっき内にシームボイドなどの欠陥が生じることもなく、溝の内部への銅の埋め込みが良好に達成されるのである。
【００２９】
【実施例】
次に、実施例および参考例を挙げて本発明をさらに詳しく説明するが、本発明はこれらの実施例等になんら制約されるものではない
【００３０】
参 考 例 １
微細回路基板サンプルの調製：
微細回路基板サンプルとして、幅０．３μｍ、深さ１μｍの配線溝が存在する直径２００ｍｍのシリコンウェハを用意した。この基板サンプルに対し、まず、ＴａＮのバリア層を２０ｎｍの厚さで形成し、さらに、スパッリタングにて、銅シード層を５０ｎｍの厚さで形成した。なお、銅シード層は、主として基板サンプルの表面及び配線溝の底面部に形成した。
【００３１】
実 施 例 １
参考例１で得た基板サンプルを、ポリマー成分であるポリエチレングリコールを含有した下記組成の処理液（ｐＨ６.６）に、液温２５℃の条件で１分間浸漬し、基板サンプルを処理した。
【００３２】
（ 処理液の組成 ）
次に、このサンプル基板に対して、下記組成の銅めっき浴を用い、浴温５０℃、ｐＨ６．６の条件で３０分間無電解銅めっきを行った。
【００３４】
（ 銅めっき浴の組成 ）
１． 硝酸銅 ０．０５ｍｏｌ／Ｌ
２． 硝酸コバルト ０．１５ｍｏｌ／Ｌ
３． エチレンジアミン ０．６０ｍｏｌ／Ｌ
４． ２，２’−ビピリジル ２０ｍｇ／Ｌ
５． アスコルビン酸 ０．０１ｍｏｌ／Ｌ
６． 塩化水素 ０．００５ｍｏｌ／Ｌ
【００３５】
無電解銅めっき後のサンプル基板の配線溝について、電界放射型走査電子顕微鏡（ＦＥ−ＳＥＭ）を用いて断面を観察したところ、銅は配線溝の底面部から堆積され、溝内に隙間なく銅が埋め込まれている様子が確認できた。このように、本発明の銅配線形成方法を用いれば、配線溝内にはシームボイド等の欠陥が残る心配がないため、電気的信頼性の高い配線を形成することが可能となる。
【００３６】
【発明の効果】
本発明の基板の銅配線形成方法は、主に配線溝の底面から銅を析出、堆積せしめるため、配線溝内にはシームボイド等の欠陥が残ることもなく、電気的信頼性の高い配線を形成することができるものである。
【００３７】
従って、本発明の基板の銅配線形成方法は、シリコンウェハ等の電子回路用基板の微細回路配線の形成に有利に利用することができるものである。
以 上[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for forming copper wiring on a substrate. More specifically, by depositing, depositing and embedding copper from the bottom of the wiring groove into a substrate for an electronic circuit such as a semiconductor wafer having a circuit pattern formed by the fine wiring groove, the fine circuit has high electrical reliability. The present invention relates to a method for forming a copper wiring capable of forming a wiring.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, it has been studied to form circuit wiring on a substrate for an electronic circuit having a fine circuit pattern, such as a semiconductor wafer, using copper having low electric resistance and high electric reliability as a metal.
[0003]
As a method of forming circuit wiring using metal copper, for example, copper is buried in the groove by plating the surface of an electronic circuit board with wiring grooves formed in advance, and then excess copper on the surface is chemically removed. A method of removing by mechanical polishing (Chemical Mechanical Polishing: CMP) is used. The plating means in this method includes mainly electroless plating using a chemical process and electrolytic plating using an electrochemical process. However, in view of the simplicity of required equipment and work, electroless copper plating is used. Was widely used. In general, prior to electrolytic plating, a copper thin film serving as a power supply layer at the time of electrolytic plating is formed by a sputtering method or the like. In this case, the film thickness was reduced or became discontinuous, which caused defects in filling by electrolytic plating. As a solution to such a problem, wiring formation by electroless plating which is not affected by current distribution has been proposed.
[0004]
However, in the conventional electroless copper plating, metallic copper grows isotropically from the side walls and the bottom surface of the fine wiring groove, so that the copper precipitated from the side wall may cover the entrance of the wiring groove. There is a problem that defects such as seam voids are easily formed inside. If such a defect remains in the groove, stress migration or electromigration occurs due to thermal stress or temperature rise when a high current is applied, and the wire is disconnected from the defect, adversely affecting the electrical characteristics of the circuit wiring. I had to give.
[0005]
[Problems to be solved by the invention]
Therefore, electroless copper plating does not cause defects such as seam voids in the grooves of electronic circuit substrates such as silicon wafers provided with fine circuit patterns, and provides excellent copper embedding and high electrical reliability. There has been a demand for a technique capable of forming a fine circuit wiring having the following.
[0006]
[Means for Solving the Problems]
The inventors of the present invention have conducted intensive studies to solve the above-mentioned problems, and as a result, prior to electroless copper plating of an electronic circuit substrate to be plated, the substrate surface was immersed in a treatment solution containing a polymer component so as to be plated. If a polymer layer is formed and then electroless copper plating is performed, copper can be deposited and deposited from the bottom portion of the groove of the circuit pattern on the electronic circuit board, and embedded and embedded. The present inventors have found that a fine circuit wiring with high electrical reliability can be formed without forming a defect, and completed the present invention.
[0007]
That is, the present invention is a method of forming a copper wiring on an electronic circuit substrate on which a fine circuit pattern is provided and a metal seed layer is formed, and after immersing the substrate in a solution containing a polymer component, An object of the present invention is to provide a method for forming copper wiring on a substrate, characterized by performing electroless copper plating.
[0008]
BEST MODE FOR CARRYING OUT THE INVENTION
In order to carry out the method for forming a copper wiring on a substrate according to the present invention, first, a metal seed layer is formed on a substrate having an embedded wiring structure.
[0009]
The substrate to be subjected to the method of the present invention is a semiconductor substrate such as a silicon wafer having a buried wiring structure provided on its surface. The embedded wiring structure on the substrate is formed by, for example, a fine groove or the like (hereinafter, also referred to as a “wiring groove”). Become. The electronic circuit substrate to be subjected to the copper wiring forming method of the present invention is, for example, about 0.01 to 1.0 μm in width and about 0.1 to 2.0 μm in depth (about 1 to 5 in aspect ratio). )).
[0010]
The formation of the metal seed layer on the substrate is performed, if necessary, after pre-processing by a conventional method. As an example of the pre-processing, for example, in the case of a silicon substrate such as a silicon wafer, formation of a barrier layer can be mentioned. This barrier layer is preferably formed of, for example, metal nitride such as TaN, TiN, WN, SiTiN, CoWP, CoWB, or the like.
[0011]
The metal seed layer serves as a power supply layer to the substrate before performing the acidic copper plating, and is formed by various conductive treatments. As a specific example of the conductive treatment, for example, sputtering, chemical vapor deposition (CVD), physical vapor deposition (PVD), or the like can be used.
[0012]
This metal seed layer may be generally formed with a thickness of about 5 to 100 nm. In the method of the present invention, the metal seed layer does not need to be completely formed in the entire groove, but may be formed, for example, on the surface of the electronic circuit substrate and the bottom of the wiring groove.
[0013]
The electronic circuit substrate on which the metal seed layer has been formed by the above-described conductive treatment is then immersed in a treatment liquid containing a polymer component.
[0014]
The polymer component contained in the treatment liquid is particularly limited as long as it has an action of adsorbing on the substrate surface and suppressing the formation of a copper plating layer on the substrate surface when performing electroless copper plating. Can be used without.
[0015]
Examples of the polymer component include polyethylene glycol, polypropylene glycol, ethylene oxide adduct, propylene oxide adduct, or ethylene oxide adduct-propylene oxide adduct. Among them, those represented by the following formula (I) can be exemplified as the ethylene oxide adduct, and those represented by the formula (II) can be exemplified as the propylene oxide adduct. One of these polymer components may be used alone, or two or more thereof may be used in combination.
[0016]
(Ethylene oxide adduct)
Embedded image
[0017]
(Propylene oxide adduct)
Embedded image
[0018]
When the electronic component substrate is immersed in the treatment liquid, it is preferable to use a polymer component having a relatively large molecular weight so that the polymer component is preferentially adsorbed only on the surface of the substrate. For example, when polyethylene glycol is used as the polymer component, one having a molecular weight of 4,000 to 40,000 is preferably used, and when polypropylene glycol is used, one having a molecular weight of 600 to 1,000 is preferably used. When an ethylene oxide adduct represented by the formula (I), a propylene oxide adduct represented by the formula (II) or a mixture thereof is used, it is preferable to use those having a molecular weight of 1,000 to 5,000. .
[0019]
As the solvent for dissolving or suspending the polymer component in the treatment liquid, any solvent can be used without particular limitation as long as it does not affect the properties of the polymer component. An aqueous copper solution or the like can be used. It is preferable to use a plating bath to be used in the subsequent electroless plating as a solvent in that the dilution of the plating bath by a solvent component, pH fluctuation and contamination can be prevented.
[0020]
Furthermore, the concentration of the polymer component in the processing solution is appropriately determined according to the type and area of the electronic circuit substrate as the object to be plated, the size of the wiring groove on the substrate, the type of component other than the polymer component in the processing solution, and the like. Although it is determined, generally, it may be 0.1 mg / L to 10 g / L, and preferably 10 mg / L to 1 g / L.
[0021]
The treatment liquid may be prepared by a usual method such as mixing a polymer component with an appropriate solvent. The conditions for immersing the electronic circuit board in the processing liquid are not particularly limited, and may be appropriately determined depending on the components of the processing liquid. Generally, the temperature of the liquid is from room temperature (20 ° C) to about 60 ° C. It may be immersed for about seconds to 30 minutes.
[0022]
The substrate immersed in the solution containing the polymer component as described above is then subjected to an electroless copper plating bath according to a conventional method.
[0023]
The electroless copper plating bath is not particularly limited, and any type of copper plating at room temperature or high temperature can be used.For example, a known electroless copper plating bath containing copper sulfate, A copper plating bath such as a plating bath containing copper nitrate can be used. In addition, a complexing agent such as EDTA, tartaric acid, quadrol, citric acid, and ethylenediamine, and a reducing agent such as formalin, glyoxylic acid, dimethylamine borane, hypophosphorous acid, and cobalt ion may be added to the plating bath. preferable. As the electroless copper plating bath, it is preferable to use a plating bath that does not involve a reaction for generating hydrogen gas, such as a bath using divalent cobalt ions as a reducing agent.
[0024]
The conditions for performing the above electroless copper plating may be in accordance with the usual conditions in each electroless copper plating bath. That is, using a copper sulfate plating bath in which EDTA is a complexing agent and formalin is a reducing agent, and a bath temperature of 50 to 50 μm to completely fill a wiring groove having a width of 0.25 μm and a depth of 1 μm on a silicon wafer. The electroless copper plating may be performed at about 70 ° C. and the pH of the bath at about 13 for about 30 minutes.
[0025]
In the above-described method of the present invention, as one of preferred embodiments, for example, first, an electroless copper plating bath having the following composition containing polyethylene glycol (molecular weight: 4000) as a polymer component (solution temperature: 25 ° C., pH: 12) .5) as a treatment solution and immersed in the solution for about 1 minute, and then using an electroless copper plating bath (bath temperature: 60 ° C., pH: 12.5) from which the polyethylene glycol component was removed for 30 minutes. To this extent, a method of electroless copper plating may be mentioned.
[0026]
Electroless copper plating bath composition:
Copper sulfate 0.04mol / L
EDTA · 4Na 0.1mol / L
HCHO 0.3mol / L
Polyethylene glycol (molecular weight 4000) 500mg / L
pH 12.5 (adjusted with sodium hydroxide)
[0027]
[Action]
The copper wiring forming method of the present invention is a method of depositing and embedding copper from the bottom of the groove by applying electroless copper plating after adsorbing a polymer component on the surface of an electronic circuit substrate having fine grooves. It is. Such a method becomes possible for the following reasons. That is, when the substrate for an electronic circuit on which the seed layer is formed is immersed in the processing liquid, the polymer component in the processing liquid is adsorbed on the surface of the substrate, but has a relatively high molecular weight, so that the polymer component is contained in the wiring groove. Hardly penetrates and hardly adsorbs.
[0028]
Therefore, a polymer component layer is formed around the surface of the substrate, but when electroless copper plating is performed on such a substrate, the polymer component is not adsorbed on the surface of the substrate where the polymer component is adsorbed. In contrast to suppressing copper deposition, copper is precipitated from the bottom surface of the groove in which the metal seed layer is formed because the polymer component is less adsorbed inside the wiring groove. As described above, since the copper plating proceeds from the bottom of the wiring groove toward the substrate surface, defects such as seam voids do not occur in the copper plating, and copper can be buried in the groove well. It is achieved.
[0029]
【Example】
Next, the present invention will be described in more detail with reference to Examples and Reference Examples, but the present invention is not limited to these Examples and the like.
Reference example 1
Preparation of microcircuit board sample:
As a fine circuit board sample, a silicon wafer having a diameter of 200 mm and a wiring groove having a width of 0.3 μm and a depth of 1 μm was prepared. First, a TaN barrier layer was formed to a thickness of 20 nm on this substrate sample, and a copper seed layer was formed to a thickness of 50 nm by spalling. The copper seed layer was formed mainly on the surface of the substrate sample and the bottom of the wiring groove.
[0031]
Example 1
The substrate sample obtained in Reference Example 1 was immersed in a treatment solution (pH 6.6) containing polyethylene glycol as a polymer component and having the following composition at a liquid temperature of 25 ° C. for 1 minute to process the substrate sample.
[0032]
(Composition of treatment solution)
Next, the sample substrate was subjected to electroless copper plating using a copper plating bath having the following composition at a bath temperature of 50 ° C. and a pH of 6.6 for 30 minutes.
[0034]
(Composition of copper plating bath)
1. Copper nitrate 0.05mol / L
2. Cobalt nitrate 0.15mol / L
3. Ethylenediamine 0.60mol / L
4. 2,2'-bipyridyl 20mg / L
5. Ascorbic acid 0.01mol / L
6. Hydrogen chloride 0.005mol / L
[0035]
When a cross section of the wiring groove of the sample substrate after the electroless copper plating was observed using a field emission scanning electron microscope (FE-SEM), copper was deposited from the bottom of the wiring groove, and copper was left in the groove without any gap. Was confirmed to be embedded. As described above, when the copper wiring forming method of the present invention is used, there is no fear that a defect such as a seam void remains in the wiring groove, so that a wiring having high electrical reliability can be formed.
[0036]
【The invention's effect】
In the method of forming copper wiring on a substrate of the present invention, copper is deposited and deposited mainly from the bottom of the wiring groove, so that a defect such as a seam void does not remain in the wiring groove, and a highly reliable wiring is formed. Is what you can do.
[0037]
Therefore, the method for forming copper wiring on a substrate according to the present invention can be advantageously used for forming fine circuit wiring on an electronic circuit substrate such as a silicon wafer.
that's all
Claims (3)
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|---|---|---|---|
| JP2002367469A JP3864138B2 (en) | 2002-12-19 | 2002-12-19 | Method for forming copper wiring on substrate |
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|---|---|---|---|
| JP2002367469A JP3864138B2 (en) | 2002-12-19 | 2002-12-19 | Method for forming copper wiring on substrate |
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| JP2004197169A true JP2004197169A (en) | 2004-07-15 |
| JP3864138B2 JP3864138B2 (en) | 2006-12-27 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2009507135A (en) * | 2005-08-31 | 2009-02-19 | ラム リサーチ コーポレーション | System and method for forming patterned copper wire by electroless copper plating |
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| JP2009507135A (en) * | 2005-08-31 | 2009-02-19 | ラム リサーチ コーポレーション | System and method for forming patterned copper wire by electroless copper plating |
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