201023399—oc/d 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種發光二極體結構及其製作方 法，且特別是有關於一種侧壁上覆蓋有絕緣層的ϋ二 體結構及其製作方法。 【先前技術】 發光二極體的封裝製程—般是包減日日日、加工切割成 多個發光二極體晶片、固晶、打線接合等製程。然而，在 切割的過程中’容易在這些發光二極體晶片賴壁上產生 缺陷。-旦發光二極體晶片的罐具有缺陷，則易有漏電 流的問題產生’以致於發光二極體晶片在電性上的穩定性 =佳/此外’發光—極體晶片的側壁裸露於外界環境中， 2受到外界魏或是後續製簡污染或是損壞，以致於 製程良率降低。 ，外’在固晶的過程中’用以固定發光二極體晶片的 ^膠谷易因為_量控制不當而溢魅發光二極體晶片的側 =致於發光—極體晶片的ρ型摻雜半導體層與η型換 體層，間，性短路。前述之電性短路會造成發光二 製作成本疋偏電流增加、製程良率降低以及 【發明内容】 -极触毛月提&種發光二極體結構’可避免溢流至發光 道:片的側壁上的銀膠使Ρ型摻雜半導體層與η型摻 雜牛導體層之間電性短路。 5 〇668twf.doc/d 201023399 本發明另提出-種發光二極體結構的製作方法， 程良率較南且製作成本較低。 、本發明提出-種發光二極構的t作方法如下 述首先’提供-發光二極體晶片與—承载基板。發 =曰Γΐ於繼板上，發光二極體晶片具有朝向； 的-底面、相對於底面的至少—頂面以及與頂面相 ，的至側壁’且發光二極體晶片具有配胁頂面 ίΓί?:，於承載基板上形成—連續性抗氧化材 部份連續性抗氧化材料層，以於發光二 極體曰日片_面上及部分承載基板上 於頂面上的電極，並暴露出側壁。然二^ ，化法’以於發光二極體晶片的侧壁上形成—絕緣声 後，移除抗氧化層。 θ之 氧化ί本發明之—實施财，氧化法為乾魏化法或濕式 ❹ 在本發明之一實施例中，發光二極體晶片包括— 2雜半導體層、—第二型摻雜半導體層以及—發光層， 光層位於第—型摻雜半導體層與第二型摻雜半i體 在本發明之-實關巾’絕緣層的㈣包括第 =半導體層的氧化物、發光層的氧化物以及第二型捧鮮 導體層的氧化物。 〜、半 在本發明之—實關巾，絕緣層的材質包 化物以及錢的魏物。 氧 6 201023399 »668twf.doc/d 在本發明之一實施例中，絕緣層的材質包括含鎵的氧 化物以及含構的氧化物。 本發明提出一種發光二極體結構的製作方法如下所 述。首先，提供一發光二極體晶片與一承載基板。發光二 極體晶片配置於承載基板上，發光二極體晶片具有朝向承 載基板的一底面、相對於底面的至少一頂面以及與頂面相 連的至少一侧壁，且發光二極體晶片具有配置於頂面上的 參 至少一電極。接著，於承載基板上形成一連續性覆蓋材料 層。然後，移除部份連續性覆蓋材料層，以於頂面上及部 分承載基板上形成一覆蓋層，以覆蓋電極。接著，於承載 基板上形成一連續性絕緣材料層，並覆蓋發光二極體晶 片。之後，移除覆蓋層以及連續性絕緣材料層之位於覆蓋 層上的部分，以於發光二極體晶片的側壁上形成一絕緣層。 在本發明之一實施例中’形成連續性絕緣材料層的方 法包括物理氣相沉積、化學氣相沉積、濺鍍或電子束成長。 在本發明之一實施例中，絕緣層的材質包括含矽的氧 擊 化物。 在本發明之一實施例中，發光二極體晶片包括一第一 半導體層、—第二型摻雜半導體層以及—發光層， it光層位於第—型摻雜轉體層與第二型摻雜半導體 增之間。 述。本種發光二極體結構的製作方法如下所 曰提仪發光二極體晶片與一承載基板。發光二 °日日-己置於承載基板上，發光二極體晶片具有朝向承 7 )68twf.doc/d 201023399 載基板的-底面、相對於底面的至少一頂面以及與頂面相 連的至少-侧壁’且發光二極體晶片具有配置於頂面上的 至>、—電極。接者’承載基板上形成―連續性絕緣材料層， 以极蓋發光一極體晶片。然後，於侧壁上形成一保護層， 且，續性絕緣材料層位於保護層與侧壁之間。之後，移除 連續性絕緣材料層之未被保護層所覆蓋的部分，以於發光 二極體晶片的側壁上形成—絕緣層。然後，移除保護^。 • 在本發明之一實施例中，形成連續性絕緣材料層的方 法包括旋轉塗佈。 在本發明之-實關巾’賴魏緣材制的材 括氧化物溶膠。 、匕 二氧化 在本發明之一實施例中，氧化物溶膠包 矽的溶膠。 在本發明之-實施例中，發光二極體晶片包括 第二型摻雜半導體 婦雜半導體層、一第二型摻雜半導體層以及一發光芦， 其中發光層位於第一型摻雜半導體層 φ 層之間。 本發明提出-種發光二極體結構包括—發光二極體 晶片以及-絕緣層。發光二極體晶片具有—底面、相對於 底面的至少—頂面以及與頂面相連的至少，光 ::體配置於頂面上的—電極。絕緣層配置_ 壁上’並暴露出電極。 在本發明之一實施例中，絕緣層暴露出頂面。 在本發明之-實施例中，發光二極體晶片包括一第一 8 20102翌9__ 型摻雜半導體層、一第二型掺雜半導體層以及一發光層， 其中發光層位於第一型摻雜半導體層與第二型摻雜半導體 層之間。 在本發明之一實施例中，絕緣層的材質包括第—型摻 雜半導體層的氧化物、發光層的氧化物以及第二型摻雜半 導體層的氧化物。 ' 在本發明之一實施例中，絕緣層的材質包括含鎵的氧 化物以及含氮的氧化物。 在本發明之一實施例中，絕緣層的材質包括含鎵的氧 化物以及含磷的氧化物。 在本發明之一實施例中，絕緣層包括物理氣相沉積 層、化學氣相沉積層、濺鍍層或電子束成長層。 、 在本發明之一實施例中，絕緣層的材質包括含矽的 化物。 在本發明之一實施例中，絕緣層的材質包括二氧化 在本發明之一實施例中，絕緣層的材質包括硫及其化 合物。 綜上所述，本發明是在發光二極體晶片的侧壁上形成 一絕緣層，以避免習知技術中因銀膠溢流至侧壁而導致ρ ，摻雜半導體層與η型摻雜半導體層之間電性短路的問 題。如此一來，絕緣層可提升製程良率並降低製作成本。 ^為讓本發明之上述和其他特徵和優點能更明顯易 懂，下文特舉實施例，並配合所附圖式，作詳細說明如下。 9 201023399 -________J668twf.doc/d 【實施方式】 圖1A〜® ID纟會示本發明—實補之發光二極體結構 的製作方法的剖面圖。 首先’ 參照® 1A ’提供—發光二極體晶# 1〇〇與 一承載基板200’發光二極體晶片1〇〇配置於承載基板2〇〇 上。承載基板1〇〇例如是藍膜(blue tape)或是紫外線膠帶 (UV tape)。201023399-oc/d IX. Description of the Invention: [Technical Field] The present invention relates to a light-emitting diode structure and a method of fabricating the same, and more particularly to a second body covered with an insulating layer on a side wall Structure and its making method. [Prior Art] The packaging process of the light-emitting diode is generally a process of reducing the number of days, processing and cutting into a plurality of light-emitting diode chips, solid crystal, wire bonding and the like. However, defects are easily generated on the walls of these light-emitting diode wafers during the cutting process. If the can of the light-emitting diode wafer has defects, the problem of leakage current is generated so that the stability of the light-emitting diode wafer is electrically stable = better / in addition, the side wall of the light-emitting body wafer is exposed to the outside In the environment, 2 is polluted or damaged by external Wei or subsequent simplification, so that the process yield is reduced. , outside the 'in the process of solid crystal' to fix the light-emitting diode chip ^ glue valley easy because of the improper control of the amount of the light-emitting diode chip side = to illuminate - p-type doping of the polar body wafer The semiconductor layer and the n-type layer are short-circuited. The above-mentioned electrical short circuit will result in an increase in the manufacturing cost of the light-emitting device, a decrease in the process yield, and a reduction in the yield of the process. [Inventive content] - Extremely luminescent and light-emitting diode structure can avoid overflow to the illuminating channel: The silver paste on the sidewall electrically shorts between the erbium-doped semiconductor layer and the n-type doped bobshell layer. 5 〇668twf.doc/d 201023399 The invention further proposes a method for fabricating a light-emitting diode structure, which has a lower yield and a lower production cost. According to the present invention, a method for producing a light-emitting diode is as follows: First, a light-emitting diode wafer and a carrier substrate are provided. The light-emitting diode chip has a facing-bottom surface, at least a top surface opposite to the bottom surface, and a sidewall to the top surface, and the light-emitting diode wafer has a flank top surface ίΓί ?: forming a continuous layer of a continuous oxidation resistant material on the carrier substrate to expose the electrode on the top surface of the light-emitting diode and the portion of the substrate on the top surface of the light-emitting diode Side wall. However, after the formation of the insulating sound on the sidewall of the light-emitting diode wafer, the oxidation resistant layer is removed. Oxidation of θ, the method of the invention, the oxidation method is a dry-weining method or a wet-type enthalpy. In one embodiment of the invention, the light-emitting diode wafer comprises a 2-hetero semiconductor layer, a second-type doped semiconductor layer, and - an illuminating layer, the optical layer is located in the first-type doped semiconductor layer and the second-type doped half-body in the insulating layer of the present invention - (IV) includes the oxide of the = semiconductor layer, oxide of the luminescent layer And an oxide of the second type of holding conductor layer. ~, half In the present invention - the solid cover towel, the material of the insulating layer and the material of the money. Oxygen 6 201023399 »668twf.doc/d In one embodiment of the invention, the material of the insulating layer comprises a gallium-containing oxide and a structured oxide. The present invention provides a method of fabricating a light emitting diode structure as follows. First, a light emitting diode chip and a carrier substrate are provided. The light emitting diode chip is disposed on the carrier substrate, and the light emitting diode chip has a bottom surface facing the carrier substrate, at least one top surface opposite to the bottom surface, and at least one sidewall connected to the top surface, and the LED array has The at least one electrode disposed on the top surface. Next, a continuous cover material layer is formed on the carrier substrate. Then, a portion of the continuous cover material layer is removed to form a cover layer on the top surface and a portion of the carrier substrate to cover the electrodes. Next, a continuous insulating material layer is formed on the carrier substrate and covers the light emitting diode wafer. Thereafter, the cover layer and the portion of the continuous insulating material layer on the cover layer are removed to form an insulating layer on the sidewall of the light emitting diode wafer. In one embodiment of the invention, the method of forming a layer of continuous insulating material includes physical vapor deposition, chemical vapor deposition, sputtering, or electron beam growth. In an embodiment of the invention, the material of the insulating layer comprises cerium-containing oxysulfide. In an embodiment of the invention, the LED chip includes a first semiconductor layer, a second type doped semiconductor layer, and a light emitting layer, and the it light layer is located in the first type doped body layer and the second type doped layer. The increase in heterogeneous semiconductors. Said. The method for fabricating the light-emitting diode structure is as follows: a light-emitting diode chip and a carrier substrate. The light-emitting diode is placed on the carrier substrate, and the light-emitting diode wafer has a bottom surface facing the substrate, a bottom surface, at least one top surface opposite to the bottom surface, and at least a top surface connected to the top surface. The sidewalls and the light emitting diode wafer have a >, electrode disposed on the top surface. A continuous insulating material layer is formed on the carrier substrate, and the pole piece is illuminated by the pole cover. Then, a protective layer is formed on the sidewall, and a layer of the continuous insulating material is located between the protective layer and the sidewall. Thereafter, the portion of the continuous insulating material layer covered by the unprotected layer is removed to form an insulating layer on the sidewall of the light emitting diode wafer. Then, remove the protection ^. • In one embodiment of the invention, the method of forming a layer of continuous insulating material comprises spin coating. In the present invention, the material of the sturdy stalks is made of an oxide sol.匕 Dioxide In one embodiment of the invention, the sol of the oxide sol is encapsulated. In an embodiment of the invention, the LED array includes a second type doped semiconductor cation semiconductor layer, a second type doped semiconductor layer, and a luminescent reed, wherein the luminescent layer is located in the first type doped semiconductor layer Between φ layers. The present invention proposes a light-emitting diode structure comprising a light-emitting diode wafer and an insulating layer. The light-emitting diode wafer has a bottom surface, at least a top surface opposite to the bottom surface, and at least an optical electrode disposed on the top surface of the top surface. The insulation layer is disposed on the wall and exposes the electrodes. In an embodiment of the invention, the insulating layer exposes the top surface. In an embodiment of the invention, the LED array includes a first 8 20102翌9__ type doped semiconductor layer, a second type doped semiconductor layer, and a light emitting layer, wherein the light emitting layer is in the first type doping Between the semiconductor layer and the second type doped semiconductor layer. In an embodiment of the invention, the material of the insulating layer comprises an oxide of the first-type doped semiconductor layer, an oxide of the light-emitting layer, and an oxide of the second-type doped semiconductor layer. In an embodiment of the invention, the material of the insulating layer comprises a gallium-containing oxide and a nitrogen-containing oxide. In an embodiment of the invention, the material of the insulating layer comprises a gallium-containing oxide and a phosphorus-containing oxide. In an embodiment of the invention, the insulating layer comprises a physical vapor deposited layer, a chemical vapor deposited layer, a sputtered layer or an electron beam grown layer. In an embodiment of the invention, the material of the insulating layer comprises a ruthenium-containing compound. In an embodiment of the invention, the material of the insulating layer comprises dioxide. In one embodiment of the invention, the material of the insulating layer comprises sulfur and a compound thereof. In summary, the present invention forms an insulating layer on the sidewall of the LED chip to avoid ρ, doped semiconductor layer and n-type doping due to overflow of silver paste to the sidewall in the prior art. The problem of electrical short between semiconductor layers. In this way, the insulating layer can improve the process yield and reduce the manufacturing cost. The above and other features and advantages of the present invention will become more apparent from the aspects of the appended claims. 9 201023399 -________J668twf.doc/d [Embodiment] Figs. 1A to 1D show a cross-sectional view showing a method of fabricating a light-emitting diode structure of the present invention. First, the light-emitting diodes #1〇〇 and the light-emitting diodes 200' are disposed on the carrier substrate 2'. The carrier substrate 1 is, for example, a blue tape or a UV tape.
❿ 發光二極體晶片1〇〇具有朝向承載基板2〇〇的一底面 B、相對於底面B的二頂面U2以及與頂面ui、u2 相連的多個侧壁S，且發光二極體晶片100具有配置於頂 面Ul、U2上的多個電極幻、E2。 在本實施例中，發光二極體晶片100可包括一第一塑 ，雜半導體層112、-第二型摻雜半導體層114以及位於 第一型摻雜半導體層112與第二型摻雜半導體層114之間 的一發光層116。此外’發光二極體晶片1〇〇還可包括一 磊晶層120，磊晶層12〇位於發光二極體晶片1〇〇與承載 基板200之間。 接著，請再次參照圖1A，在本實施例中，於發光二 極體晶片100上全面形成一連續性抗氧化材料層A1，其材 質例如是光阻等感光材料。然後，請參照圖1B，在本實施 例中’可以曝光顯影法移除位於侧壁S上的連續性抗氧化 材料層A1，以於發光二極體晶片100的頂面U1、U2以及 Η刀表載基板2〇〇上形成一抗氧化層a。抗氧化層a覆| 配置於頂面Ul、U2上的電極El、E2，並暴露出侧壁S。 2010233995_ 之後，請參照圖ic，施行一氧化法，以於發光二極 體晶片100的側壁s上形成一絕緣層I，氧化法例如是乾 式氧化法（dry oxidation)或濕式氧化法（wet oxidation)。 施行濕式氧化法的方式例如是將發光二極體晶片100暴露 在含有水氣的環境中，而施行乾式氧化法的方式例如是將 發光二極體晶片100暴露在含有氧氣的環境中。此外，在 本實施例中’由於磊晶層120也可被氧化，因此，在磊晶 層120的侧壁122上亦會形成絕緣層I。 絕緣層I的材質可包括第一型摻雜半導體層112的氧 化物、發光層116的氧化物、第二型摻雜半導體層的 乳化物以及遙晶層120的氧化物。在本實施例中，絕緣層 I的材質包括含鎵的氧化物以及含氮的氧化物。在其他施 例中’絕緣層I的材質包括含鎵的氧化物以及含填的氧化 物。 值得注意的是，本實施例於發光二極體晶片1〇〇的侧 壁S上形成絕緣層I ’而絕緣層Ϊ可填補侧壁s上的缺陷 ❹ 並使侧壁S鈍化。如此一來’絕緣層I可降低漏電流產生 的機率，並提升發光二極體晶片100在電性上的穩定性。 此外，絕緣層I覆蓋侧壁s可保護侧壁s免於受到外界環 境或是後續製程的污染或是損壞，進而提升製程良率。义 再者，在後縯的固晶過程中，由於絕緣層Σ覆蓋發光 二極體晶片1GG的側壁S ’故可避免習知技術中因銀^溢 流至側壁而導致ρ型摻雜半導體層與η型摻雜半導體芦: 間電性短路的問題。如此—來，於側壁s上形成絕緣^ ^ 11 201023399 〇668twf.doc/d 可提升製程良率並降低製作成本。 之後，請參照圖m，移除抗氧化層Α，以暴 極El、E2。在本實施例中，去出電 ^ J T田抗氧化層Α為感光材料時 移除抗氧化層A的方法可以是曝光顯影。 、’ 圖2A〜圖2D緣示本發明另—每 構的製作方法的剖面圖。 4例之發先二極體結 Φ -备Π，請參照圖2A，提供—發光二極體晶片100與 土 200’發光二極體晶片100配置於承載基板200 上0 二;μ 4人參照圖2A ’在本實施例中，可於發光 徭，100上全面形成—連續性覆蓋材料層ci。然 遠照圖2B’可藉由曝光顯影法移除位於側壁S上的 ^性^材料層α之，以暴露出㈣s，並於頂面m、 上^留，的覆蓋層c，覆蓋層c覆蓋電極m、e2。 性絕照圖2C ’於承載基板2GG上形成一連續 性絕緣材.n的方t 極體⑼刚。形成連續 電子束成長，或者是其他適合的方法。之後， 明參知圖2D，移除覆蓋声Γ 如為含碎“化物。絕緣層1的材質例 圖3A〜圖3C綠士 2义Γ»α 構的製作方法的剖^柯明又一實施例之發光二極體結 12 201023399 jw68twf.doc/d 首先，請參照圖3A，提供-發光二極體晶#1〇〇與 -承載基板2G0,發光二極體晶片觸配置於承絲板2〇〇 上。接著，在承載基板上形成—連續性絕緣材料層u， 並覆蓋發光二極體晶>| 100,而形成連續性絕緣材料層n 的方法例如是旋轉塗佈或是其他適合的塗佈方式。在本實 施财’連續性絕緣材料層n的材質例如是氧化物溶膠貝 氧化物溶膠包括含有二氧化石夕的溶膠、或者是含有其他適 Φ 合的氧化物的溶膠。 然後，請參照圖3B，於側壁上形成—保護層31〇，且 連續性絕緣材料層Π位於保護層31〇與側壁s之間。在本 實施例中，形成保護層310的方法可以是先在發光二極體 晶片100上全面形成一保護材料層（未繪示），然後，以 曝光顯影法移除位於頂面、U2上的保護材料層。 之後’請參照圖3C，移除晶片1〇〇頂面上未被保護 層310所覆蓋的連續性絕緣材料層^以及侧壁s上的保護 層310 ’以於發光二極體晶片1〇〇的侧壁s上形成一絕緣 參 層1 °移除連續性絕緣材料層II的方法包括蝕刻。 值得注意的是’上述三種製作方法是以平面式的發光 二極體結構為例做說明，而熟習本領域技術者亦可將相同 的製作方法應用在垂直式的發光二極體結構上。以下則將 詳細介紹本發明一實施例之發光二極體結構。 圖4繪示本發明一實施例之發光二極體結構的剖面 圖。請參照圖4，本實施例之發光二極體結構400包括一 發光二極體晶片1〇〇以及一絕緣層I。發光二極體晶片100 13 5〇68twf.doc/d 201023399 為-平面式的發光二極體晶片，其具有一底M、相對於 底面Β的二頂面m、U2以及與頂面m、U2相連的多個 侧壁s ’發光二極體晶片100具有配置於頂面、U2上 的多個電極El、E2。 在本實施例中，發光二極體晶片1〇〇包括一第一型摻 雜半導體層112、-第二型摻雜半導體^ 114 α及位 -型摻雜半導體層112與第二型摻雜半導體層114之間的 φ 一發光層116。弟一型摻雜半導體層112、第二型摻雜半導 體層114以及發光層116的材質包括砷化鎵(GaAs)、磷化 鎵(GaP)、氮化鎵(GaN)等ΙΠ-ν族化合物半導體材料。第一 型摻雜半導體層112與第二型摻雜半導體層114可分別為 η型摻雜半導體層與ρ型摻雜半導體層。 此外，發光二極體晶片100還可包括一磊晶層12〇， 磊晶層120位於發光二極體晶片1〇〇與承載基板2〇〇之 間。遙晶層120的材質例如是石夕⑻）、玻璃(Giass)、钟化鎵 (GaAs)、氮化鎵(GaN)、砷化鋁鎵(AlGaAs)、磷化鎵(GaP)、 拳 碳化石夕(SiC)、磷化銦(inj>)、氮化爛(BN)、氧化銘(Al2〇3) 或氮化鋁(A1N)。 絕緣層I配置於側壁S上，並暴露出電極El、E2與 頂面Ul、U2。在本實施例中，絕緣層I還覆蓋在磊晶層 120的側壁122上。在本實施例中，絕緣層I的材質可包 括第一型摻雜半導體層U2的氧化物、發光層116的氧化 物以及第二型摻雜半導體層114的氧化物。在本實施例 中’絕緣層I的材質可包括含鎵的氧化物以及含氮的氧化 201023399_ 物。此外，絕緣層i的材質可包括含鎵的氧化物以及含磷 的氧化物。絕緣層的材質包括含矽的氧化物（如二氧化 矽）。另外，在其他實施例中，絕緣層^列如是物理氣相 沉積層、化學氣相沉積層、濺鍍層或電子束成長層。 圖5繪示本發明另一實施例之發光二極體結構的剖面 圖。請參照圖5 ’本實施例之發光二極體結構5〇〇包括一 發光二極體晶片510以及一絕緣層I。值得注意的是，本 ❹ 實施例之發光二極體結構500與圖4之發光二極體結構 400相似，兩者差異之處僅在於本實施例之發光二極體晶 片510為一垂直式的發光二極體晶片。此外，發光二極體 晶片510還包括一導電層512，其位於發光二極體晶片51〇 與電極E2之間’且絕緣層I亦覆蓋導電層512的侧壁512a。 綜上所述，本發明是在發光二極體晶片的側壁上形成 絕緣層’以填補側壁上的缺陷並使侧壁鈍化。如此一來， 絕緣層可降低漏電流產生的機率，並提升發光二極體晶片 在電性上的穩定性。此外，絕緣層覆蓋侧壁可保護侧壁免 ❹ 於受到外界環境或是後續製程的污染或是損壞，進而提升 製程良率。 再者’在後續的固晶過程中，由於絕緣層覆蓋發光二 極2晶片的側壁，故可避免習知技術中因銀膠溢流至側壁 而導致p型摻雜半導體層與n型摻雜半導體層之間電性短 路的問題。如此—來，絕緣層可提升製程良率並降低製作 成本。 、 雖然本發明已以實施例揭露如上，然其並非用以限定 15 201023399 〇〇68twf.d〇c/d 發月、任何所屬領域中具有通常知識者，在不脫離本發 之精，和軸内’當可作些許之更動與潤飾，因此本發 之保護範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1A〜圖id繪示本發明一實施例之發光二極體結構 的製作方法的剖面圖。 圖2A〜圖2D繪示本發明另一實施例之發光二極體結 • 構的製作方法的剖面圖。 圖3A〜圖3C繪示本發明又一實施例之發光二極體結 構的製作方法的剖面圖。 、 圖4緣示本發明一實施例之發光二極體結構的剖面 圖。 圖5缚示本發明另—實施例之發光二極體結構的剖面 圖。 【主要元件符號說明】 φ 100、510 :發光二極體晶片 112:第一型摻雜半導體層 114:第二型摻雜半導體層 B :底面 116 :發光層 120 ·蠢晶層 122、512a、S :侧壁 200 :承載基板 310 :保護層 16 201023399_/d 400、500 :發光二極體結構 512 :導電層 A:抗氧化層 A1 :連續性抗氧化材料層 C :覆蓋層 C1 :連續性覆蓋材料層 El、E2 :電極发光 The LED wafer 1 has a bottom surface B facing the carrier substrate 2, two top surfaces U2 opposite to the bottom surface B, and a plurality of side walls S connected to the top surfaces ui, u2, and the light emitting diodes The wafer 100 has a plurality of electrode illusions, E2, disposed on the top surfaces U1, U2. In this embodiment, the LED array 100 can include a first plastic, a semiconductor layer 112, a second type doped semiconductor layer 114, and a first type doped semiconductor layer 112 and a second type doped semiconductor. A light emitting layer 116 between the layers 114. Further, the light-emitting diode wafer 1A may further include an epitaxial layer 120 between the light-emitting diode wafer 1 and the carrier substrate 200. Next, referring again to FIG. 1A, in the present embodiment, a continuous oxidation resistant material layer A1 is formed on the light-emitting diode wafer 100, and the material thereof is, for example, a photosensitive material such as a photoresist. Then, referring to FIG. 1B, in the present embodiment, the continuous anti-oxidation material layer A1 on the sidewall S can be removed by the exposure development method to cover the top surfaces U1 and U2 of the LED wafer 100 and the boring tool. An oxidation resistant layer a is formed on the substrate substrate 2 . The oxidation resistant layer a is covered with electrodes E1 and E2 disposed on the top surfaces U1, U2, and the side walls S are exposed. 2010233995_ Afterwards, referring to FIG. ic, an oxidation method is performed to form an insulating layer I on the sidewall s of the LED wafer 100. The oxidation method is, for example, dry oxidation or wet oxidation. ). The wet oxidation method is carried out, for example, by exposing the light-emitting diode wafer 100 to an environment containing moisture, and the dry oxidation method is performed, for example, by exposing the light-emitting diode wafer 100 to an atmosphere containing oxygen. Further, in the present embodiment, since the epitaxial layer 120 can also be oxidized, the insulating layer I is also formed on the sidewall 122 of the epitaxial layer 120. The material of the insulating layer I may include an oxide of the first type doped semiconductor layer 112, an oxide of the light emitting layer 116, an emulsion of the second type doped semiconductor layer, and an oxide of the crystal layer 120. In this embodiment, the material of the insulating layer I includes a gallium-containing oxide and a nitrogen-containing oxide. In other embodiments, the material of the insulating layer I includes a gallium-containing oxide and a filled oxide. It is to be noted that the present embodiment forms the insulating layer I ′ on the side wall S of the light-emitting diode wafer 1 而 and the insulating layer 填补 can fill the defects 侧壁 on the side wall s and passivate the side wall S. As a result, the insulating layer I can reduce the probability of leakage current generation and improve the electrical stability of the LED wafer 100. In addition, the insulating layer I covers the side wall s to protect the side wall s from being contaminated or damaged by the external environment or subsequent processes, thereby improving the process yield. In addition, in the post-cured die bonding process, since the insulating layer Σ covers the sidewall S ′ of the LED wafer 1GG, the p-type doped semiconductor layer can be avoided due to the overflow of silver into the sidewall in the prior art. And n-type doped semiconductor reed: the problem of electrical short circuit. In this way, the insulation is formed on the sidewall s ^ ^ 11 201023399 〇 668 twf.doc / d can improve the process yield and reduce the production cost. After that, please refer to the figure m to remove the anti-oxidation layer Α to the extremes El, E2. In the present embodiment, the method of removing the anti-oxidation layer A when the anti-oxidation layer is removed as a photosensitive material may be exposure development. 2A to 2D are cross-sectional views showing the manufacturing method of the present invention. 4 cases of the first diode junction Φ-prepared, please refer to FIG. 2A, providing - the light-emitting diode wafer 100 and the soil 200' light-emitting diode wafer 100 are disposed on the carrier substrate 200; 2A 'In this embodiment, a continuous cover material layer ci can be formed over the luminescent ray 100. However, according to FIG. 2B', the layer of material layer α located on the side wall S can be removed by exposure development to expose (4) s, and the top layer m, the top layer of the cover layer c, the cover layer c Cover electrodes m, e2. The permanent insulating pattern 2C' forms a continuous insulating material. n of the square insulator (9) on the carrier substrate 2GG. Forming continuous electron beam growth, or other suitable method. After that, the light-receiving cover is removed as shown in Fig. 2D, and the method of making the broken structure is as follows: Fig. 3A to Fig. 3C of the material of the insulating layer 1 Example of a light-emitting diode junction 12 201023399 jw68twf.doc/d First, please refer to FIG. 3A, providing a light-emitting diode crystal #1〇〇 and a carrier substrate 2G0, and a light-emitting diode wafer is disposed on the wire receiving plate 2 Then, a continuous insulating material layer u is formed on the carrier substrate and covers the light emitting diode crystals >|100, and the method of forming the continuous insulating material layer n is, for example, spin coating or other suitable In the present embodiment, the material of the continuous insulating material layer n is, for example, an oxide sol shell oxide sol comprising a sol containing cerium oxide or a sol containing other suitable cerium oxide. Referring to FIG. 3B, a protective layer 31〇 is formed on the sidewall, and a continuous insulating material layer Π is located between the protective layer 31〇 and the sidewall s. In this embodiment, the method of forming the protective layer 310 may be A protective material is completely formed on the LED chip 100 a layer (not shown), and then removing the protective material layer on the top surface, U2 by exposure development. Then, please refer to FIG. 3C, removing the top surface of the wafer 1 covered by the unprotected layer 310. The continuous insulating material layer and the protective layer 310' on the sidewall s form an insulating spacer layer on the sidewall s of the LED wafer 1 1. The method for removing the continuous insulating material layer II includes etching. It is worth noting that the above three manufacturing methods are described by taking a planar light-emitting diode structure as an example, and those skilled in the art can apply the same manufacturing method to the vertical light-emitting diode structure. In the following, a structure of a light emitting diode according to an embodiment of the present invention will be described in detail. Fig. 4 is a cross-sectional view showing the structure of a light emitting diode according to an embodiment of the present invention. Referring to Fig. 4, the light emitting diode structure of the present embodiment is shown. 400 includes a light-emitting diode wafer 1 and an insulating layer 1. The light-emitting diode wafer 100 13 5〇68 twf.doc/d 201023399 is a planar light-emitting diode wafer having a bottom M and a relative On the bottom surface, the top surfaces m, U2 and The plurality of side walls s of the top surfaces m and U2 s the light-emitting diode wafer 100 has a plurality of electrodes E1 and E2 disposed on the top surface U2. In the embodiment, the light-emitting diode chip 1 includes A first type doped semiconductor layer 112, a second type doped semiconductor 11414, and a φ-light emitting layer 116 between the bit-type doped semiconductor layer 112 and the second type doped semiconductor layer 114. The material of the doped semiconductor layer 112, the second type doped semiconductor layer 114, and the light emitting layer 116 includes a ΙΠ-ν compound semiconductor material such as gallium arsenide (GaAs), gallium phosphide (GaP), or gallium nitride (GaN). The first type doped semiconductor layer 112 and the second type doped semiconductor layer 114 may be an n-type doped semiconductor layer and a p-type doped semiconductor layer, respectively. In addition, the LED array 100 may further include an epitaxial layer 120, and the epitaxial layer 120 is located between the LED substrate 1 and the carrier substrate 2A. The material of the crystal layer 120 is, for example, Shi Xi (8), glass (Giass), gallium arsenide (GaAs), gallium nitride (GaN), aluminum gallium arsenide (AlGaAs), gallium phosphide (GaP), punch carbon fossil. Xi (SiC), indium phosphide (inj>, nitriding (BN), oxidized (Al2〇3) or aluminum nitride (A1N). The insulating layer I is disposed on the side wall S and exposes the electrodes E1, E2 and the top surfaces U1, U2. In the present embodiment, the insulating layer I is also overlaid on the sidewall 122 of the epitaxial layer 120. In this embodiment, the material of the insulating layer I may include an oxide of the first type doped semiconductor layer U2, an oxide of the light emitting layer 116, and an oxide of the second type doped semiconductor layer 114. In the present embodiment, the material of the insulating layer I may include a gallium-containing oxide and a nitrogen-containing oxide 201023399. Further, the material of the insulating layer i may include a gallium-containing oxide and a phosphorus-containing oxide. The material of the insulating layer includes a cerium-containing oxide such as cerium oxide. Further, in other embodiments, the insulating layer is a physical vapor deposited layer, a chemical vapor deposited layer, a sputtered layer, or an electron beam grown layer. Fig. 5 is a cross-sectional view showing the structure of a light emitting diode according to another embodiment of the present invention. Referring to FIG. 5, the light-emitting diode structure 5 of the present embodiment includes a light-emitting diode wafer 510 and an insulating layer 1. It is to be noted that the LED structure 500 of the embodiment is similar to the LED structure 400 of FIG. 4, and the difference is only that the LED array 510 of the embodiment is a vertical type. Light-emitting diode wafer. In addition, the light-emitting diode wafer 510 further includes a conductive layer 512 between the light-emitting diode wafer 51 and the electrode E2 and the insulating layer I also covers the sidewall 512a of the conductive layer 512. In summary, the present invention forms an insulating layer on the sidewall of the light-emitting diode wafer to fill defects in the sidewall and passivate the sidewall. In this way, the insulating layer can reduce the probability of leakage current and improve the electrical stability of the LED wafer. In addition, the insulating layer covers the sidewalls to protect the sidewalls from contamination or damage from the external environment or subsequent processes, thereby improving process yield. Furthermore, in the subsequent die-bonding process, since the insulating layer covers the sidewall of the light-emitting diode 2 wafer, the p-type doped semiconductor layer and the n-type doping due to the overflow of the silver paste to the sidewall in the prior art can be avoided. The problem of electrical short between semiconductor layers. As such, the insulation layer improves process yield and reduces manufacturing costs. Although the present invention has been disclosed above by way of example, it is not intended to limit the scope of the 2010 2010 399 tw 68 twf.d 〇 c / d, any of the ordinary knowledge in the field, without departing from the essence, and the axis The scope of protection of this issue shall be subject to the definition of the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A to FIG. 1D are cross-sectional views showing a method of fabricating a light emitting diode structure according to an embodiment of the present invention. 2A to 2D are cross-sectional views showing a method of fabricating a light emitting diode structure according to another embodiment of the present invention. 3A to 3C are cross-sectional views showing a method of fabricating a light emitting diode structure according to still another embodiment of the present invention. Figure 4 is a cross-sectional view showing the structure of a light-emitting diode according to an embodiment of the present invention. Figure 5 is a cross-sectional view showing the structure of a light-emitting diode of another embodiment of the present invention. [Description of main component symbols] φ 100, 510: light-emitting diode wafer 112: first-type doped semiconductor layer 114: second-type doped semiconductor layer B: bottom surface 116: light-emitting layer 120 • stray layer 122, 512a, S: sidewall 200: carrier substrate 310: protective layer 16 201023399_/d 400, 500: light emitting diode structure 512: conductive layer A: oxidation resistant layer A1: continuous antioxidant material layer C: cover layer C1: continuity Cover material layer El, E2: electrode
I :絕緣層 II :連續性絕緣材料層 U、Ul、U2 :頂面I : Insulation layer II : Continuous insulating material layer U, Ul, U2 : Top surface
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