TW200945049A - Memory controller - Google Patents

Memory controller Download PDF

Info

Publication number
TW200945049A
TW200945049A TW98110826A TW98110826A TW200945049A TW 200945049 A TW200945049 A TW 200945049A TW 98110826 A TW98110826 A TW 98110826A TW 98110826 A TW98110826 A TW 98110826A TW 200945049 A TW200945049 A TW 200945049A
Authority
TW
Taiwan
Prior art keywords
memory
control device
memory control
coupled
data
Prior art date
Application number
TW98110826A
Other languages
English (en)
Chinese (zh)
Inventor
Masanori Okinoi
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Publication of TW200945049A publication Critical patent/TW200945049A/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1647—Handling requests for interconnection or transfer for access to memory bus based on arbitration with interleaved bank access

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Memory System (AREA)
TW98110826A 2008-04-07 2009-04-01 Memory controller TW200945049A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008099259A JP2009251945A (ja) 2008-04-07 2008-04-07 メモリ制御装置

Publications (1)

Publication Number Publication Date
TW200945049A true TW200945049A (en) 2009-11-01

Family

ID=41161681

Family Applications (1)

Application Number Title Priority Date Filing Date
TW98110826A TW200945049A (en) 2008-04-07 2009-04-01 Memory controller

Country Status (3)

Country Link
JP (1) JP2009251945A (ja)
TW (1) TW200945049A (ja)
WO (1) WO2009125543A1 (ja)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6033634A (ja) * 1983-08-04 1985-02-21 Nec Corp デ−タ処理装置
JPH0786853B2 (ja) * 1988-02-29 1995-09-20 株式会社ピーエフユー バス転送制御方式
JPH02177190A (ja) * 1988-12-28 1990-07-10 Nec Corp メモリ装置
JP4313456B2 (ja) * 1999-03-04 2009-08-12 パナソニック株式会社 メモリ制御装置
KR100450680B1 (ko) * 2002-07-29 2004-10-01 삼성전자주식회사 버스 대역폭을 증가시키기 위한 메모리 컨트롤러, 이를이용한 데이터 전송방법 및 이를 구비하는 컴퓨터 시스템

Also Published As

Publication number Publication date
WO2009125543A1 (ja) 2009-10-15
JP2009251945A (ja) 2009-10-29

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