TW200741838A - Manufacturing method of semiconductor chips - Google Patents

Manufacturing method of semiconductor chips

Info

Publication number
TW200741838A
TW200741838A TW095125081A TW95125081A TW200741838A TW 200741838 A TW200741838 A TW 200741838A TW 095125081 A TW095125081 A TW 095125081A TW 95125081 A TW95125081 A TW 95125081A TW 200741838 A TW200741838 A TW 200741838A
Authority
TW
Taiwan
Prior art keywords
dicing
masks
manufacturing
semiconductor chips
plasma
Prior art date
Application number
TW095125081A
Other languages
English (en)
Inventor
Kiyoshi Arita
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Publication of TW200741838A publication Critical patent/TW200741838A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
TW095125081A 2005-07-11 2006-07-10 Manufacturing method of semiconductor chips TW200741838A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005201536A JP4285455B2 (ja) 2005-07-11 2005-07-11 半導体チップの製造方法

Publications (1)

Publication Number Publication Date
TW200741838A true TW200741838A (en) 2007-11-01

Family

ID=37012078

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095125081A TW200741838A (en) 2005-07-11 2006-07-10 Manufacturing method of semiconductor chips

Country Status (7)

Country Link
US (1) US7923351B2 (zh)
EP (1) EP1797589A1 (zh)
JP (1) JP4285455B2 (zh)
KR (1) KR20080015771A (zh)
CN (1) CN100456449C (zh)
TW (1) TW200741838A (zh)
WO (1) WO2007007883A1 (zh)

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Also Published As

Publication number Publication date
EP1797589A1 (en) 2007-06-20
CN100456449C (zh) 2009-01-28
US7923351B2 (en) 2011-04-12
JP2007019386A (ja) 2007-01-25
CN101044613A (zh) 2007-09-26
JP4285455B2 (ja) 2009-06-24
KR20080015771A (ko) 2008-02-20
US20090209087A1 (en) 2009-08-20
WO2007007883A1 (en) 2007-01-18

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