CN100456449C - 半导体器件的制造方法 - Google Patents
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Abstract
一种制造半导体芯片的方法,该方法是通过从半导体晶片切割单个半导体器件而进行的,利用研磨头机械掩膜为等离子体切割而形成的掩膜,在等离子体切割中,通过进行等离子体蚀刻分割半导体晶片。于是,通过利用机械研磨去除用于等离子体切割的掩膜,防止了在去除掩膜时产生反应产物,使得切割可以在不会由于积累颗粒而导致质量下降的情况下进行。
Description
技术领域
本发明涉及通过从形成半导体器件的半导体晶片中切分单个半导体器件来制造半导体芯片的方法。
背景技术
安装在电子装置等的电路板上的半导体芯片是通过将半导体器件从其中形成电路图案的晶片状态切分成单独的片而制造的。伴随着半导体器件厚度减小带来的操纵晶片状态的半导体器件的难度增加,近年来已经采用了等离子体切割,在这种情况下,将半导体晶片切分成单独的半导体芯片是通过等离子体蚀刻来进行的(例如,参见JP-A-2004-172364专利申请公开说明书)。
等离子体切割是通过在除了网格图案的显示分割位置的分割线(streetline)外,半导体晶片掩盖有抗蚀膜的掩膜的情况下进行的,使得半导体晶片沿着该分割线切割。在切割后,为了去掉掩膜,在与JP-A-2004-172364专利申请公开说明书的现有技术中进行等离子体切割相同的等离子体处理设备中进行等离子体灰化(ashing)来去掉掩膜。
但是,在等离子体灰化时,在去除掩膜过程中产生的反应产物扩散成颗粒,并积累在等离子体处理设备内部。于是,在相同的等离子体处理设备中反复执行切割过程和灰化过程的情况下,会由于半导体晶片被等离子体处理设备中积累的颗粒污染导致切割过程的质量下降。
发明内容
鉴于上述情形,提出本发明,本发明的目的是提供一种半导体芯片的制造方法,其中,切割可以在不由于积累的颗粒导致质量下降的情况下进行。
上述目的通过这样一种制造半导体芯片的方法来实现,该方法通过从半导体晶片切割单独的半导体器件来完成,在半导体晶片中,半导体器件分别形成在由切割线分隔的多个区域内,所述方法包括以下步骤:
将能够剥离的保护带粘贴到半导体晶片的半导体器件形成表面上的保护带粘贴步骤;
研磨与半导体晶片中的粘贴有保护带的表面相对的后表面以便减薄半导体晶片的后表面研磨步骤;
在后表面研磨步骤之后形成覆盖半导体晶片的后表面上的多个区域的掩膜形成步骤;
通过从半导体晶片上形成掩膜的一侧产生等离子体来去除半导体晶片上未被掩膜覆盖的部分,将半导体晶片切成多个半导体芯片的等离子体切割步骤,其中,每个所述半导体芯片对应于单个半导体器件;
在等离子体切割步骤之后通过研磨形成掩膜的后表面来去除掩膜的掩膜去除步骤;
去除在掩膜去除步骤中形成在后表面上的损坏层的损坏层去除步骤;以及
从切成的半导体芯片上解脱保护带的带解脱步骤。
根据本发明,通过利用机械研磨去除用于等离子体切割的掩膜,防止了在去除掩膜时产生反应产物,使得可以在不由于积累的颗粒导致质量下降的情况下进行切割。
附图说明
图1是示出根据本发明一个优选实施例的半导体芯片制造方法的流程图;
图2A到2F是示出根据本发明实施例的半导体芯片的制造方法的过程的解释图;
图3是示出根据本发明实施例的半导体芯片制造方法的过程的解释图;
图4是示出根据本发明实施例的半导体芯片制造方法的过程的解释图;
图5是示出根据本发明实施例的半导体芯片制造方法的过程的解释图;
图6是示出根据本发明实施例的半导体芯片制造方法的过程的解释图。
具体实施方式
现在,将参照附图详细描述本发明的优选实施例。图1是示出根据本发明一个优选实施例的半导体芯片制造方法的流程图。图2A到2F、3、4、5和6是示出根据本发明实施例的半导体芯片制造方法的过程的解释图。
参照图1和2A到2F,将描述半导体的制造方法。这个制造方法是通过从半导体晶片切割单个半导体器件而进行的,在所述半导体晶片中,半导体器件分别形成在由切割线分隔的多个区域内。
在图1中,首先执行保护带粘贴步骤,在该步骤中,在机械研磨中用于保护的带粘贴到半导体晶片上(ST1)。即,如图2A所示,能够被剥离的保护带2粘贴到半导体晶片1的半导体器件形成面1a上。随后,执行背面研磨步骤(ST2)。即,如图3所示,半导体晶片1以保护带2的侧面位于下表面上的姿态放置在卡紧台(chuck table)6上。然后,其上粘贴保护带2的半导体晶片1的背面的一侧被研磨头7研磨,使得半导体晶片1被减薄。结果,最初厚度大约750μm的半导体晶片1被减薄到厚度t(大约60μm),如图2B所示。
接着,执行掩膜形成步骤(ST3)。即,在背面研磨步骤之后,厚度大约5~20μm的抗蚀膜借助于旋涂等通过树脂薄膜粘贴或树脂施加形成在机械研磨的表面上。通过诸如光刻法或激光处理等,仅除去抗蚀膜中对应于分隔单个半导体芯片的切割线的部分。结果,如图2C所示,用于等离子体切割的掩膜,即,被切割线3a分隔的掩膜3形成在半导体晶片1的背面上。
随后,执行等离子体切割步骤(ST4)。图4示出了在等离子体切割步骤中使用的干蚀刻设备10的结构。在图4中,在真空腔11的内侧,提供处理室12,在减小压力的条件下进行等离子体处理。通过驱动抽真空装置15,处理室12的内侧可以减压到进行等离子体处理的压力。提供高频电极13和簇射电极(shower electrode)14,使得它们在处理室12内侧彼此相对。在高频电极13的上表面上,作为处理对象的半导体晶片1放置成保护带的侧面位于下表面上而掩膜3的侧面位于上表面上的姿态。
高频电极13电连接到高频电源16。簇射电极14接地到接地部分18。通过驱动高频电源16,高频电压施加在高频电极13和簇射电极14之间。在簇射电极14的下表面上形成多个气体喷射14a。气体喷射口14a连接到供气部分17,该供气部分17提供用于等离子体处理的氟气。
在等离子体处理时,半导体晶片1放置在高频电极13上。然后,用于产生等离子体的氟气(在这个实施例中,为混合气体,其中,六氟化硫SF6与氦气混合)被吹到处理室12内的半导体晶片1上,同时处理室12被抽真空装置15抽真空。在这个状态下,高频电压施加到高频电极13和簇射电极14之间。结果,通过等离子体产生,而从氟气中产生氟原子团(radical)和离子,并且通过氟原子团的化学作用和加速离子的物理作用执行等离子体切割。
换句话说,通过从上侧向半导体晶片1产生氟气的等离子体,如图3D所示,在半导体晶片1上没有被掩膜3覆盖的切割线3a的部分被氟原子团的化学作用和加速离子的物理作用去除。然后,通过穿过半导体晶片1的整个厚度形成切割沟槽1c,半导体晶片1被分成半导体芯片1d,每个半导体芯片1d对应于单个半导体器件。
随后,执行背面研磨步骤(ST5)。即,如图5所示,其上粘贴被分成单片的半导体芯片1d的保护带2被放置在卡紧台25上,而半导体芯片1d上的掩膜3被研磨头26机械去除,使得半导体芯片1d形成为大约55μm的厚度。此时,半导体芯片1d还与掩膜3一起被局部研磨,使得在半导体芯片1d的上表面上形成损坏层1e。
接着,执行应力释放操作,来去除机械研磨的表面1e上的损坏层(ST6)。如图6所示,在背面研磨除去掩膜之后,粘贴在保护带2上的半导体芯片1d再次被容纳在干蚀刻设备10中,并且在损坏层1e上进行通过氟气的等离子体蚀刻。结果,如图2E所示,除掉了在去除掩膜之后仍保留在半导体芯片1d上表面上的损坏层1e,并且半导体芯片1d被减薄到大约50μm。
即,在应力释放操作中,通过在从其去除了掩膜3的半导体芯片1d的背面上进行等离子体蚀刻,形成在这些背面上的损坏层被去除。顺便提及,在这个损坏层去除步骤中,取代进行等离子体蚀刻,可以进行其他方法,如干抛光、化学抛光和湿蚀刻等。但是,通过利用进行等离子体切割的相同的干蚀刻设备10,可以在不增加设备成本的情况下进行应力释放。
此后,进行保护带的释放(ST2)。即,如图2F所示,被粘贴在保护带2上的半导体芯片1d被传送到切割片3,该切割片4被晶片环(waferring)5膨胀。然后,被粘贴在切割片4上的半导体芯片1d,保护带从被分隔的半导体芯片1d上释放。结果,半导体芯片1d处于被切割片4保持的状态,半导体器件形成面1a向上。
如上所述,在根据本发明一个实施例的半导体芯片制造方法中,形成在半导体晶片上的用于等离子体切割的掩膜通过机械研磨去除。通过这个特征,可以防止通过等离子体灰化去除掩膜时不可避免地产生的反应产物的出现。因此,反应产物不会积累在等离子体处理设备中,使得可以在不会由于积累的颗粒而导致质量下降的情况下进行切割。
工业应用性
根据本发明的半导体器件制造方法优点在于:通过放置去除掩膜时产生反应产物,切割可以在不会由于积累颗粒而导致质量下降的情况下进行,因此,在通过从其中形成半导体器件的半导体晶片切割单个半导体器件来制造半导体芯片的领域中大有可为。
Claims (2)
1.一种制造半导体芯片的方法,该方法通过从半导体晶片中切割单个半导体器件而进行,在该半导体晶片中,半导体器件分别形成在有切割线分隔的多个区域内,所述方法包括以下步骤:
保护带粘贴步骤:能够被剥离的保护带粘贴到半导体晶片的半导体器件形成面上;
背面研磨步骤:研磨半导体晶片中的与其上粘贴保护带的表面相对的背面,以便减薄半导体晶片;
掩膜形成步骤:在背面研磨步骤之后,在半导体晶片的背面上形成覆盖所述多个区域的掩膜;
等离子体切割步骤:通过从其上形成掩膜的半导体晶片一侧产生等离子体,以去除半导体晶片中的没有被掩膜覆盖的部分,将半导体晶片切割成多个半导体芯片,每个半导体芯片对应于单个半导体器件;
掩膜去除步骤:在等离子体切割步骤之后,通过研磨其上形成掩膜的背面来去除掩膜;
损坏层去除步骤:去除在掩膜去除步骤中形成在所述背面上的损坏层;以及
带释放步骤:从切割的半导体芯片上释放保护带。
2.如权利要求1所述的半导体器件制造方法,其中,在损坏层去除步骤中,形成在背面上的损坏层是通过等离子体蚀刻去除的。
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KR100828025B1 (ko) | 2007-06-13 | 2008-05-08 | 삼성전자주식회사 | 웨이퍼 절단 방법 |
US7781310B2 (en) | 2007-08-07 | 2010-08-24 | Semiconductor Components Industries, Llc | Semiconductor die singulation method |
US8012857B2 (en) | 2007-08-07 | 2011-09-06 | Semiconductor Components Industries, Llc | Semiconductor die singulation method |
US8859396B2 (en) | 2007-08-07 | 2014-10-14 | Semiconductor Components Industries, Llc | Semiconductor die singulation method |
US7989319B2 (en) | 2007-08-07 | 2011-08-02 | Semiconductor Components Industries, Llc | Semiconductor die singulation method |
JP5353703B2 (ja) * | 2007-10-09 | 2013-11-27 | 日立化成株式会社 | 接着フィルム付き半導体チップの製造方法及びこの製造方法に用いられる半導体用接着フィルム、並びに、半導体装置の製造方法 |
US20090137097A1 (en) * | 2007-11-26 | 2009-05-28 | United Microelectronics Corp. | Method for dicing wafer |
US9165833B2 (en) | 2010-01-18 | 2015-10-20 | Semiconductor Components Industries, Llc | Method of forming a semiconductor die |
US8384231B2 (en) | 2010-01-18 | 2013-02-26 | Semiconductor Components Industries, Llc | Method of forming a semiconductor die |
US9299664B2 (en) | 2010-01-18 | 2016-03-29 | Semiconductor Components Industries, Llc | Method of forming an EM protected semiconductor die |
US8642448B2 (en) | 2010-06-22 | 2014-02-04 | Applied Materials, Inc. | Wafer dicing using femtosecond-based laser and plasma etch |
US8802545B2 (en) | 2011-03-14 | 2014-08-12 | Plasma-Therm Llc | Method and apparatus for plasma dicing a semi-conductor wafer |
JP2012204588A (ja) * | 2011-03-25 | 2012-10-22 | Disco Abrasive Syst Ltd | 半導体デバイスチップの実装方法 |
US8557683B2 (en) | 2011-06-15 | 2013-10-15 | Applied Materials, Inc. | Multi-step and asymmetrically shaped laser beam scribing |
US8703581B2 (en) | 2011-06-15 | 2014-04-22 | Applied Materials, Inc. | Water soluble mask for substrate dicing by laser and plasma etch |
US8507363B2 (en) | 2011-06-15 | 2013-08-13 | Applied Materials, Inc. | Laser and plasma etch wafer dicing using water-soluble die attach film |
US8912077B2 (en) | 2011-06-15 | 2014-12-16 | Applied Materials, Inc. | Hybrid laser and plasma etch wafer dicing using substrate carrier |
US8759197B2 (en) | 2011-06-15 | 2014-06-24 | Applied Materials, Inc. | Multi-step and asymmetrically shaped laser beam scribing |
US9126285B2 (en) | 2011-06-15 | 2015-09-08 | Applied Materials, Inc. | Laser and plasma etch wafer dicing using physically-removable mask |
US9129904B2 (en) | 2011-06-15 | 2015-09-08 | Applied Materials, Inc. | Wafer dicing using pulse train laser with multiple-pulse bursts and plasma etch |
US8598016B2 (en) | 2011-06-15 | 2013-12-03 | Applied Materials, Inc. | In-situ deposited mask layer for device singulation by laser scribing and plasma etch |
US8557682B2 (en) | 2011-06-15 | 2013-10-15 | Applied Materials, Inc. | Multi-layer mask for substrate dicing by laser and plasma etch |
US9029242B2 (en) | 2011-06-15 | 2015-05-12 | Applied Materials, Inc. | Damage isolation by shaped beam delivery in laser scribing process |
US8951819B2 (en) | 2011-07-11 | 2015-02-10 | Applied Materials, Inc. | Wafer dicing using hybrid split-beam laser scribing process with plasma etch |
US9099547B2 (en) | 2011-10-04 | 2015-08-04 | Infineon Technologies Ag | Testing process for semiconductor devices |
CN102420157A (zh) * | 2011-10-24 | 2012-04-18 | 华中科技大学 | 一种提高硅片减薄后机械强度的方法 |
JP5687647B2 (ja) * | 2012-03-14 | 2015-03-18 | 株式会社東芝 | 半導体装置の製造方法、半導体製造装置 |
KR101347027B1 (ko) * | 2012-03-21 | 2014-01-07 | 주식회사 케이엔제이 | 반도체 패키지 슬리밍장치 및 방법 |
US8652940B2 (en) | 2012-04-10 | 2014-02-18 | Applied Materials, Inc. | Wafer dicing used hybrid multi-step laser scribing process with plasma etch |
US8748297B2 (en) | 2012-04-20 | 2014-06-10 | Infineon Technologies Ag | Methods of forming semiconductor devices by singulating a substrate by removing a dummy fill material |
US8946057B2 (en) | 2012-04-24 | 2015-02-03 | Applied Materials, Inc. | Laser and plasma etch wafer dicing using UV-curable adhesive film |
US8969177B2 (en) | 2012-06-29 | 2015-03-03 | Applied Materials, Inc. | Laser and plasma etch wafer dicing with a double sided UV-curable adhesive film |
US9048309B2 (en) | 2012-07-10 | 2015-06-02 | Applied Materials, Inc. | Uniform masking for wafer dicing using laser and plasma etch |
US8993414B2 (en) | 2012-07-13 | 2015-03-31 | Applied Materials, Inc. | Laser scribing and plasma etch for high die break strength and clean sidewall |
US8940619B2 (en) | 2012-07-13 | 2015-01-27 | Applied Materials, Inc. | Method of diced wafer transportation |
US8845854B2 (en) | 2012-07-13 | 2014-09-30 | Applied Materials, Inc. | Laser, plasma etch, and backside grind process for wafer dicing |
US8859397B2 (en) | 2012-07-13 | 2014-10-14 | Applied Materials, Inc. | Method of coating water soluble mask for laser scribing and plasma etch |
US9159574B2 (en) | 2012-08-27 | 2015-10-13 | Applied Materials, Inc. | Method of silicon etch for trench sidewall smoothing |
US9252057B2 (en) | 2012-10-17 | 2016-02-02 | Applied Materials, Inc. | Laser and plasma etch wafer dicing with partial pre-curing of UV release dicing tape for film frame wafer application |
US9136173B2 (en) | 2012-11-07 | 2015-09-15 | Semiconductor Components Industries, Llc | Singulation method for semiconductor die having a layer of material along one major surface |
US9484260B2 (en) | 2012-11-07 | 2016-11-01 | Semiconductor Components Industries, Llc | Heated carrier substrate semiconductor die singulation method |
US8975162B2 (en) | 2012-12-20 | 2015-03-10 | Applied Materials, Inc. | Wafer dicing from wafer backside |
US9236305B2 (en) | 2013-01-25 | 2016-01-12 | Applied Materials, Inc. | Wafer dicing with etch chamber shield ring for film frame wafer applications |
US8980726B2 (en) | 2013-01-25 | 2015-03-17 | Applied Materials, Inc. | Substrate dicing by laser ablation and plasma etch damage removal for ultra-thin wafers |
WO2014159464A1 (en) | 2013-03-14 | 2014-10-02 | Applied Materials, Inc. | Multi-layer mask including non-photodefinable laser energy absorbing layer for substrate dicing by laser and plasma etch |
US8883614B1 (en) | 2013-05-22 | 2014-11-11 | Applied Materials, Inc. | Wafer dicing with wide kerf by laser scribing and plasma etching hybrid approach |
US9105710B2 (en) | 2013-08-30 | 2015-08-11 | Applied Materials, Inc. | Wafer dicing method for improving die packaging quality |
US9224650B2 (en) | 2013-09-19 | 2015-12-29 | Applied Materials, Inc. | Wafer dicing from wafer backside and front side |
US9460966B2 (en) | 2013-10-10 | 2016-10-04 | Applied Materials, Inc. | Method and apparatus for dicing wafers having thick passivation polymer layer |
US9041198B2 (en) | 2013-10-22 | 2015-05-26 | Applied Materials, Inc. | Maskless hybrid laser scribing and plasma etching wafer dicing process |
US9406564B2 (en) | 2013-11-21 | 2016-08-02 | Infineon Technologies Ag | Singulation through a masking structure surrounding expitaxial regions |
US20150147850A1 (en) * | 2013-11-25 | 2015-05-28 | Infineon Technologies Ag | Methods for processing a semiconductor workpiece |
US9312177B2 (en) | 2013-12-06 | 2016-04-12 | Applied Materials, Inc. | Screen print mask for laser scribe and plasma etch wafer dicing process |
US9299614B2 (en) | 2013-12-10 | 2016-03-29 | Applied Materials, Inc. | Method and carrier for dicing a wafer |
US9293304B2 (en) * | 2013-12-17 | 2016-03-22 | Applied Materials, Inc. | Plasma thermal shield for heat dissipation in plasma chamber |
US9299611B2 (en) | 2014-01-29 | 2016-03-29 | Applied Materials, Inc. | Method of wafer dicing using hybrid laser scribing and plasma etch approach with mask plasma treatment for improved mask etch resistance |
US8927393B1 (en) | 2014-01-29 | 2015-01-06 | Applied Materials, Inc. | Water soluble mask formation by dry film vacuum lamination for laser and plasma dicing |
US9012305B1 (en) | 2014-01-29 | 2015-04-21 | Applied Materials, Inc. | Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate non-reactive post mask-opening clean |
US9018079B1 (en) | 2014-01-29 | 2015-04-28 | Applied Materials, Inc. | Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate reactive post mask-opening clean |
US9236284B2 (en) | 2014-01-31 | 2016-01-12 | Applied Materials, Inc. | Cooled tape frame lift and low contact shadow ring for plasma heat isolation |
US8991329B1 (en) | 2014-01-31 | 2015-03-31 | Applied Materials, Inc. | Wafer coating |
US9130030B1 (en) | 2014-03-07 | 2015-09-08 | Applied Materials, Inc. | Baking tool for improved wafer coating process |
US20150255349A1 (en) | 2014-03-07 | 2015-09-10 | JAMES Matthew HOLDEN | Approaches for cleaning a wafer during hybrid laser scribing and plasma etching wafer dicing processes |
US9418894B2 (en) | 2014-03-21 | 2016-08-16 | Semiconductor Components Industries, Llc | Electronic die singulation method |
US9275902B2 (en) | 2014-03-26 | 2016-03-01 | Applied Materials, Inc. | Dicing processes for thin wafers with bumps on wafer backside |
US9455192B2 (en) | 2014-03-26 | 2016-09-27 | Infineon Technologies Ag | Kerf preparation for backside metallization |
US9076860B1 (en) | 2014-04-04 | 2015-07-07 | Applied Materials, Inc. | Residue removal from singulated die sidewall |
US8975163B1 (en) | 2014-04-10 | 2015-03-10 | Applied Materials, Inc. | Laser-dominated laser scribing and plasma etch hybrid wafer dicing |
US8932939B1 (en) | 2014-04-14 | 2015-01-13 | Applied Materials, Inc. | Water soluble mask formation by dry film lamination |
US8912078B1 (en) | 2014-04-16 | 2014-12-16 | Applied Materials, Inc. | Dicing wafers having solder bumps on wafer backside |
US8999816B1 (en) | 2014-04-18 | 2015-04-07 | Applied Materials, Inc. | Pre-patterned dry laminate mask for wafer dicing processes |
US8912075B1 (en) | 2014-04-29 | 2014-12-16 | Applied Materials, Inc. | Wafer edge warp supression for thin wafer supported by tape frame |
US9159621B1 (en) | 2014-04-29 | 2015-10-13 | Applied Materials, Inc. | Dicing tape protection for wafer dicing using laser scribe process |
US8980727B1 (en) | 2014-05-07 | 2015-03-17 | Applied Materials, Inc. | Substrate patterning using hybrid laser scribing and plasma etching processing schemes |
US9112050B1 (en) | 2014-05-13 | 2015-08-18 | Applied Materials, Inc. | Dicing tape thermal management by wafer frame support ring cooling during plasma dicing |
CN105097487B (zh) * | 2014-05-16 | 2018-08-24 | 北京北方华创微电子装备有限公司 | 一种晶圆背面减薄工艺 |
US9034771B1 (en) | 2014-05-23 | 2015-05-19 | Applied Materials, Inc. | Cooling pedestal for dicing tape thermal management during plasma dicing |
US9397055B2 (en) | 2014-05-29 | 2016-07-19 | Infineon Technologies Ag | Processing of thick metal pads |
US9130057B1 (en) | 2014-06-30 | 2015-09-08 | Applied Materials, Inc. | Hybrid dicing process using a blade and laser |
US9142459B1 (en) | 2014-06-30 | 2015-09-22 | Applied Materials, Inc. | Wafer dicing using hybrid laser scribing and plasma etch approach with mask application by vacuum lamination |
US9093518B1 (en) | 2014-06-30 | 2015-07-28 | Applied Materials, Inc. | Singulation of wafers having wafer-level underfill |
US9165832B1 (en) | 2014-06-30 | 2015-10-20 | Applied Materials, Inc. | Method of die singulation using laser ablation and induction of internal defects with a laser |
US9349648B2 (en) | 2014-07-22 | 2016-05-24 | Applied Materials, Inc. | Hybrid wafer dicing approach using a rectangular shaped two-dimensional top hat laser beam profile or a linear shaped one-dimensional top hat laser beam profile laser scribing process and plasma etch process |
US9117868B1 (en) | 2014-08-12 | 2015-08-25 | Applied Materials, Inc. | Bipolar electrostatic chuck for dicing tape thermal management during plasma dicing |
US9196498B1 (en) | 2014-08-12 | 2015-11-24 | Applied Materials, Inc. | Stationary actively-cooled shadow ring for heat dissipation in plasma chamber |
US9385041B2 (en) | 2014-08-26 | 2016-07-05 | Semiconductor Components Industries, Llc | Method for insulating singulated electronic die |
US9281244B1 (en) | 2014-09-18 | 2016-03-08 | Applied Materials, Inc. | Hybrid wafer dicing approach using an adaptive optics-controlled laser scribing process and plasma etch process |
US11195756B2 (en) | 2014-09-19 | 2021-12-07 | Applied Materials, Inc. | Proximity contact cover ring for plasma dicing |
US9177861B1 (en) | 2014-09-19 | 2015-11-03 | Applied Materials, Inc. | Hybrid wafer dicing approach using laser scribing process based on an elliptical laser beam profile or a spatio-temporal controlled laser beam profile |
US9196536B1 (en) | 2014-09-25 | 2015-11-24 | Applied Materials, Inc. | Hybrid wafer dicing approach using a phase modulated laser beam profile laser scribing process and plasma etch process |
US9130056B1 (en) | 2014-10-03 | 2015-09-08 | Applied Materials, Inc. | Bi-layer wafer-level underfill mask for wafer dicing and approaches for performing wafer dicing |
US9245803B1 (en) | 2014-10-17 | 2016-01-26 | Applied Materials, Inc. | Hybrid wafer dicing approach using a bessel beam shaper laser scribing process and plasma etch process |
US10692765B2 (en) | 2014-11-07 | 2020-06-23 | Applied Materials, Inc. | Transfer arm for film frame substrate handling during plasma singulation of wafers |
US9330977B1 (en) | 2015-01-05 | 2016-05-03 | Applied Materials, Inc. | Hybrid wafer dicing approach using a galvo scanner and linear stage hybrid motion laser scribing process and plasma etch process |
US9355907B1 (en) | 2015-01-05 | 2016-05-31 | Applied Materials, Inc. | Hybrid wafer dicing approach using a line shaped laser beam profile laser scribing process and plasma etch process |
US9159624B1 (en) | 2015-01-05 | 2015-10-13 | Applied Materials, Inc. | Vacuum lamination of polymeric dry films for wafer dicing using hybrid laser scribing and plasma etch approach |
JP6738591B2 (ja) * | 2015-03-13 | 2020-08-12 | 古河電気工業株式会社 | 半導体ウェハの処理方法、半導体チップおよび表面保護テープ |
JP2016207737A (ja) * | 2015-04-17 | 2016-12-08 | 株式会社ディスコ | 分割方法 |
US9601375B2 (en) | 2015-04-27 | 2017-03-21 | Applied Materials, Inc. | UV-cure pre-treatment of carrier film for wafer dicing using hybrid laser scribing and plasma etch approach |
US9721839B2 (en) | 2015-06-12 | 2017-08-01 | Applied Materials, Inc. | Etch-resistant water soluble mask for hybrid wafer dicing using laser scribing and plasma etch |
US9478455B1 (en) | 2015-06-12 | 2016-10-25 | Applied Materials, Inc. | Thermal pyrolytic graphite shadow ring assembly for heat dissipation in plasma chamber |
JP6492288B2 (ja) * | 2015-10-01 | 2019-04-03 | パナソニックIpマネジメント株式会社 | 素子チップの製造方法 |
KR20170122185A (ko) * | 2015-11-09 | 2017-11-03 | 후루카와 덴키 고교 가부시키가이샤 | 반도체 칩의 제조방법 및 이것에 이용하는 마스크 일체형 표면 보호 테이프 |
JP2017103406A (ja) | 2015-12-04 | 2017-06-08 | 株式会社ディスコ | ウエーハの加工方法 |
US9972575B2 (en) | 2016-03-03 | 2018-05-15 | Applied Materials, Inc. | Hybrid wafer dicing approach using a split beam laser scribing process and plasma etch process |
US9852997B2 (en) | 2016-03-25 | 2017-12-26 | Applied Materials, Inc. | Hybrid wafer dicing approach using a rotating beam laser scribing process and plasma etch process |
US9793132B1 (en) | 2016-05-13 | 2017-10-17 | Applied Materials, Inc. | Etch mask for hybrid laser scribing and plasma etch wafer singulation process |
US10366923B2 (en) | 2016-06-02 | 2019-07-30 | Semiconductor Components Industries, Llc | Method of separating electronic devices having a back layer and apparatus |
JP6512454B2 (ja) * | 2016-12-06 | 2019-05-15 | パナソニックIpマネジメント株式会社 | 素子チップの製造方法 |
US10373869B2 (en) | 2017-05-24 | 2019-08-06 | Semiconductor Components Industries, Llc | Method of separating a back layer on a substrate using exposure to reduced temperature and related apparatus |
US11158540B2 (en) | 2017-05-26 | 2021-10-26 | Applied Materials, Inc. | Light-absorbing mask for hybrid laser scribing and plasma etch wafer singulation process |
US10363629B2 (en) | 2017-06-01 | 2019-07-30 | Applied Materials, Inc. | Mitigation of particle contamination for wafer dicing processes |
US11348796B2 (en) * | 2017-08-17 | 2022-05-31 | Semiconductor Components Industries, Llc | Backmetal removal methods |
US10535561B2 (en) | 2018-03-12 | 2020-01-14 | Applied Materials, Inc. | Hybrid wafer dicing approach using a multiple pass laser scribing process and plasma etch process |
US11355394B2 (en) | 2018-09-13 | 2022-06-07 | Applied Materials, Inc. | Wafer dicing using hybrid laser scribing and plasma etch approach with intermediate breakthrough treatment |
US10818551B2 (en) | 2019-01-09 | 2020-10-27 | Semiconductor Components Industries, Llc | Plasma die singulation systems and related methods |
US11011424B2 (en) | 2019-08-06 | 2021-05-18 | Applied Materials, Inc. | Hybrid wafer dicing approach using a spatially multi-focused laser beam laser scribing process and plasma etch process |
US11342226B2 (en) | 2019-08-13 | 2022-05-24 | Applied Materials, Inc. | Hybrid wafer dicing approach using an actively-focused laser beam laser scribing process and plasma etch process |
US10903121B1 (en) | 2019-08-14 | 2021-01-26 | Applied Materials, Inc. | Hybrid wafer dicing approach using a uniform rotating beam laser scribing process and plasma etch process |
US11600492B2 (en) | 2019-12-10 | 2023-03-07 | Applied Materials, Inc. | Electrostatic chuck with reduced current leakage for hybrid laser scribing and plasma etch wafer singulation process |
US11211247B2 (en) | 2020-01-30 | 2021-12-28 | Applied Materials, Inc. | Water soluble organic-inorganic hybrid mask formulations and their applications |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1272222A (zh) * | 1997-08-21 | 2000-11-01 | Memc电子材料有限公司 | 处理半导体晶片的方法 |
CN1355553A (zh) * | 2000-11-27 | 2002-06-26 | 矽品精密工业股份有限公司 | 晶片切割研磨制作方法 |
CN1433055A (zh) * | 2002-01-15 | 2003-07-30 | 日东电工株式会社 | 保护带条的粘贴方法与装置以及保护带条的分离方法 |
WO2004047165A1 (en) * | 2002-11-20 | 2004-06-03 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing semiconductor device, plasma processing apparatus and plasma processing method |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5963816A (en) * | 1997-12-01 | 1999-10-05 | Advanced Micro Devices, Inc. | Method for making shallow trench marks |
CA2246087A1 (en) * | 1998-08-28 | 2000-02-28 | Northern Telecom Limited | Method of cleaving a semiconductor wafer |
JP4013745B2 (ja) | 2002-11-20 | 2007-11-28 | 松下電器産業株式会社 | プラズマ処理方法 |
US7659196B2 (en) * | 2006-12-20 | 2010-02-09 | Intel Corporation | Soluble hard mask for interlayer dielectric patterning |
-
2005
- 2005-07-11 JP JP2005201536A patent/JP4285455B2/ja active Active
-
2006
- 2006-07-10 US US11/576,363 patent/US7923351B2/en active Active
- 2006-07-10 KR KR1020077007704A patent/KR20080015771A/ko not_active Application Discontinuation
- 2006-07-10 CN CNB2006800010558A patent/CN100456449C/zh active Active
- 2006-07-10 TW TW095125081A patent/TW200741838A/zh unknown
- 2006-07-10 EP EP06781139A patent/EP1797589A1/en not_active Withdrawn
- 2006-07-10 WO PCT/JP2006/314114 patent/WO2007007883A1/en active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1272222A (zh) * | 1997-08-21 | 2000-11-01 | Memc电子材料有限公司 | 处理半导体晶片的方法 |
CN1355553A (zh) * | 2000-11-27 | 2002-06-26 | 矽品精密工业股份有限公司 | 晶片切割研磨制作方法 |
CN1433055A (zh) * | 2002-01-15 | 2003-07-30 | 日东电工株式会社 | 保护带条的粘贴方法与装置以及保护带条的分离方法 |
WO2004047165A1 (en) * | 2002-11-20 | 2004-06-03 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing semiconductor device, plasma processing apparatus and plasma processing method |
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EP1797589A1 (en) | 2007-06-20 |
US7923351B2 (en) | 2011-04-12 |
JP2007019386A (ja) | 2007-01-25 |
CN101044613A (zh) | 2007-09-26 |
JP4285455B2 (ja) | 2009-06-24 |
KR20080015771A (ko) | 2008-02-20 |
US20090209087A1 (en) | 2009-08-20 |
WO2007007883A1 (en) | 2007-01-18 |
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